JPH01245782A - Arrangement correction circuit for line sequential color signal - Google Patents

Abstract

PURPOSE:To reproduce correctly a color signal from a line sequential color signal whose consecution is lost due to special reproduction or the like by correcting the arrangement of the line sequential color signal in the process of write/read by a storage means storing the color video signal including the line sequential color signal for at least one field. CONSTITUTION:A color video signal is shared in field memories 4, 5 via a selector 3 switched for one field each by using a control signal from a control circuit 2, an address data generated by a write address generating circuit 8 at write is inputted via an address correction circuit 9 and an address data from a readout address generating circuit 10 at readout via an address correction circuit 11. The signal read from the field memories 4, 5 is outputted to an output terminal 13 via a selector 12 switched by the control signal from the control circuit 12. Thus, the color signal arrangement of the line sequential signal whose consecution is lost is corrected to reproduce the color signal correctly even at special reproduction.

Description

DETAILED DESCRIPTION OF THE INVENTION [Purpose of the Invention (Industrial Application Field) The present invention relates to a line-sequential color signal for correcting the arrangement of two types of color signals, such as a line-sequential color signal in a reproduced color video signal of a VTR, for example. The present invention relates to an array correction circuit.

(Prior Art) As one of the recording methods for improving image quality in image recording and reproducing devices such as VTRs (video tape recorders), T
CI (time compressed integ)
ration) method is attracting attention. This is a method that time-division multiplexes a luminance signal (Y signal) and a time-compressed chrominance signal (C signal) for each horizontal scanning line or two, and does not cause any interference between the luminance signal and chrominance signal. It has the advantage of

In the TCI system, the transmission bandwidth is widened by compressing the time axis of the C signal, so two types of color signals (color difference signals), for example, a CW multiplied signal wideband color signal) and a CN signal (narrowband signal), are used as the C signal. A color line sequential method is used in which data is transmitted sequentially. In the case of this color line sequential method, in order to correctly restore the C signal from the line sequential color signal, it is necessary that the Cw multiplied signal and the CN signal are arranged alternately (this is called continuity of the line sequential color signal). It is.

VT that records color signals using this color line sequential method
In R, if reproduction is performed at the same tape speed as recording, continuity of line-sequential color signals is obtained, and both Y and C signals can be reproduced without problems. However, during special playback, the tape is played back at a different speed than during recording, so the scan trajectory of the head straddles several video tracks. In such a case, there is no guarantee that the continuity of the line-sequential color signal will be maintained, and it may become impossible to reproduce the C signal.

For example, when segment recording is performed on a VTR by dividing the field of line sequential color signals into three segments in the format shown in Figure 5, and this is played back at double speed as shown in Figure 6, the reproduced signal is As shown in FIGS. 7 and 8, signals of segment 2 are obtained in the first scan, signals of segment 2 are obtained in the second scan, and signals of segment 2 are obtained in the third scan. Here, the odd-numbered segments and the even-numbered segments each have a fixed color signal arrangement as shown in FIG. 5, and the positional relationship of the Cw multiplied signal CN signal is reversed between the two segments. When these reproduced signals are finally rearranged in order of horizontal scanning line numbers, the same type of color signal will continue across three horizontal scanning lines as shown in Figure 9, resulting in line-sequential color signal continuity. It disappears.

(Problem to be solved by the invention) In this way, when color signals are recorded using the color line sequential method,
There is a problem in that the continuity of line-sequential color signals cannot be ensured during special reproduction, etc., and color signals cannot be reproduced correctly.

SUMMARY OF THE INVENTION An object of the present invention is to provide a line-sequential color signal arrangement correction circuit that corrects the color signal arrangement of line-sequential color signals that have lost continuity and can correctly reproduce color signals even during special playback.

[Structure of the Invention] (Means for Solving the Problems) The present invention provides a method for writing/reading in a storage means for storing at least one field of a color video signal including a line-sequential color signal in which two types of color signals are made line-sequential. In this process, the arrangement of line-sequential color signals is corrected.

That is, when writing a color video signal to this storage means, the write address of the color signal in the color video signal of either the odd field or the even field is set to the write address of the color signal in the color video signal of the other field. A write address correction means is provided to shift the write address by an odd number of horizontal scanning lines, and when reading out the color video signal from the storage means, the color signal in the color video signal of either the odd field or the even field is adjusted. A read address correction means is provided for shifting the read address by an odd number of horizontal scanning lines with respect to the read address of the other field.

(Function) In the present invention, by the write address correction means, the arrangement of color signals is the same in both odd and even fields when written in the storage means, and the continuity of line-sequential color signals within the field is maintained. .

When such write address correction is performed, the continuity of the line sequential color signal between frames is impaired, but the read address of the color signal of the field shifted by the write address correction is corrected by the read address correction means. , continuity between the fields is restored in the state read from the storage means.

(Embodiment) FIG. 1 shows a line-sequential color signal arrangement correction circuit according to an embodiment of the present invention.

In FIG. 1, an input terminal 1 receives a color video signal including a line-sequential color signal. In this color video signal, as shown in FIG. 3, it is assumed that the CW signal and the CN signal are interchanged between odd and even fields. This color video signal is distributed to a field memory 4.5 via a selector 3 which is switched for each field by a control signal from a control circuit 2.

The field memories 4 and 5 are provided, for example, in a time axis correction circuit on the reproduction side of a VTR, and are alternately switched to write/continue mode for each field by the control circuit 2. The field memories 4 and 5 include a control circuit 2.
Address data is inputted through selectors 6 and 7, respectively, which are switched by control signals from . That is, during writing, address data generated by write address generation circuit 8 is inputted via address correction circuit 9, and during reading, address data from read address generation circuit 10 is inputted via address correction circuit 11. Signals read from the field memories 4 and 5 are output to an output terminal 13 via a selector 12 which is switched by a control signal from a control circuit 12.

Here, the address correction circuits 9 and 11 are arranged so that the address correction circuits 9 and 11 generate signals generated from the write address generation circuit 8 and the read address generation circuit 10 in order to ensure continuity of line sequential color signals in the color television signal outputted from the output terminal 13. This corrects address data when writing and reading color signals.

FIG. 2 shows the structure of the address correction circuit 9 for write addresses, and FIG. 3 shows the structure of the address correction circuit 11 for read addresses.

In FIG. 2, a Y/C discrimination signal indicating whether the color video signal input to input terminal 1 in FIG. 1 is in a Y signal period or a C signal period is input to a terminal 21, and a horizontal synchronizing signal H5ync is input, and the C signal is input to terminal 23.
A color index signal indicating whether the W multiplied signal is the CN signal is input, and write address data from the write address generation circuit 8 of FIG. 1 is input to the terminal 24.

The odd field Cw-CN identification circuit 25 determines that every time a horizontal synchronizing signal is input from the terminal 22, the C signal of the horizontal scanning line corresponding to the horizontal synchronizing signal in the odd field is Cw (indicating whether it is a No. 8 or a CN signal). A reference identification signal is output.For example, if the horizontal scanning line corresponding to the horizontal synchronization signal input to the terminal 22 is the α-th line, the C signal in the odd field corresponding to this is the CW multiplied signal α+1 from FIG. On the line, it is a CN signal.As a result of this identification, the identification circuit 25 returns "1" if there is a CW multiplied signal;
If it is a signal, it outputs a signal such as "0".

The comparator 26 compares the output of the identification circuit 25 with the color index signal from the terminal 23 to determine whether the reproduction line (horizontal scanning line of the color video signal input to the input terminal 1) is an odd field or an even field. Determine. The output of this comparator 26 is input to a control circuit 27.

The control circuit 27 receives the Y/C which is determined by the comparator 26 to be a reproduction line or an even field and which is input to the terminal 21.
When it is determined by the discrimination signal that the C signal has been input, the two selectors are switched from the A side to the B side. As a result, the write address data input to the terminal 24 is shifted forward by one horizontal scanning line by the one line address subtracter 28, and the data is output to the terminal 30.

On the other hand, when the comparator 26 determines that the reproduction line is an odd field, and when the Y/C determination signal determines that a Y signal has been input, the control circuit 27 switches the selector 29 to the A side, and the terminal 24 The write address data input to the terminal 30 is output as is to the terminal 30.

Using the write address data outputted through the address correction circuit 9 having the configuration shown in FIG.
When a reproduced color television signal input from, for example, a VTR is written into the field memory 4.5, the line sequential color signals in the field memories 4 and 5 are always stored in an odd field arrangement for both odd and even fields. Ru.

That is, as shown in Fig. 4, the original arrangement of the C signal in an odd field is such that the α line is CW + α + 1st line or CN, etc., and the original arrangement of the C signal in an even field is the opposite. α line is CN,
The arrangement is α+1st line or Cw, etc. However, when written to the field memories 4 and 5, the arrangement of C signals in odd fields remains unchanged, and the arrangement of C signals in even fields is the same as that of odd fields. Then α line is CW + α+1 line low or CN +...
This becomes an array. Therefore, in the field memories 4 and 5, the Cw multiplied signal CN signal is alternately arranged in both the odd and even fields, and the continuity of the line-sequential color signals within the field is maintained.

In this way, the address correction circuit uses the field memory 4.
Is it possible to obtain continuity of the line-sequential color signal within the field by correcting the write address in step 5?If this is read out as is, the position of the Cw multiplied signal CN signal is swapped in the even field, and the position of the CN signal in the odd field is changed. Since the arrangement is the same as that of the C signal, the continuity of the line sequential color signal is not maintained between odd and even fields.

Therefore, in FIG. 1, the read address from the read address generation circuit 10 is corrected by the address correction circuit 11 shown in FIG. 3, thereby maintaining the continuity of the line-sequential color signals between fields.

In FIG. 3, field memories 4 and 5 are connected to terminal 31.
When reading from the field memories 4 and 5, field information indicating which signal is to be read out, an odd field or an even field, is input, and the terminal 32 indicates whether the color television signal to be read from the field memories 4 and 5 is in the Y signal period. A Y/C discrimination signal indicating whether it is the C signal period is input, and read address data from the read address generation circuit 10 of FIG. 1 is input to the terminal 33. The control circuit 34 switches the selector 36 from the C side to the D side when the C signal of an even field is to be read based on the field information and the Y/C discrimination signal. As a result, the read address data inputted to the terminal '33 is shifted forward by one horizontal scanning line by the one line address subtracter 35, and the data is output to the terminal 37.

As a result, when the C signal of an even field is read out from the field memories 4 and 5, the cw multiplied signal CN signal is replaced.

On the other hand, when outputting an odd field signal and when outputting a Y signal, the selector 36 is switched to the C side, and the terminal 3
The read address data input to terminal 3 is sent directly to terminal 3.
Output to 7.

When the contents of the field memories 4 and 5 are read using the read address data outputted through the address correction circuit configured as shown in FIG. The arrangement of even field C signals stored in the same arrangement is the original even field C signal arrangement (α line is CN, α+1 line is Cw)
,,.

(array)), continuity between fields of the line-sequential color signal is obtained.

Note that the present invention is not limited to the above embodiments,
For example, in the above embodiment, two field memories are used as storage means, but one field memory may be used.

In addition, in the embodiment, the write address and read address of the C signal of the even field are shifted by one horizontal scanning line in the address correction circuits 9 and 11, but conversely, the write address and read address of the C signal of the odd field are shifted by one horizontal scanning line. It may be shifted by a scanning line. moreover,
The shift amount of the write address and the read address need not be equal to the horizontal scanning line, but may be an odd number of horizontal scanning lines. Further, the present invention also provides that the line-sequential color signal is, for example, C
W+ CW+ cNI cNI CW+ CW+ cN
The present invention can also be applied to a case where the same type of color signal is continuous for two horizontal scanning lines as in ICN + -. In that case, the shift amount of the write address and the read address may be set to an even number of horizontal scanning lines. In addition, the present invention can be implemented with various modifications without departing from the scope of the invention.

[Effects of the Invention] According to the present invention, when writing a color signal to a storage means for storing at least one field of a color video signal including a line-sequential color signal in which two types of color signals are made line-sequential, odd-numbered fields Alternatively, the writing address of the even field color signal is shifted by an odd number of horizontal scanning lines to ensure the continuity of the line sequential color signal within the field, and furthermore, the odd field or even field color signal is read out when reading from the storage means. By shifting the address by an odd number of horizontal scanning lines to ensure the continuity of line sequential color crystal numbers between fields, line sequential colors whose continuity has been lost due to special playback etc. in color line sequential VTRs can be used. It becomes possible to correctly reproduce the color signal from the signal, and a color special reproduction image can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a line-sequential color signal arrangement correction circuit according to an embodiment of the present invention, FIG. 2 is a block diagram showing the configuration of the write address address correction circuit in FIG. 1, and FIG. The figure is a block diagram showing the configuration of the address correction circuit for the read address in FIG. 1, and FIG. 4 is a diagram showing the arrangement of line-sequential color signals in the odd and even fields of the color television signal in the same embodiment.
Fig. 5 is a diagram showing the color signal arrangement on a segment when segment recording is performed using the color line sequential method, Fig. 6 is a diagram showing the head scan locus during double speed playback, and Fig. 7 is a diagram showing the head scan trajectory when performing segment recording in the color line sequential method. Figure 8 shows the reproduced signal in each scan.
FIG. 9 is a diagram showing details of the contents of the reproduced signal shown in FIG. 8, and FIG. 9 is a diagram showing the reproduced signal of FIG. 8 rearranged in order of horizontal scanning line number. 1. Color video signal input terminal, 2. Control circuit, 3
．． 6,7.12...Selector, 4,5...Field memory (storage means), 8...Write address generation circuit, 9...Address correction circuit, ]C0...Read address generation circuit, 1 ]...address correction circuit, 13...
- Color video signal output terminal, 21 - Y/C discrimination signal input terminal, 22 - Horizontal synchronization signal input terminal, 23 - Color index signal input terminal, 24 - Write address data input terminal, 25 - Odd field C1 / CN identification circuit,
26... Comparator, 27... Control circuit, 28... 1
Line address subtractor, 29...Selector, 30...
・Write address data output terminal, 31...Field information input terminal, 32...Y/C discrimination signal input terminal,
33...Read address data input terminal, 34-control circuit, 351 line address subtracter, 36-selector, 3
7...Read address data output terminal. Applicant's representative Patent attorney Takehiko Suzue KKK t-N(v') Umami Taste Lonely-□---□-■ L-

Claims (1)

[Scope of Claims] Storage means for storing at least one field of a color video signal including a line-sequential color signal in which two types of color signals are made line-sequential; Write address correction that shifts the write address of the color signal in the color video signal of either field or even field by an odd number of horizontal scanning lines with respect to the write address of the color signal in the color video signal of the other field. means, when reading a color video signal from the storage means, a read address of a color signal in the color video signal of either an odd field or an even field is set to an odd number of horizontal scanning lines with respect to a read address of the other field; What is claimed is: 1. A line-sequential color signal array correction circuit comprising: readout address correction means for shifting the line-sequential color signal by the same amount.