JPH0123989B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a DC reproducing circuit that can be used in a video demodulator such as a satellite television broadcasting receiver.

Conventional configurations and their problems Conventionally, circuits that remove low-frequency signals superimposed on television video signals or unnecessary low-frequency noise signals have often been used, especially in satellites that have recently been put into practical use. In the radio waves of television broadcasting, it is necessary to remove the triangular wave signal superimposed on the video signal as shown in FIG.

A DC regeneration circuit conventionally used for such purpose is shown in FIG.

In Figure 2, the base of transistor 1 is connected to the unregenerated DC component of the video signal at input terminal 2.
It is applied to the output of the emitter follower and is connected to the anode side of the clamp diode 4 via the capacitor 3 as an emitter follower output. The cathode side of the diode is connected to a bias circuit consisting of resistors 5 and 6 and a capacitor 7, which determines the magnitude of the DC component. The terminal of the capacitor 3 to which the clamp diode 4 is connected is further connected to a resistor 9 with a large resistance value exhibiting constant current characteristics and the base of a transistor 10, and a video signal whose DC component is reproduced is transmitted from the emitter of the transistor 10. It is taken out to the output terminal 11. Resistors 12, 13, 14, and 15 constitute a bias supply circuit for operating transistor 1 and transistor 10.

When attempting to remove the video signal including the low frequency signal shown in FIG. 1 by using the DC regeneration circuit shown in FIG. 2, since the forward impedance r _f of the clamp diode 4 is not ideally 0, Distortion occurred in the vertical synchronization signal part, and fluctuations occurred in DC playback due to the average gradation level (APL) of the video signal.

For example, input terminal 2 has the type shown in Figure 3a.
When a rectangular wave signal of wave height H with periods T ₁ and T ₂ is applied, the polarity of the rectangular wave signal is positive T ₁
During the period , the clamp diode 4 is "off" and the response waveform of a simple CR circuit consisting of the capacitor 3 and resistor 9 is shown. On the other hand, during the period _T2 , the clamp diode 4 is conductive and has r _f as a forward resistance. At this time, when an ideal clamp diode with r _f = 0 is used, the difference ΔV in the DC reproduction level in Figure 3b is approximately Q = ΔV, assuming that the charging and discharging charges of the capacitor 3, Q = it, are equal. /r _f T ₁ =H/RT ₂ is obtained.

Therefore, ΔV=r _f T ₂ /RT ₁ H In other words, the fluctuation ΔV of the DC reproduction level is the wave height H
This is caused by waveform periods T ₁ , T ₂ , etc.

On the other hand, in the video signal, as shown in FIG. 1, there is no video component in the vicinity of the vertical synchronization signal and there is only a synchronization signal component, and fluctuations in the DC reproduction level cause waveform distortion. In addition, the average gradation level (APL) of the video component depends on the content of the television signal being transmitted.
It changes significantly with changes in

Furthermore, in the case of a video signal containing a lot of noise as shown in Fig. 4a, when a conventional DC regeneration circuit is used, it has transient characteristics due to the change in r _f during the horizontal synchronization signal period, as shown in Fig. 4b. This is not preferable because it may cause a malfunction in the synchronization separation circuit of the television receiver.

OBJECT OF THE INVENTION The present invention eliminates the conventional drawbacks as mentioned above,
It is an object of the present invention to provide a DC regeneration circuit that is not affected by fluctuations in DC regeneration level due to input signals and can reduce noise components.

Structure of the Invention In the present invention, the emitter of a first transistor to which a video signal is applied to the base is grounded via a resistor, and the emitter of this first transistor is connected to a constant current source via a first capacitor. The emitter of a second transistor, whose base is connected to a bias circuit consisting of a capacitor and a resistor, is connected to the terminal of the capacitor connected to this constant current source, and the collector of this second transistor is connected to a DC current source through the resistor. the base of a third transistor having a different polarity is connected to the collector of the second transistor, the collector of the third transistor is connected to the first capacitor, and the emitter is connected to the DC power terminal; The emitter of the fourth transistor whose base is connected to the first capacitor is grounded via a resistor, and the emitter of the fourth transistor is used as an output terminal, so that the signal passes ideally during the DC regeneration period. By short-circuiting the terminals to the DC reproduction level, accurate DC reproduction can be performed.

DESCRIPTION OF EMBODIMENTS FIG. 5 shows a DC regeneration circuit in an embodiment of the present invention.

The DC component of the unregenerated video signal is applied as an input signal from the input terminal 16 and becomes the base input of the first transistor 17 . transistor 1
The emitter of 7 is grounded via a resistor 29 to form an emitter follower circuit, and the applied input signal is connected from the emitter terminal to a constant current source 25 via a capacitor 18, and a second transistor for clamping. Connected to 19 emitters.
The transistor 19 has a base voltage of the resistor 20,2.
It is kept constant by a bias circuit consisting of transistor 1 and capacitor 22, and furthermore, transistor 1
A resistor 23 is connected between the collector of the transistor 9 and the DC power supply terminal, and the base of a third transistor 24 having a different polarity is connected to the collector. The emitter of the transistor 24 is connected to the DC power supply terminal, and its collector is connected to the emitter of the transistor 19, that is, the capacitor 18 and the constant current source 2.
Connected to 5. Constant current source 25 is connected between ground. The fourth transistor 26 whose base is connected here outputs the signal as an emitter follower output from its emitter to the output terminal 27 as an output signal. Resistance 28, 29, 30
is a bias circuit for operating the transistors 17 and 26.

Here, the capacitor 18 blocks unnecessary low frequency components, and the transistor 19 detects the lower end of the voltage of the input signal. During the period when the voltage of the input signal is positive, no current normally flows through the transistor 19, and the resistors 20, 2
V ₁ of the bias circuit consisting of V 1 and capacitor 22 . However, when the lower end of the voltage of the input signal is detected, a current flows through the transistor 19, and a voltage is generated across the resistor 23 as a detection voltage. At this time, transistor 24 becomes active and raises the voltage at the emitter of transistor 19 to bias voltage _V1 . That is, the transistors 19 and 24 regenerate the DC component to _V1 .

In this way, in this circuit, the voltage amplified by the transistor 19 causes the transistor 24 to
Since the circuit is controlled by switching, there is no residual impedance corresponding to the short circuit impedance r _f , which is ideal when using a clamp diode.

Note that the constant current source 25 is for lowering the signal voltage that increases during the first field period in the video signal shown in FIG. 1, and may be realized by a high resistance value.

Thus, according to this circuit, the forward impedance that existed in the clamp diode in the conventional example is reduced.
r _f can be eliminated, and even if the ideal DC reproduction operation is performed and the video signal contains a noise signal, the noise signal will be short-circuited to ground during the horizontal synchronization signal period. Therefore, fluctuations in the DC reproduction level due to the noise can be eliminated.

FIG. 6 shows such an input signal a and an output signal b.

Effects of the Invention As described above, according to the present invention, by utilizing the switching operation of the transistor when reproducing the DC component of the video signal, the video signal can be reliably short-circuited to the DC reproduction level, and vertical synchronization can be achieved. Accurate DC reproduction can be performed without causing signal distortion near the signal or fluctuations in the DC reproduction level due to differences in video components. Further, even if the horizontal synchronization signal includes a noise signal, the noise component can be reduced, and there is an effect that malfunction of the deflection circuit of the television receiver can be prevented.

[Brief explanation of drawings]

Fig. 1 is a waveform diagram of a video signal including a triangular wave that requires DC regeneration, Fig. 2 is a circuit diagram of a conventional DC regeneration circuit, and Figs. 3 and 4 explain the operation of each conventional example. FIG. 5 is a circuit diagram of a DC regeneration circuit according to an embodiment of the present invention, and FIG. 6 is a waveform diagram for explaining the operation of the same circuit. 16...Input terminal, 17, 19, 24, 26...
...first, second, third, and fourth transistors, 1
8, 22... Capacitor, 25... Constant current source, 2
0, 21, 23, 24, 27, 29, 30...resistor, 31...output terminal.

Claims (1)

[Claims] 1. The emitter of a first transistor to which a video signal is applied to the base is grounded via a resistor, the emitter of the first transistor is connected to a constant current source via a first capacitor, and the capacitor and resistor are connected to the base. The emitter of a second transistor connected to a bias circuit consisting of the following is connected to the terminal of the capacitor connected to the constant current source, and the collector of this second transistor is connected to a DC power supply terminal via a resistor, The base of a third transistor having a different polarity is connected to the collector of this second transistor, the collector of this third transistor is connected to the first capacitor, the emitter is connected to a DC power supply terminal, and the collector of the third transistor is connected to the DC power supply terminal. A DC regeneration circuit in which the emitter of a fourth transistor whose base is connected to the ground is grounded via a resistor, and the emitter of the fourth transistor is used as an output terminal.