JPH01237467A - Measuring circuit of propagation delay time of semiconductor device - Google Patents

Abstract

PURPOSE:To enable the accurate measurement of a propagation delay time of a high-speed IC as well and to make a circuit small in size, by a method wherein a measuring circuit made of a logic gate is incorporated for measurement in an IC chip. CONSTITUTION:An IC chip 31, a circuit 31a to be measured in regard to a propagation delay time, and a measuring circuit 31b incorporated in the chip 31 and constructed of a logic gate, are provided. The propagation delay time of the circuit 31a is known by measuring a time difference between a pulse having a timing corresponding to the timing of an input pulse (IN) to the circuit 31a and a pulse having a timing corresponding to the timing of an output pulse (OUT) from the circuit 31a. In this case, only one kind of the input pulse (IN) needs to be outputted from a pulser 30, and a waveform of an IC having the circuit 31a and a waveform of a through IC do not need to be matched with each other with an oscilloscope 32. Even visibility errors do not occur. Moreover, no error occurs when the IC having the circuit 31a and the through IC are replaced with each other.

Description

[Detailed Description of the Invention] [Summary] This invention relates to a circuit that measures the propagation delay time (calculation time and access time) of a high-speed calculation IC, with an extremely simple circuit configuration.
In order to accurately measure propagation delay time with little measurement error, a measurement circuit consisting of logic gates is built into the IC chip, and the measurement circuit adjusts the timing of input pulses to the circuit under test. The configuration is such that a measurement pulse signal is obtained by ORing a pulse with a corresponding timing and a pulse with a timing corresponding to the timing of an output pulse from the circuit under test.

[Industrial application field]

The present invention relates to a circuit for measuring propagation delay time of a high-speed arithmetic IC.

In recent years, the calculation time of ICs has been steadily increasing, and in research on memory devices, devices with access times of 1 ns or less have been developed. In this case, the faster the calculation time, the less measurement errors will affect the measurement results, and the greater the influence will be.
.

In view of the current situation, it is necessary to accurately measure the propagation delay time of high-speed IIC without error.

[Conventional technology]

FIG. 5 is a diagram illustrating an example of a conventional propagation delay time measurement method. In the same figure (A), 1 is a pulsar, and channel 1
(CI-11), 2 (CI-(2>) outputs pulses respectively. 2 is an IC to be measured, and an IC depth 3 is provided to the right of the circuit whose propagation delay time is measured. 4 is an oscilloscope. Then, the propagation delay time Δtd of the IC chip 3 is visually measured from the displayed waveform.

In Fig. 5 (A>), the pulse output from channel CHI of pulser 1 is connected to coaxial cable 51,
The pulses are supplied to the IC chip 3 via the socket pin 61, package lead 71, and bonding wire 81, and the pulses output from here are sent to the bonding wire 82, package lead 72, socket pin 62, and coaxial cable 5.
2 to channel CI-11 of the oscilloscope 4, where it is displayed as waveform a. On the other hand, the channel CI of Pal4no1 obtained by the method described below
The pulses output from -12 are directly supplied to channel CH2 of oscilloscope 4 via coaxial cable 9,
It is displayed here as a waveform.

By visually measuring the time Δtd from the rise of the waveform displayed on the oscilloscope 4 to the rise of the waveform, the propagation delay time of the IC chip 3 can be determined.

By the way, the waveform displayed on the oscilloscope 4 in FIG. 5(A) is obtained by the method shown in FIG. 5(B). , oscilloscope 4,
Coaxial cables 5+, 52, and 9 are the same as those not shown in FIG. Reference numeral 10 denotes a waveform calibration IC, which is not equipped with a circuit and is provided with an IC deep 11 that is simply a through-hole.In FIG. The pulses output from the coaxial cable 51 and the socket pin 121 of the IC 10
, package 131, bonding wire 141, through IC depth 11, bonding wire 1/I2, package lead 132, and output 1-pin 122 to the oscilloscope 4, where it is displayed as waveform C. In other words, waveform C is not a waveform obtained by calculation in a circuit like IC depth 3 shown in FIG. This is a waveform that rises earlier by the calculation time Δtd of the circuit of the C chip.

Here, in FIG. 5(B), while looking at the waveform C@ displayed on the oscilloscope 4, the rise timing of the pulse waveform S supplied from the channel CH2 of the pulser 1 to the channel Cl-12 of the oscilloscope 4 is determined. C
Adjust to the rising timing of . This is done by adjusting the output timing of channel CH2 of pulser 1 (calibration of pulser 1). In FIG. 5(B), with the waveform displayed on the oscilloscope 4,
By replacing Cl0 with IC2 shown in FIG. 5 (A>), the waveform a of the pulse supplied to channel CI-11 is displayed.
11 shows the waveform a that has passed through the IC depth 3 where the circuit under test is installed, and channel CH2 shows the waveform a that has passed through the through IC depth 11 where the circuit under test is not installed. The propagation delay time Δtd of the IC chip 3 can be measured by looking at the time difference from the time to the rise of the waveform a. As described above, the method shown in FIG. 5 is currently a common method for measuring the propagation delay time of an IC in a semiconductor device.

[Problem to be solved by the invention]

Since the conventional method described above uses two pulses, channel CH1 and CH2, there is a problem that a timing error between channels CH1 and CH2 of pulser 1 adversely affects the measurement time. Also, in Fig. 5(B), when adjusting the waveform C to the oscilloscope]-14
There was a problem in that there was a visual error caused by this, which adversely affected the measurement time.

In addition to this, there are other problems as described below. The pulse output from channel CH1 of pulser 1 is output from IC2.
Or the time until it is input to ICl0 (coaxial cable 51
) is the propagation time of IC2, and the calculation time of IC2 is [d, IC
The through time of 10 is Δt, and the pulse output from IC2 or ICl0 is channel CH1 of oscilloscope 4.
(propagation time of @axis cable 52)
Let tt2 be I C2(1)jJIgoha('jt
+ +td+jc2) It takes time and -force- IC
In the case of 10, it takes (tj!, 1+Δt+tL2') time.

Since the difference at the rise of each waveform in these two cases is measured using the oscilloscope 4, the time difference is (t4 + -1-td-1-tt 2) -゛(j
L + + Δt 10'tl 2 ) = td - 8t, which means that instead of measuring the propagation delay time td of IC2, we are measuring time (td - Δt), and the error time of Δt due to the through wire is measured. It is occurring.

Since this error time Δt is, for example, about 50 ps, it does not pose much of a problem in a relatively low-speed IC where the computation time is about 10,000 ps, but the computation time is about 50 ps, for example.
In an IC with a relatively high speed of about 00 ps, this value cannot be ignored, and there was a problem that accurate propagation delay time could not be measured.

Therefore, as a circuit that can relatively accurately measure propagation delay time with few errors as described above, we have developed a propagation delay circuit constructed using a Josephson element, which is used not in the field of semiconductor devices but in the field of superconductivity. A load measuring circuit is known. Since the Josephson element is a high-speed calculation element,
It is necessary to measure propagation delay time with high precision.

FIG. 6 is a circuit diagram of a conventional measuring circuit using a Josephson element, and FIG. 7 is an operation timing chart thereof. In the figure, reference numeral 20 denotes a measurement circuit made up of Josephson elements, and a circuit to be measured 21 made up of Josephson elements. The input pulse IN that entered the terminal 22 (Fig. 7 (A)
) is the output pulse OUT (7th
The AND gate 23 has the clock CLKI (FIG. 7(C)) as a bias source.
Here, it is ANDed with the clock CLKI, and pulse A (FIG. 7(E)) is taken out.

In this case, the Josephson element is a latch element, so
The output of the AND gate 23 remains at H level until CL K1 goes to L level. - On the other hand, the output pulse OUT of the circuit under test 20 is connected to the bias source using the clock CLK.
2 (same period as input pulse IN, clock CL
, K with twice the frequency of 1) (FIG. 7(D)), where the clock CL
It is ANDed with K2 and pulse B (FIG. 7(F)) is extracted.

Pulse A and pulse B use clock CLK2 as a bias source.
The signal is supplied to the OR gate 25 having an OR value, and the OR gate 25 performs an OR operation, and a pulse C (FIG. 7(G)) is taken out. Here, pulse C
is input to an oscilloscope (not shown), and the clock C
By sweeping the waveform of pulse C using a pulse synchronized with LK2 as a trigger, waveforms C1 and C2 of pulse C can be displayed in an overlapping manner as shown in FIG. In this case, based on the trigger timing, the difference between the time from the first trigger to the rise of waveform C1 and the time from the second trigger to the rise of waveform C2 indicates the propagation delay time of the circuit under test 20. , Therefore, from the rising edge of waveform C1 in FIG. 8 to waveform C2
The time until the rise of is the propagation delay time.

This device does not require two pulses from the pulser 1 as shown in FIG. 5, and also does not require visually aligning the timing of two waveforms from the oscilloscope 4 as shown in FIG. 5(B). Moreover, since there is no error time Δt as explained in FIG. 5(B), the propagation delay time can be measured more accurately than the method shown in FIG.

However, in this case, the clock CLK is applied to gates 23 to 25.
1. CLK2 is required, the circuit cannot be constructed in a small size and at low cost, and the oscilloscope 4 requires a tongue operation to sweep two waveforms, making measurement difficult.

SUMMARY OF THE INVENTION An object of the present invention is to provide a propagation delay time measuring circuit for a semiconductor device that can accurately measure propagation delay time with a very simple circuit configuration and with less measurement error.

[Failure to solve the problem]

FIG. 1 shows a diagram of the principle of the present invention. In the figure, 31 is an IC depth, and 31a is a circuit under test whose propagation delay time is measured. 31b is a measurement circuit composed of logic gates,
Built into the IC chip 31, the circuit under test 31a
A measurement pulse signal is obtained by ORing a pulse with a timing corresponding to the timing of the input pulse (IN) to the circuit 31a and a pulse with a timing corresponding to the timing of the output pulse (OUT) from the circuit under test 31a. 1゜〔
Effect] By measuring the time difference between a pulse whose timing corresponds to the timing of the input pulse (IN>) and a pulse whose timing corresponds to the timing of the output pulse <ou-r>, it is possible to determine the propagation of the circuit under test 31a. The delay time can be known. In this case, the input pulse (IN) is a pulse.
(Channel C) - 11) Only one node is required to be output, and there is no problem of time error occurring between channels CH1 and CH2 of the pulse 4 nodes.
There is no need to match the C waveform and the through IC waveform with an oscilloscope, and there is no diopter error problem 1:). In addition, there is no error (the above-mentioned Δt) that occurs when the circuit under test is replaced with a right-centered IC and a through-center IC. on the other hand,
Unlike measurement circuits using Josephson elements, which do not require a clock as a bias source, the circuit can be easily configured. Also, measurement is easy because there is no need to sweep two waveforms using an oscilloscope. Example] FIG. 2 shows a schematic configuration diagram of an embodiment of the circuit of the present invention.

In the figure, 30 is a pulser which outputs pulses from channel CH1. Only one pulse is required from pulse 30. Reference numeral 31 is an IC chip, on which a circuit to be measured 31a and a measuring circuit 31b are formed. 32 is an oscilloscope that visually measures the time difference between the pulse waveform S1 output from the Ic chip 31 and 82.

FIG. 3 shows a specific circuit diagram of the measuring circuit 31b in FIG. 2, and FIG. 4 shows its operation timing diagram. In FIG. 2, pulses output from channel CH1 of the pulse 30 are supplied to the circuit under test 31a and the measuring circuit 31b of the IC chip 31 via the coaxial cable 4,0+, and in the measuring circuit 31b, The signal is supplied to the terminal 33 shown in FIG. Input pulse IN entering terminal 33 (Fig. 4 (A)
)) is supplied as it is to Ando Goo 1 to 34 as pulse C (Fig. 4 (C)), while it is inverted by inverter 35 and pulse d (Fig. 4 (D)) (R delay of inverter 35) 1-34
is supplied to ANDGOO 1 to 34, and the pulse e (FIG. 4(F)) is outputted with a delay of ANDGOO 1 to 34.

On the other hand, the output pulse OUT (FIG. 4 (B)) (which is extended by the calculation time from the input pulse IN shown in FIG. 4 (A)) to the circuit under test 31a is The output pulse 0UT (FIG. 4(B)) input to the terminal 36 is supplied to the terminal 36 of the terminal 36.
(FIG. 4 (G)) is supplied to AND GO 1 to 37, while it is inverted by the inverter 38 and pulse f (fourth
()) (divided by the delay time of the inverter 38 and output) is supplied to ANDGOO 1 to 37, is ANDed at 37 to ANTOG 1, and is pulsed h (FIG. 4 ()).
+-1)) (output is delayed by the delay of the AND gate 37).

Pulse e and pulse h are ORed by OR gate 39 to become pulse i (FIG. 4 (1)) (output delayed by the delay of OR gate 39), which is sent to oscilloscope 32 via coaxial cable 402. It is fed to channel CHI and displayed here.

Here, the rising timing of waveform S+ of pulse i corresponds to the rising timing of input pulse IN, while the rising timing of waveform S2 corresponds to the rising timing of output pulse OUT, so the waveform By visually measuring the time until the rise of S2, the propagation delay time of the circuit under test 31a of the IC chip 31 can be determined. In this case, the delay time from the rising edge of the input pulse IN to obtaining the pulse eJfi and the delay time from the rising edge of the output pulse OUT to obtaining the pulse h are the same since the same circuit is used for both paths. They are the same, and this delay time has no bearing on the measurement of the desired propagation delay time.

In this embodiment, the pulses from pulser 30 are channel C
Since only one pulse of 141 is used, the timing error between channels of the pulser as in the conventional example shown in FIG. 5 is irrelevant, and the timing error on the oscilloscope as in the conventional example in FIG. Since there is no need to visually match the waveforms, there is no visual error, and as a result, the propagation delay time can be measured more accurately than in the conventional example. Furthermore, unlike the conventional example shown in Fig. 5, the IC with the circuit under test and the through IC are not replaced for measurement, so the error time △[ due to the through wire as in the conventional example is irrelevant. .

On the other hand, in this embodiment, unlike the measurement circuit using the Josephson element shown in FIG. Can be configured at low cost. Also, unlike the circuit shown in FIG. 6, there is no need to supply two waveforms to the oscilloscope and sweep them, and the measurement is as simple as @A.

In addition, the input pulse 19 received at the terminal 33 and the output pulse obtained at the terminal 36 are supplied to channels Cl-11 and Cl-12 of the oscilloscope via coaxial cables, respectively, to display two waveforms. , it is possible to know the propagation delay time of the IC by measuring the rise timing difference between them.
The difference between the characteristics for the cable and the characteristics for the channel Cl-12 directly becomes an error that affects the measurement results.Also, since two coaxial cables are used, it is difficult to adjust their length and impedance. I don't like it at all.

In addition, as shown in FIG. 2, the measurement circuit 31b is
The reason for incorporating the measurement circuit 3jb into the circuit 1 is that if the measurement circuit 3jb is placed outside, long cables will be required from the circuit under test 31a to the measurement circuit 31b, making it difficult to adjust the length and impedance. , the distance from terminal 33 to impark 35° and gate 34 and terminal 36
This is because the path between the inverter 38 and the AND GO 1 to 37 can be formed finely in μm units, and errors can be made extremely small.

〔Effect of the invention〕

As explained above, according to the present invention, one type of input pulse is enough, so compared to the conventional example, it is independent of the time error between each channel of the pulsar, and it can be used on an oscilloscope like the conventional example. Since there is no need for waveform matching, it is possible to eliminate diopter errors of the oscilloscope, and there is also no error caused by replacing the IC with the circuit under test with the through IC, which is the case with conventional examples. The propagation delay time can be accurately measured even for high-speed ICs. Furthermore, compared to conventional measurement circuits using Josephson elements, it does not require a clock, which allows the circuit to be made smaller and at lower cost.Furthermore, it is not necessary to sweep two waveforms using an oscilloscope. Easy to measure.

[Brief explanation of the drawing]

Figure 1 is a diagram of the principle of the present invention, Figure 2 is a schematic configuration diagram of an embodiment of the circuit of the present invention, Figure 3 is a specific circuit diagram of the measurement circuit in Figure 2, and Figure 4 is the same as Figure 3. Figure 5 is a diagram explaining the conventional measurement method; Figure 6 is a circuit diagram of a conventional measurement circuit using a Josephson element; Figure 7 is a diagram of the circuit shown in Figure 6. Operation Timing Chart FIG. 8 is a diagram showing waveforms obtained by an oscilloscope using the circuit shown in FIG. 6. In the figure, 30 is a balsa, 31 is an IC chip, 31a is a circuit under test, 31b is a measurement circuit, 32 is an oscilloscope, 33 is an input pulse input terminal, 34.37 is an AND gate, 35.38 is an inverter, 36 is an output Pulse input terminals, 3 are OR gates, 40+ and 40z are coaxial cables. (A) 11□Ah. xsha□ (1) Figure 3 He Propagation delay time −−1 ! (Computation time)! Figure 4: Operation timing chart of the circuit shown in Figure 3

Claims (1)

[Claims] A propagation delay time of a semiconductor device in which the propagation delay time of a circuit under test (31a) of an IC chip (31) is measured from the pulse timing of a measurement pulse signal output from the IC chip (31). In the measurement circuit, a measurement circuit (31b) composed of logic gates is built into the IC chip (31), and the measurement circuit (31b) is configured to measure the circuit under test (31a).
A measurement pulse obtained by ORing a pulse whose timing corresponds to the timing of the input pulse (IN) to the circuit and a pulse whose timing corresponds to the timing of the output pulse (OUT) from the circuit under test (31a). A propagation delay time measuring circuit for a semiconductor device, characterized in that it has a configuration for obtaining a signal.