JPH01235262A - Amplifier element device - Google Patents

Amplifier element device

Info

Publication number
JPH01235262A
JPH01235262A JP6156088A JP6156088A JPH01235262A JP H01235262 A JPH01235262 A JP H01235262A JP 6156088 A JP6156088 A JP 6156088A JP 6156088 A JP6156088 A JP 6156088A JP H01235262 A JPH01235262 A JP H01235262A
Authority
JP
Japan
Prior art keywords
active element
cover
board
substrate
cooling unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6156088A
Other languages
Japanese (ja)
Inventor
Yasuhiro Fujii
康弘 藤井
Toshio Abiko
安彦 利夫
Hideji Nunotani
布谷 秀嗣
Katsuya Tsukamoto
塚本 活也
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP6156088A priority Critical patent/JPH01235262A/en
Publication of JPH01235262A publication Critical patent/JPH01235262A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To lower a noise factor of an active element, by packaging the active element on the top face of a board, attaching a cover within which a vacuum is established on the board so as to cover the active element and providing a thermoelectric cooling unit for cooling the active element on the bottom face of the board. CONSTITUTION:An active element 2 such as GaAs FET or the like is packaged on the top surface of a board 1 of a material having good heat conductivity such as ceramics or glass. The active element 2 has three leads. The active element 2 is covered with a cover 4 within which a vacuum is established. An thermoelectric cooling unit 5 utilizing the Peltier effect is secured closely to the bottom face of the board 1 directly under the active element 1. The thermoelectric cooling unit 5 has supply lines 6 for cooling elements. The cover 4 used herein is previously shaped into desired configurations and bonded to the board 1. A hole for drawing air is formed in a part of the cover 4. Air is drawn through the hole and the inside of the cover is sealed. If the cover 4 is of glass, it is fusion bonded to the board 1 and the air drawing hole is also thermally fusion bonded.

Description

【発明の詳細な説明】 [産業上の利用分野1 本発明は、特にマイクロ波帯における低雑音の増幅器等
に使用する増幅素子装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field 1] The present invention relates to an amplification element device used in a low-noise amplifier, etc., particularly in the microwave band.

[従来の技術1 例えば、最近、日本でも始まった衛星放送受信用アンテ
ナ等において、その受信性能は、ダウンフンバータ(以
後L N B [Low No1se Block d
amnconverterl と称す)まで含めたアン
テナ性能指数G/Tで評価する。ここで、G/Tは以下
の式%式% ただし、G:アンテナ利得 Ta:アンテナ等価熱雑音 α:アンテナ給電損失 To:周囲温度 F:LNHの雑音指数 上式において、(F−1)T、の項はLNBで発生 ・
する雑音の等価温度である。上式から明らかなように、
LNBの雑音指数NFは大きな影響を持つ。
[Conventional technology 1] For example, in satellite broadcasting receiving antennas, which have recently been introduced in Japan, the reception performance is based on the Down-Funverter (hereinafter referred to as L N B [Low No.1se Block d
The evaluation is based on the antenna performance index G/T, which includes up to (referred to as amnconverterl). Here, G/T is the following formula % Formula % However, G: Antenna gain Ta: Antenna equivalent thermal noise α: Antenna feeding loss To: Ambient temperature F: Noise figure of LNH In the above formula, (F-1)T The term , occurs in LNB ・
is the equivalent temperature of the noise. As is clear from the above formula,
The noise figure NF of the LNB has a large influence.

例えば、アンテナ温度が 程度で、アンテナ利得が33dBiのとき、NF=2d
BのLNBでは、G/T−9,4[dB/Klであるが
、NF=1dBとすると、G/T#11,7(dB/K
lと2dB以上の改善が見込めることになる。
For example, when the antenna temperature is 33dBi and the antenna gain is 33dBi, NF=2dBi
In LNB of B, G/T-9,4[dB/Kl, but if NF=1dB, G/T#11,7(dB/Kl).
This means that an improvement of 2 dB or more can be expected.

ここで、LNBのNFは良く知られるように、用いる増
幅素子(例えば、GaAsFETやHEMT)のNFで
決定づけられる。特に、 (NF=101ogF) Fi : i段目の増幅器の雑音指数 Gi:i段目の増幅器の利得 の関係より、初段の増幅器の雑音指数に大軽く起因する
ことが分かる。従って、特に初段の増幅器に用いる増幅
素子のNFを低減すれば良いことになる。ここで、一般
にNFは温度が低いほど良好なことが知られている。
Here, as is well known, the NF of the LNB is determined by the NF of the amplification element (eg, GaAsFET or HEMT) used. In particular, (NF=101ogF) Fi: Noise figure of the i-th amplifier Gi: From the relationship of the gain of the i-th stage amplifier, it can be seen that this is largely caused by the noise figure of the first-stage amplifier. Therefore, it is sufficient to reduce the NF of the amplifying element used in the first stage amplifier in particular. Here, it is generally known that the lower the temperature, the better the NF.

【発明が解決しようとする創[ 本発明は、上述の点に鑑みて提供したものであって、低
雑音の能動素子を実現することを目的とした増幅素子装
置を提供するものである。
[Problems to be Solved by the Invention] The present invention has been provided in view of the above-mentioned points, and provides an amplification element device for realizing a low-noise active element.

[課題を解決するための手段] 1作 用] 本発明は、基板上面に能動素子を実装し、該能動素子を
覆い内部を真空としたカバーを基板上面に取着し、基板
下面に上記能動素子を冷却する電子冷却部を設けること
により、電子冷却部で能動素子を冷却して、該能動素子
の雑音指数を低減したことを特徴とするものである。
[Means for Solving the Problems] 1 Effect] The present invention mounts an active element on the upper surface of a substrate, attaches a cover that covers the active element and makes the inside a vacuum, and mounts the active element on the lower surface of the substrate. The present invention is characterized in that by providing an electronic cooling section for cooling the element, the electronic cooling section cools the active element and reduces the noise figure of the active element.

[実施例] 以下、本発明の実施例を図面を参照して説明する。第1
図は破断斜視図を示し、第2図はm面図を示している。
[Example] Hereinafter, an example of the present invention will be described with reference to the drawings. 1st
The figure shows a cutaway perspective view, and FIG. 2 shows an m-plane view.

例えば、熱伝導の良いセラミック、ガラス等から構成さ
れる基板1の上面には、GaAsFETあるいはHEM
T等の能動索子2が実装しである。また、能動素子2に
は3本のり−ド3がある。この能動素子1を覆うカバー
4が基@iに取着されている。このカバー4の内部は真
空にしている。能動素子2の真下の基板1の下面にはペ
ルチヱ効果を利用した電子冷却部5を密着せしめている
。電子冷却部5には冷却素子用の電[16が導出しであ
る。ここで、カバー4は予め所望の形状に成形したもの
を基板1に接着し、カバー4の一部に真空引き用の穴を
設け、該穴より真空にし、封止するようにしている。ま
た、カバー4が〃う大の場合、基板1に融着し、更に真
空引き用穴も熱融着するようにしている。また、真空に
した製作用のベルシェア内で、基板1にカバー4を取り
付けても良い。基板1として上述のように熱伝導の良い
セラミック等を用い、カバー4の内部を真空としている
ことで、能動素子2を効率良く冷却することができる。
For example, on the top surface of the substrate 1 made of ceramic, glass, etc. with good thermal conductivity, a GaAsFET or HEM
An active cord 2 such as T is mounted. Further, the active element 2 has three boards 3. A cover 4 covering the active element 1 is attached to the base @i. The inside of this cover 4 is kept in a vacuum. An electronic cooling section 5 utilizing the Peltier effect is brought into close contact with the lower surface of the substrate 1 directly below the active element 2. The electronic cooling unit 5 is led out by a cooling element electric current [16]. Here, the cover 4 is previously formed into a desired shape and adhered to the substrate 1, and a hole for evacuation is provided in a part of the cover 4, and a vacuum is applied through the hole to seal it. If the cover 4 is large enough, it is fused to the substrate 1 and the vacuum hole is also heat fused. Further, the cover 4 may be attached to the substrate 1 in a vacuumed Belshare for manufacturing. By using ceramic or the like with good thermal conductivity as the substrate 1 as described above and by creating a vacuum inside the cover 4, the active element 2 can be efficiently cooled.

第3図はチップ形状のままの能動素子2を基板1に実装
した場合を示し、該チップ形状の能動素子2と基板1上
に形成されたパターン7とをリード線8で接続したもの
である。この構成では能動素子2の冷却をより効率的に
行なうことができるものである。
FIG. 3 shows a case where an active element 2 in a chip shape is mounted on a substrate 1, and the chip-shaped active element 2 and a pattern 7 formed on the substrate 1 are connected by a lead wire 8. . With this configuration, the active element 2 can be cooled more efficiently.

第4図は、カバー4の内面を金属蒸着して金属部9を形
成したものであり、これによりシールド効果を持たせて
いる。ここで、金属部分は接地し、一部信号線路には触
れないようにしである。
In FIG. 4, a metal portion 9 is formed by depositing metal on the inner surface of the cover 4, thereby providing a shielding effect. Here, the metal parts are grounded and some of them are kept from touching the signal lines.

また、図示するように信号線が通る部分には金属蒸着は
していない(図中(イ))。金属蒸着の代わりに金属箔
でも良い。
Furthermore, as shown in the figure, there is no metal vapor deposition on the part where the signal line passes ((a) in the figure). Metal foil may be used instead of metal vapor deposition.

以上の構成により、例えば平面アンテナの増幅器等に用
いる能動素子2の温度を下げることが可能になり、この
装置を用いた回路のNFの低減ができるものであゐ。
With the above configuration, it is possible to lower the temperature of the active element 2 used in, for example, an amplifier of a planar antenna, and it is possible to reduce the NF of a circuit using this device.

【発明の効果1 本発明は上述のように、基板上面に能動素子を実装し、
該能動素子を覆い内部を真空としたカバーを基板上面に
取着し、基板下面に上記能動素子を冷却する電子冷却部
を設けたものであるから、該電子冷却部により能動素子
を冷却することで、能動素子の雑音指数を低減すること
ができる効果を奏するものである。°従って、該装置を
用いて雑音指数の低減を可能とする増幅回路を実現する
ことができるものである。
[Effect of the invention 1] As described above, the present invention mounts active elements on the top surface of the substrate,
A cover that covers the active element and has a vacuum inside is attached to the upper surface of the substrate, and an electronic cooling section for cooling the active element is provided on the lower surface of the substrate, so that the active element can be cooled by the electronic cooling section. This has the effect of reducing the noise figure of the active element. Therefore, using this device, it is possible to realize an amplifier circuit that can reduce the noise figure.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例の破断斜視図、第2図は同上の
断面図、第3図は同上の能動素子をチップ形状とした場
合の断面図、14図は同上の内面を金属蒸着した場合の
カバーの断面図である。 1は基板、2は能動素子、4はカバー、5は電子冷却部
である。 代理人 弁理士 石 1)艮 七 −N寸硝 手続補正書く自発) 1.事件の表示 昭和63年特許a第61560号 2、発明の名称  ・ 増幅素子装置 3、補正をする者 事件との関係  特許出願人 住 所 大阪府門轟市大字門真1048番地名称(58
3)松下電工株式会社 代表者  三 好 俊 夫 4、代理人 郵便番号 530 5、補正命令の日付 【1] 本願明細書の第4頁第12行目の「3本」を「
通常4本」と訂正する。 代理人 弁理士 石 1)艮 七
Fig. 1 is a cutaway perspective view of an embodiment of the present invention, Fig. 2 is a cross-sectional view of the same as above, Fig. 3 is a cross-sectional view of the same active element in the form of a chip, and Fig. 14 is a metal vapor deposited inner surface of the same as above. FIG. 3 is a cross-sectional view of the cover when 1 is a substrate, 2 is an active element, 4 is a cover, and 5 is an electronic cooling unit. Agent Patent Attorney Ishi 1) Ai 7-N Sunshi (Volunteer to write amendments) 1. Indication of the case 1988 Patent A No. 61560 2, Title of the invention ・ Amplifying element device 3, person making the amendment Relationship to the case Patent applicant address Name of 1048 Kadoma, Kadoma, Mondoro City, Osaka Prefecture (58
3) Matsushita Electric Works Co., Ltd. Representative Toshio Miyoshi 4, agent postal code 530 5, date of amendment order [1] "3" on page 4, line 12 of the specification of the application is replaced with "
"Normally four," he corrected. Agent Patent Attorney Ishi 1) Ai Shichi

Claims (2)

【特許請求の範囲】[Claims] (1)基板上面に能動素子を実装し、該能動素子を覆い
内部を真空としたカバーを基板上面に取着し、基板下面
に上記能動素子を冷却する電子冷却部を設けて成る増幅
素子装置。
(1) An amplification element device comprising an active element mounted on the upper surface of a substrate, a cover covering the active element with a vacuum inside, attached to the upper surface of the substrate, and an electronic cooling unit provided on the lower surface of the substrate to cool the active element. .
(2)上記カバーの内面を金属蒸着あるいは箔を付加し
た請求項1記載の増幅素子装置。
(2) The amplification element device according to claim 1, wherein the inner surface of the cover is metal-deposited or coated with foil.
JP6156088A 1988-03-15 1988-03-15 Amplifier element device Pending JPH01235262A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6156088A JPH01235262A (en) 1988-03-15 1988-03-15 Amplifier element device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6156088A JPH01235262A (en) 1988-03-15 1988-03-15 Amplifier element device

Publications (1)

Publication Number Publication Date
JPH01235262A true JPH01235262A (en) 1989-09-20

Family

ID=13174620

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6156088A Pending JPH01235262A (en) 1988-03-15 1988-03-15 Amplifier element device

Country Status (1)

Country Link
JP (1) JPH01235262A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5818052A (en) * 1996-04-18 1998-10-06 Loral Fairchild Corp. Low light level solid state image sensor
CN105515449A (en) * 2016-01-24 2016-04-20 河南鸿昌电子有限公司 Semiconductor power device for taking over waste heat

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5818052A (en) * 1996-04-18 1998-10-06 Loral Fairchild Corp. Low light level solid state image sensor
CN105515449A (en) * 2016-01-24 2016-04-20 河南鸿昌电子有限公司 Semiconductor power device for taking over waste heat

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