JPH01230258A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH01230258A JPH01230258A JP5581988A JP5581988A JPH01230258A JP H01230258 A JPH01230258 A JP H01230258A JP 5581988 A JP5581988 A JP 5581988A JP 5581988 A JP5581988 A JP 5581988A JP H01230258 A JPH01230258 A JP H01230258A
- Authority
- JP
- Japan
- Prior art keywords
- glass
- lead wires
- thermistor
- semiconductor device
- lead wire
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 24
- 238000004519 manufacturing process Methods 0.000 title claims description 10
- 239000011521 glass Substances 0.000 claims abstract description 29
- 238000005219 brazing Methods 0.000 claims abstract description 10
- 229910052751 metal Inorganic materials 0.000 claims abstract description 8
- 239000002184 metal Substances 0.000 claims abstract description 8
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims description 14
- 239000000463 material Substances 0.000 claims description 6
- 238000000034 method Methods 0.000 claims description 6
- 239000011248 coating agent Substances 0.000 abstract description 4
- 238000000576 coating method Methods 0.000 abstract description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 abstract description 3
- 229910052799 carbon Inorganic materials 0.000 abstract description 3
- 239000002253 acid Substances 0.000 abstract description 2
- 230000006866 deterioration Effects 0.000 abstract description 2
- 238000007789 sealing Methods 0.000 abstract description 2
- 239000000945 filler Substances 0.000 abstract 2
- 150000002739 metals Chemical class 0.000 abstract 2
- 239000000919 ceramic Substances 0.000 description 6
- 238000010304 firing Methods 0.000 description 3
- 239000003973 paint Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 239000002002 slurry Substances 0.000 description 2
- 239000011230 binding agent Substances 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000007606 doctor blade method Methods 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 229910052748 manganese Inorganic materials 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000001238 wet grinding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は半導体装置の製造方法に関し、特に半導体素
子がガラス封入された、たとえばラジアルタイプのリー
ド線付半導体装置の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a lead wire-equipped semiconductor device of a radial type in which a semiconductor element is sealed in glass.
この種の製造方法の一例が、たとえば特公昭５２−７５
３５公報において開示されている。この従来技術は、サ
ーミスタ素子をガラス容器に封入する際の加熱によって
、サーミスタ素子の電極材料である導電性塗料の焼付を
行うようにし、ガラス封入とリード線およびサーミスタ
素子の接続固定とを同時に行う方法である。An example of this type of manufacturing method is, for example,
It is disclosed in Publication No. 35. In this conventional technology, conductive paint, which is the electrode material of the thermistor element, is baked by heating when the thermistor element is sealed in a glass container, and the glass encapsulation and the connection and fixation of the lead wire and the thermistor element are simultaneously performed. It's a method.
従来の製造方法では、ガラス封入するときに導電性塗料
の焼付も同時に行うので、導電性塗料からのガスが発生
し、そのガスがガラス内に気泡ないしボイドして残るこ
とがあった。このように、ガラス内にボイドが残ると、
ガラス内部に空気や湿気が侵入してサーミスタの耐湿性
が著しく低下し、特に、高温域における安定性が経時的
に低下してしまうという問題があった。In conventional manufacturing methods, the conductive paint is baked at the same time as the glass is sealed, so gas from the conductive paint is generated and this gas may remain in the glass as bubbles or voids. In this way, if voids remain in the glass,
There was a problem in that air and moisture entered the inside of the glass, resulting in a significant decrease in the moisture resistance of the thermistor, and in particular, the stability in a high temperature range decreased over time.
それゆえに、この発明の主たる目的は、耐湿性が向上し
、安定性に優れたリード線付半導体装置が得られる、半
導体装置の製造方法を提供することである。Therefore, the main object of the present invention is to provide a method for manufacturing a semiconductor device, which can obtain a lead wire-equipped semiconductor device with improved moisture resistance and excellent stability.
この発明は、金属ろう材でコーティングされたリード線
を半導体素子の電極にろう付けし、次いで半導体素子と
リード線の一部とをガラス容器に封入するようにした、
半導体装置の製造方法である。In this invention, a lead wire coated with a metal brazing material is brazed to an electrode of a semiconductor element, and then the semiconductor element and a part of the lead wire are enclosed in a glass container.
This is a method for manufacturing a semiconductor device.
半導体素子の電極には、金属ろう材がコーティングされ
たリード線（たとえばジュメット線）が予めろう付けさ
れる。その後、リード線の一部が半導体素子とともに封
入されるように、半導体素子をガラスで封入する。たと
えば、リード線をろう付けした半導体素子がガラス管に
入れられ、そのガラス管の両端開口をたとえばカーボン
ヒータによって溶融することによって半導体素子をガラ
ス封入して、ラジアルタイプのリード線付半導体装置が
得られる。Lead wires (for example, Dumet wires) coated with a metal brazing material are brazed to the electrodes of the semiconductor element in advance. Thereafter, the semiconductor element is encapsulated with glass so that a portion of the lead wire is encapsulated together with the semiconductor element. For example, a semiconductor device with lead wires soldered to it is placed in a glass tube, and the openings at both ends of the glass tube are melted using, for example, a carbon heater to encapsulate the semiconductor device in glass to obtain a radial-type lead wire equipped semiconductor device. It will be done.
この発明によれば、リード線を半導体素子の電極にろう
付けした後に、半導体素子をガラス封入するので、ガラ
ス封入時に従来の方法のようにガスが発生しないので、
ガラス内部にボイドのような欠陥が残ることがない。し
たがって、ボイドによる耐湿性、耐酸性の劣化ないし低
下を防止することができ、特に高温域においても非常に
安定性のよい半導体装置が得られる。According to this invention, since the semiconductor element is encapsulated in glass after the lead wires are brazed to the electrodes of the semiconductor element, gas is not generated during glass encapsulation unlike in the conventional method.
No defects such as voids remain inside the glass. Therefore, deterioration or reduction in moisture resistance and acid resistance due to voids can be prevented, and a semiconductor device with very good stability especially in a high temperature range can be obtained.
この発明の上述の目的、その他の目的、特徴および利点
は、図面を参照して行う以下の実施例の詳細な説明から
一層明らかとなろう。The above objects, other objects, features and advantages of the present invention will become more apparent from the following detailed description of embodiments with reference to the drawings.
〔実施例］
第１図〜第３図はこの発明の一実施例を示す図解図であ
る。なお、以下においては、この発明がサーミスタの製
造に適用されたものとして説明されるが、この発明は、
他の任意の半導体素子を用いる半導体装置の製造方法に
も等しく適用できることを予め指摘しておく。[Embodiment] FIGS. 1 to 3 are illustrative views showing an embodiment of the present invention. In addition, although this invention will be explained below as being applied to the manufacture of a thermistor, this invention
It should be pointed out in advance that the present invention is equally applicable to a method of manufacturing a semiconductor device using any other semiconductor element.
第１図を参照して、両面に電極１４が付与されたサーミ
スタ素子１２を、たとえば以下の方法によって準備する
。Referring to FIG. 1, a thermistor element 12 having electrodes 14 provided on both surfaces is prepared, for example, by the following method.
Ｍｎ、Ｎｉ、ＣｏおよびＡｆ等の酸化物を所定の割合で
配合し、ボールミルなどによって湿式混合する。その後
、それを脱水して乾燥させた後、８５０°Ｃで２時間程
度仮焼する。湿式粉砕後、蒸発乾燥させ、それに有機バ
インダを添加してスラリ状にする。そのようにして得ら
れたセラミックスラリをドクタブレード法によって塗布
し、厚さ２００μｍのセラミック生シートを形成する。Oxides such as Mn, Ni, Co, and Af are blended in predetermined proportions and wet mixed using a ball mill or the like. Thereafter, it is dehydrated and dried, and then calcined at 850°C for about 2 hours. After wet grinding, it is evaporated and dried, and an organic binder is added thereto to form a slurry. The ceramic slurry thus obtained is applied by a doctor blade method to form a green ceramic sheet with a thickness of 200 μm.
セラミック生シートを、たとえば２７Ｘ３６ｍｍの大き
さにカントし、そのカットされたシートを３枚重ねて熱
圧着し、厚さ５００μｍ程度のセラミック生シートを得
る。A raw ceramic sheet is cut into a size of, for example, 27 x 36 mm, and three of the cut sheets are stacked and thermocompressed to obtain a raw ceramic sheet with a thickness of about 500 μm.
次いで、厚さ５００μｍのセラミック生シートの両面に
は、電極１４となるべきＡｕあるいはＰｔ系の導電ペー
ストが塗布され、１２００〜１３００°Ｃで２時間程度
焼成される。焼成を終えたセラミックシートを０．５８
角にカットして、第１図に断面図を示すようなサーミス
タ素子１２を得る。Next, an Au or Pt-based conductive paste that will become the electrodes 14 is applied to both surfaces of the 500 μm thick ceramic raw sheet, and fired at 1200 to 1300° C. for about 2 hours. Ceramic sheet after firing is 0.58
A thermistor element 12 as shown in cross-section in FIG. 1 is obtained by cutting into corners.
第１図において、サーミスタ素子１２の両面には、電極
１４と対向するように、たとえばｐｔまたはジュメット
線等からなるリード線１６が配置される。リード線１６
の先端部には、たとえば銀ろう等の金属ろう材１８がコ
ーティングされている。In FIG. 1, lead wires 16 made of, for example, PT or Dumet wires are arranged on both sides of the thermistor element 12 so as to face the electrodes 14. Lead wire 16
A metal brazing material 18, such as silver solder, is coated on the tip end.
次いで、第２図に示すように、リード線１６がそれぞれ
対応の電極１４に接続される。すなわち、リード線１６
の先端にコーティングされている金属ろう材１８を溶か
すことにより、リード線１６と電極１４とを一体固定す
る。Next, as shown in FIG. 2, the lead wires 16 are connected to the respective electrodes 14. That is, the lead wire 16
By melting the metal brazing material 18 coated on the tip of the lead wire 16 and the electrode 14, the lead wire 16 and the electrode 14 are integrally fixed.
その後、第３図に示すように、リード線１６が固着され
たサーミスタ素子１２をガラスキャップ２２に入れ、カ
ーボンヒータ２４によってガラスキャップ２２を溶融す
ることによって、第４図に示すように、ガラス被覆２２
′で封止されたラジアルタイプのサーミスタ１０が得ら
れる。このようなガラス封止工程においては、リード線
１６はすでに電極１４に固着されているので、従来のよ
うにガスの発生するおそれはなく、したがって、ガラス
被覆２２′内にボイドなどが形成されるのが有効に防止
される。なお、ガラスキャップ２２の代わりにガラス管
を用いてもよい。Thereafter, as shown in FIG. 3, the thermistor element 12 to which the lead wire 16 is fixed is placed in a glass cap 22, and the glass cap 22 is melted by a carbon heater 24, thereby forming a glass coating as shown in FIG. 22
A radial type thermistor 10 sealed with ' is obtained. In such a glass sealing process, since the lead wire 16 is already fixed to the electrode 14, there is no risk of gas generation as in the conventional case, and therefore voids etc. are formed in the glass coating 22'. is effectively prevented. Note that a glass tube may be used instead of the glass cap 22.
なお、上述の実施例では、電極１４はサーミスタ素子１
２との一体焼成によって形成されるものとして説明した
が、電極１４は、サーミスタ素子１２を焼成した後に導
電ペーストを印刷して焼付けることによって形成するこ
ともできる。In addition, in the above-mentioned embodiment, the electrode 14 is the thermistor element 1.
Although the electrode 14 has been described as being formed by integral firing with the thermistor element 12, the electrode 14 can also be formed by printing and baking a conductive paste after firing the thermistor element 12.
第１図〜第３図はこの発明の一実施例を示す図解図であ
る。
第４図は第１図〜第３図の工程を経て製造されたサーミ
スタを示す断面図解図である。
図において、１０はサーミスタ、１２はサーミスタ素子
、１４は電極、１６はリード線、１８は金属ろう材、２
２はガラスキャップ、２２′はガラス被覆を示す。
特許出願人 株式会社 村田製作所
代理人 弁理士 山 １） 義 火
弟 １ 図 ′ｓ２図第３図
第４図1 to 3 are illustrative views showing one embodiment of the present invention. FIG. 4 is an illustrative cross-sectional view showing a thermistor manufactured through the steps shown in FIGS. 1 to 3. In the figure, 10 is a thermistor, 12 is a thermistor element, 14 is an electrode, 16 is a lead wire, 18 is a metal brazing material, 2
2 indicates a glass cap, and 22' indicates a glass coating. Patent applicant Murata Manufacturing Co., Ltd. Agent Patent attorney Yama 1) Yoshihiro 1 Figure 's2 Figure 3
Figure 4
Claims (1)
子の電極にろう付けし、次いで前記半導体素子と前記リ
ード線の一部とをガラス容器に封入するようにした、半
導体装置の製造方法。A method for manufacturing a semiconductor device, comprising brazing a lead wire coated with a metal brazing material to an electrode of a semiconductor element, and then enclosing the semiconductor element and a portion of the lead wire in a glass container.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5581988A JPH01230258A (en) | 1988-03-09 | 1988-03-09 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5581988A JPH01230258A (en) | 1988-03-09 | 1988-03-09 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01230258A true JPH01230258A (en) | 1989-09-13 |
Family
ID=13009556
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5581988A Pending JPH01230258A (en) | 1988-03-09 | 1988-03-09 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01230258A (en) |
-
1988
- 1988-03-09 JP JP5581988A patent/JPH01230258A/en active Pending
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