JPH01226283A - Solid state image pickup device - Google Patents

Abstract

PURPOSE:To obtain a favorable picture free from a fixed pattern-shaped noise by transferring both an unnecessary charge and a signal charge in the same direction in a light receiving area and a storage area. CONSTITUTION:An unnecessary charge discharge area E is arranged on the extension of a horizontal transfer area C. Namely, it is arranged in a side contrary to the example of the past. An unnecessary charge discharge gate F is arranged between the horizontal transfer area C and the unnecessary charge discharge area E. An unnecessary charge discharge drain G is arranged on the extension of the unnecessary charge discharge gate. In such constitution, the unnecessary charge comes to be transferred in the same direction as the signal charge, and the respective potential wells of the light receiving area is the same at the time of the discharge of the unnecessary charge and at the time of the transfer of the signal charge. Therefore, the fixed pattern-shaped noise is never generated.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a solid-state imaging device using a charge-coupled device, particularly a solid-state imaging device having an imaging region, a horizontal transfer region, a charge detection region, an unnecessary charge discharge gate, and an unnecessary charge discharge region. The present invention relates to an imaging device.

2. Description of the Related Art Conventionally, a typical example of a solid-state image sensor having a vertical transfer stage is a charge-coupled solid-state image sensor (hereinafter, charge-coupled device is abbreviated as COD).

There are three types of COD solid-state image sensors depending on their configuration: interline transfer solid-state image sensors, frame transfer solid-state image sensors, and frame interline transfer solid-state image sensors. The following interline transfer type solid-state image sensor is (
KL-COD), frame transfer solid-state image sensor (FT
-1 cD).

3,,-; The frame interline transfer type solid-state image sensor (FIT
-COD).

Since the configuration and operation of IL-COD and FT-COD are well known, their explanation will be omitted.

Details of FIT-COD are proposed in Japanese Patent Application Laid-open No. 65-52676 and Japanese Patent Application Laid-Open No. 55-163963. The outline will be explained below using FIG. 6.

Figure 6 shows the basic configuration of FIT-COD, which includes a light receiving area, a storage area B, a horizontal transfer area C2, a charge detection area D
, and an unnecessary charge discharge region Σ. The light-receiving area A includes a two-dimensional array of light-receiving elements 1, a gate 2 for reading out signal charges accumulated in the light-receiving elements 1, and a gate 2 for vertically transferring the signal charges read out through this gate. Portions other than the vertical transfer register 3 and the light receiving element 1 are shielded from light by a light shielding mask 4. The vertical transfer register 3 has a four-phase electrode structure made of polysilicon so that charges can be transferred in both the upper and lower vertical directions. Vertical transfer pulses φv1 to φv4 are applied to these four-phase electrodes. Let φv1 and φv3 be the vertical transfer electrodes that receive and take the signal charge accumulated in the photodetector 1, and if a signal readout pulse is superimposed on the vertical transfer pulse applied to the vertical transfer electrodes φv1 and φv3, the signal charges accumulated in the photodetector 1 will be accumulated. The signal charges can be read into the vertical transfer register 3. Therefore, 2:1 interlaced scanning can be performed by superimposing a signal read pulse on every other field on the two vertical transfer pulses φv1 and φv3.

A storage area B is arranged on an extension of the vertical transfer register 3. The storage area B is constituted by a vertical transfer register 3, the number of pixels thereof is half that of the light receiving area, and the transfer electrodes have a four-phase structure. Transfer pulses φM1 to φM4 are applied to each electrode of the vertical transfer register in storage area B. At the other end of the storage area B, a horizontal transfer area C is arranged.

The horizontal transfer area C is composed of three-phase transfer electrodes 5, 6.7, and each transfer electrode receives horizontal transfer pulses φH1 to φH.
3 is applied. At the -6...-2 ends of the horizontal transfer area C, charge detection areas are arranged. An unnecessary charge discharge region Z is still arranged at the other end of the light receiving region. The charge detection region is constituted by a well-known floating diffusion amplifier, and has a drain for charge absorption and a reset gate of the floating diffusion.

A method of controlling the accumulation time of signal charges accumulated in the light receiving area by FIT-COD having the above configuration and improving the dynamic resolution will be explained with reference to FIGS. 4 and 6.

FIG. 6 shows the waveforms of the vertical transfer pulses φv1 to φv4 applied to the light receiving area A of the FIT-COD shown in FIG. 4 and the vertical transfer pulses φM1 to φM4 applied to each electrode of the vertical transfer register in the storage area B. This is an overview.

First, pseudo signals such as smear accumulated in the vertical transfer stage of the light receiving area A are transferred to the unnecessary charge discharge area E and eliminated by the vertical transfer pulses φv1 to φv4 applied during the first half period tAO of the vertical retrace period. Ru.

Next, read out the signal 6t superimposed on φv1 or φv3.
, -The signal charge accumulated in the light receiving element by the pulse φOH is read out to the φv1 or φv3 electrode.

The signal charges transferred to the vertical transfer stage are transferred at high speed to a predetermined location in the storage area B by φv1 to φv4 and φM1 to φM4 during the high-speed transfer period tB.

The signal charges transferred at high speed to a predetermined location in the storage area B are transferred to the horizontal transfer area C one line at a time for each horizontal scan. The signal charge transferred to the horizontal transfer area C is sequentially transferred to the charge detection area by horizontal transfer pulses φH1 to φH3 applied to the horizontal transfer register, and the signal charge is converted into a signal voltage and transferred from the solid-state image sensor to the outside. taken out.

As mentioned above, the signal charge from the light receiving element can be read out by superimposing the signal readout pulse φOH on the vertical transfer pulse applied to the vertical transfer electrodes φv1 and φv3 and increasing the potential of the vertical transfer stage. . Therefore, as shown in FIG. 6, 2:1 interlaced scanning can be performed by alternately superimposing signal readout pulses φOH on φv1 and φv3.

7, -7 By the way, as shown in FIG. 6, if a new readout pulse φS is superimposed at any time on the vertical transfer pulses φv1 and φv3 that drive the light-receiving area A, the signal charges accumulated in the light-receiving area can be read out. The data is read out to the vertical transfer stage 3 at the time when the pulse φS is applied. The read signal charges are transferred to the unnecessary charge discharge region E and discharged by vertical transfer pulses φv1 to φv4 applied during the period tA. Therefore, signal charges corresponding to the period tS are accumulated in the light receiving element 1, from the end of the read pulse φS to the time when the next read pulse φOH is applied and the signal of the light receiving element 1 is read out. It turns out. This means that the exposure time of the light receiving area A has become tS.

In other words, the solid-state image sensor itself has a shutter function. If a moving subject is imaged in the above state, an image with extremely good dynamic resolution can be obtained. Here, since the shutter readout pulse φS can be set at any time other than the period between the beginning of tA and the end of tB, an image at any shutter speed can be obtained.

In this way, unnecessary charges are discharged in the direction of the unnecessary charge discharge area E arranged on the extension of the light receiving area, and signal charges are transferred at high speed to the storage area B arranged on the extension of the light receiving area A. If the signals stored in B are read out sequentially for each horizontal line, it is possible to obtain an image with extremely little vertical smear and good dynamic resolution.

Problems to be Solved by the Invention However, in the solid-state imaging device with the conventional configuration described above, when there is no light incident on the light-receiving area (dark state), noise in the form of a fixed pattern occurs randomly over the entire screen, significantly reducing the image quality. Deteriorated. The cause of this random fixed pattern noise will be explained below.

In this solid-state imaging device, unnecessary charges are transferred and discharged at high speed to an unnecessary charge discharge area located on an extension of the light receiving area A, and signal charges are transferred at high speed to a storage area located on an extension of the light receiving area A. , getting a signal. Therefore, the large light receiving area is vertically scanned in both the positive direction and the negative direction.

Sweeping out unnecessary charges 9 t+ -/ The waveform of the transfer pulse is inevitably different between when sweeping out unnecessary charges and when transferring signal charges, so each potential in the light receiving area is different between when sweeping out unnecessary charges and when transferring signal charges. is necessarily different. This means that the amount of charge remaining in the vertical transfer stage differs between when unnecessary charges are swept out and when signal charges are transferred.

Therefore, a small amount of charge remaining in each potential well in the light-receiving area when unnecessary charges are swept out is added and read out during signal charge transfer, and as a result, noise in a fixed pattern is generated randomly on the entire screen.

Next, consider the case where the unnecessary charge sweeping direction and the signal charge transfer direction are made the same. At this time, unnecessary charges are also transferred to the horizontal transfer area C.
Therefore, when the amount of unnecessary charge is several to several hundred times the amount of signal charge, such as during shutter operation, this excess unnecessary charge Transfer area C overflows, and this overflowed unnecessary charge enters storage area B and remains.
invade the screen. Also, due to this excessive unnecessary charge, horizontal rotation 1o
If the transfer region C attempts to transfer small amounts at a time so as not to overflow, it will take time and it will be impossible to discharge all unnecessary charges within the vertical retrace period.

In view of the above problems, the present invention does not generate random fixed pattern noise on the screen, and even when the amount of unnecessary charge is several times to hundreds of times the amount of signal charge, such as during shutter operation. , to provide a solid-state imaging device that does not invade the screen.

Means for Solving the Problems The present invention solves the above problems by providing a light receiving area, a storage area, a horizontal transfer area, a charge detection area, an unnecessary charge discharge gate, and an unnecessary charge discharge gate on the same semiconductor substrate. The light receiving area includes m photoelectric conversion elements in the horizontal transfer direction (column direction), n photoelectric conversion elements in the vertical transfer direction (row direction), and charge coupled devices arranged along the column direction. m columns of vertical transfer sections, the storage area is arranged on an extension of the vertical transfer section in the row direction, and the horizontal transfer area is
The charge detection region is arranged in the row direction extension of the storage area, the charge detection region is arranged in the transfer direction (column direction) of the horizontal transfer region, and the unnecessary charge discharge gate is arranged in the row direction extension of the horizontal transfer region. The unnecessary charge discharge region is a solid-state imaging device arranged on an extension of the unnecessary charge discharge gate in the row direction.

Operation With this configuration, in the present invention, unnecessary charges and signal charges are transferred in the same direction in the light receiving area and the storage area, so that potential wells are not different when unnecessary charges are swept out and when signal charges are transferred. That is, unnecessary charges are transferred and discharged from the vertical transfer stage of the light receiving region to the unnecessary charge discharge region via the storage region, the horizontal transfer region, and the unnecessary charge discharge gate.

Embodiment A first embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a solid-state imaging device according to a first embodiment of the present invention.

In Figure 1, A is a light receiving area, C is a horizontal transfer area, and D is a horizontal transfer area.
is a charge detection area, E is an unnecessary charge discharge area, F is an unnecessary charge discharge gate, G is an unnecessary charge discharge drain, and B is a storage area.For convenience of explanation, the number of pixels in the vertical direction is the same as the vertical direction of the light receiving area. Set to half the number of pixels. The light receiving area A, the storage area B, the horizontal transfer area C1, and the charge detection area are the same as those explained in detail in FIG. The unnecessary charge discharge region E is arranged on an extension of the horizontal transfer region C. That is, it is placed on the opposite side from the conventional example shown in FIG.

The unnecessary charge discharge gate F is arranged between the horizontal transfer region C and the unnecessary charge discharge region E. The unnecessary charge discharge drain G is arranged on an extension of the unnecessary charge discharge gate.

FIG. 2 shows the vertical transfer pulses φv1 to φv4 applied to the light receiving area A of the FIT-COD shown in FIG. 1, the vertical transfer pulses φM1 to φM4 applied to each electrode of the vertical transfer register in the storage area B, and unnecessary charges. Ejection gate pulse φDG
This shows an outline of the waveform.

Next, the operation will be explained.

13. ~- First, pseudo signals such as smear accumulated in the vertical transfer stage of the light receiving area A are stored by vertical transfer pulses φv1 to φv4 and φM1 to φM4 applied during the first half period tA of the vertical retrace period. It is transferred to the horizontal transfer area C via area B. During this period tA, voltage is applied to all electrodes of the horizontal transfer region C.

During this period tA, the unnecessary charge discharge gate is open, so the pseudo signal, that is, the unnecessary charge transferred to the horizontal transfer region C is absorbed into the unnecessary charge discharge region E and discharged.

Although voltage was applied to all electrodes in the horizontal transfer region C during tA, the reset gate in the charge detection region was turned on and the horizontal transfer region C was allowed to perform normal transfer operations. Good too.

In this case, a small portion of the unnecessary charge is transferred to the charge detection region, absorbed by the drain, and discharged.

Then, after a period of tA, the signal charge accumulated in the light receiving element is read out to the φv1 or φv3 electrode by the signal readout pulse φOH superimposed on φv1 or φv3. The signal type 14 vane loads transferred to the vertical transfer stage are φv1 to φv4, φM1 during the high-speed transfer period tB.
~φM4 is transferred to a predetermined location in storage area B at high speed. The signal charges transferred at high speed to a predetermined location in the storage area B are transferred to the horizontal transfer area C one line at a time for each horizontal scan.
will be forwarded to. The signal charge transferred to the horizontal transfer area C is the horizontal transfer pulse φH1~ applied to the horizontal transfer register.
The signal charge is sequentially transferred to the charge detection area by φH3, and the signal charge is converted into a signal voltage and taken out from the solid-state image sensor.

In this way, unnecessary charges are also transferred in the same direction as signal charges, and each potential well in the light-receiving region is the same when unnecessary charges are swept out and when signal charges are transferred.

Therefore, the amount of charge remaining in the vertical transfer stage is not the same when sweeping out unnecessary charges and when transferring signal charges, and since the direction of charge transfer is always the same, the trap level of the vertical transfer stage is filled, so it is fixed. No pattern-like noise occurs.

As mentioned above, the signal charge from the light receiving element is directed vertically to 15 -
7. Reading can be performed by superimposing a signal readout pulse φOH on the vertical transfer pulse applied to the transfer electrodes φv1 and φv3 to increase the potential of the vertical transfer stage. Therefore, as shown in FIG. 2, 2:1 interlaced scanning can be performed by alternately superimposing signal readout pulses φGH on φv1 and φv3.

By the way, as shown in FIG. 2, if a new readout pulse φS is superimposed at an arbitrary time on the vertical transfer pulses φv1 and φv3 that drive the light-receiving area A, the signal charge accumulated in the light-receiving area is transferred to the signal charge that is applied to the readout pulse φS. The data is read out to the vertical transfer stage 3 at the time when the data is read out. This read signal charge is used as an unnecessary charge by the vertical transfer pulses φv1 to φ applied during the period tA.
v4, φM1 to φM4, the charges are transferred to the unnecessary charge discharge region E via the storage region B and the horizontal transfer region C, and are discharged.

According to the above configuration, the time from the end of the readout pulse φS until the next readout pulse φGH is applied to the light receiving element 1 and the signal of the light receiving element 1 is read out is the time t.
Signal charges corresponding to the period S are accumulated.

This means that the exposure time of the person in the light receiving area has become tS. That is, this is because the solid-state image sensor itself has a shutter function. If a moving subject is imaged under the above conditions, an image with extremely good dynamic resolution can be obtained. Here, since it can be set to any time other than the period between the beginning of the shutter readout pulse φ5idtA and the end of tB, an image at any shutter speed can be obtained.

Next, a second embodiment will be described. This embodiment has the same configuration as the first embodiment except for the horizontal transfer area C.

Both operations are exactly the same. FIG. 3 is a plan view of the horizontal transfer area C. FIG. 4 is a sectional view taken along the X-Y line in FIG. 3. In FIGS. 3 and 4, 8 is the 81 board,
9 is an oxide film, 11, 12, and 13 are unnecessary charge discharge promotion electrodes AD1 and AD2, respectively, which are newly introduced in this embodiment.
．． ADa, 6, and 6°7 are horizontal transfer electrodes, respectively.

The operation of this embodiment configured as described above will be explained in Section 17. The period for discharging unnecessary charges as shown in FIG.
During the period tA, the large amount of unnecessary charges transferred to the horizontal transfer region C is not held up, and the unnecessary charge discharge gate F,
In order to transfer unnecessary charges to the unnecessary charge discharge region E, the horizontal transfer region C
A potential gradient is provided within the capacitor to facilitate the movement of charges in the discharge direction. That is, ADl, AD2,
A voltage is applied to ADa so as to generate the potential as described above, and the horizontal transfer electrodes s, e, and 7 are kept in a floating (high impedance) state during the period tA.

As described above, according to this embodiment, the unnecessary charge discharge promoting electrodes AD1, AD2. By providing ADa,
A large amount of unnecessary charge transferred to the horizontal transfer region C can be transferred and discharged to the unnecessary charge discharge gate F and the unnecessary charge discharge region E without delay.

Note that the first thing. In the second embodiment, the storage area 18t1
It is clear that the - prime number can be any arbitrary number.

Effects of the Invention As described above, according to the present invention, unnecessary charges are transferred and discharged to the unnecessary charge discharge area E via the storage area B arranged on the extension of the light receiving area A, the horizontal transfer area C1, and the unnecessary charge discharge gate F. After that, if the signal charges are transferred at high speed to the storage area B arranged on the extension of the light receiving area A, and the signals stored in the storage area B are read out sequentially for each horizontal line, vertical smear is extremely reduced and shutter operation is possible. Even when the horizontal transfer area C is not overflowed by a large amount of unnecessary charge, all of this large amount of unnecessary charge can be discharged within the vertical retrace period, and a good image without fixed pattern noise can be obtained. be able to.

[Brief explanation of the drawing]

FIG. 1 is a schematic diagram of a solid-state imaging device according to a first embodiment of the present invention, FIG. 2 is a schematic waveform diagram of a vertical transfer pulse of the same solid-state imaging device, and FIG. 3 is a schematic diagram of a solid-state imaging device according to a second embodiment of the present invention. FIG. 4 is a sectional view of a main part of FIG. 3, and FIG. 6 is a plan view showing a part of a solid-state imaging device. FIG. 6 is a schematic diagram of a gymnastics imaging device, and is a schematic waveform diagram of vertical transfer pulses of a conventional solid-state imaging device. A... Light receiving area, B... Storage area, C...
...Horizontal transfer area, D...Charge detection area,
E: Unnecessary charge discharge area, F: Unnecessary charge discharge gate.

Claims (2)

[Claims] (1) A light receiving area and a storage area on the same semiconductor substrate,
A horizontal transfer area, a charge detection area, an unnecessary charge discharge gate, and an unnecessary charge discharge area are provided. direction) and n (n is an integer) photoelectric conversion elements and m columns of vertical transfer sections each consisting of charge-coupled devices arranged along the column direction, and the storage area is arranged along the row direction of the vertical transfer section. , the horizontal transfer area is arranged as an extension of the storage area in the row direction, the charge detection area is arranged in the transfer direction (column direction) of the horizontal transfer area, and the charge detection area is arranged in the transfer direction (column direction) of the horizontal transfer area. The discharge gate is arranged on an extension of the horizontal transfer region in the row direction, and the unnecessary charge discharge region is
A solid-state imaging device, wherein the solid-state imaging device is arranged on an extension of the unnecessary charge discharge gate in the row direction. (2) The solid-state imaging device according to claim 1, further comprising an electrode in the horizontal transfer region that creates a potential gradient such that charges flow in the direction of the unnecessary charge discharge gate.