JPH01221816A - Switch on/off detector - Google Patents

Abstract

PURPOSE:To make it possible to detect accurately on/off of a switch while reducing electric power consumption by passing a huge current either through the switch when the switch is on or through a leak resistance when the switch is off, for a given time and by detecting, with the second comparator, a change in voltage drops developed between respective two cases. CONSTITUTION:On/off change of a switch 11 is detected with the first comparator 15 to actuate a timer means 24 which turns a switching circuit on to flow current from a power supply through the second resistance 14 to a middle connecting point for a period set with the timer. Here, if the switch 11 is changed from on to off (off to on), current flows from the connecting middle point through a leak resistance 13 (switch 11) to the earth. Accordingly, the voltage at the connecting middle point rises (does not rise) over the second threshold value so that it is detected with the second comparator 16 that keeps the output in a state opposite to the previous one. With this procedure it is possible to detect accurately on/off of a car door interlock switch while reducing electric power consumption as far as possible.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to a switch-on-off detection device, and the present invention relates to a switch-on-off detection device that detects whether a switch is turned on or off when a car door is opened or closed, for example. This invention relates to a detection device.

(Prior Art) Generally, the configuration shown in FIG. 6 is used to detect whether a switch is in an on or off state. In the figure, when the switch 1 is in the off state, no current flows and there is no potential drop due to the resistor 2.

Therefore, an H level signal is applied to the detection circuit 3. Further, when the switch 1 is in the on state, a current 1 flows through the resistor 2 and the switch 1, and a potential drop occurs in the resistor 2. As a result, an L level signal is input to the detection circuit 3.

In this way, as the switch 1 turns on and off, the detection circuit 3
The on/off state of the switch 1 is detected because the level of the signal input manually changes from H to L.

If the switch 1 is a switch that is linked to the opening and closing of an automobile door, a leak resistor 4 may exist in parallel with the switch 1.

Therefore, leakage current I2 flows even when switch 1 is in the off state. Leakage resistance 4 due to the leakage current ■2
Even if a potential drop occurs at the switch 1, it is necessary to accurately grasp the off state of the switch 1 by distinguishing it from the on state. For this purpose, the currents 1 and I2 may be set to large values. However, if this is done, a problem arises in that power consumption increases.

An example of a device designed to solve this problem is disclosed in Japanese Patent Application Laid-open No. 102477/1983. This device generates a clock by keeping the oscillation circuit in constant operation. Based on the clock, a pulse train as shown in FIG. 7 is formed. Using the pulse train, a current I or I2 is caused to flow for the ON time of the pulse train, and sampling is performed to detect whether the switch 1 is open or closed. That is, during the H level period of the pulse width τ in the pulse train, the current ■ or I2
, and the opening and closing of switch 1 is detected by sampling, and during the other L level period, the current is set to high impedance so that none of the above current 1.1 flows. In this way, it is possible to prevent the consumed force from increasing even if the values of the currents 1 and I are increased.

(Problems to be Solved by the Invention) In the conventional device described above, although the power consumption due to the current I 1■ can be kept low, the oscillation circuit must be operated at all times. Therefore, it is necessary to consider the power consumption in the oscillation circuit. In addition, in the conventional device described above, in order to suppress the power consumption due to the currents 11 and I2, the pulse train duty ratio (τ
/T) is made small, and the period T is made large.

Since the period T is increased, it is inevitable that the responsiveness of the on/off detection of the switch 1 will deteriorate. In order to improve the responsiveness, the period T may be shortened, but if this is done, the power consumption due to the current I SI increases. Therefore, the period T cannot be made very short. Furthermore, noise is often superimposed on the pulse train shown in FIG. The noise may cause a malfunction, and the opening and closing of the switch 1 may not be properly detected.

The present invention has been made in view of the above, and its purpose is to:
To provide a device capable of accurately detecting on/off of an automobile door interlocking switch while suppressing power consumption as low as possible.

[Structure of the Invention] (Means for Solving the Problems) The switch on/off detection device of the present invention includes a first resistor and a switch electrically parallel to the leak resistor connected in series between a power source and a ground. a switching circuit connected in series between a power source and the connection midpoint in the switch on/off detection device that detects the on/off state of the switch from a potential change at a midpoint of the connection between the first resistor and the switch; and a second resistor, the second resistor being the first resistor.
It is configured to have a resistance value smaller than a resistor, and further compares the potential at the midpoint of the connection with a first threshold, and outputs an output when the magnitude relationship between the potential and the first threshold is reversed. a first comparator that inverts the H and L levels of the signal;
a second comparator that inverts the H and L levels of the output signal when the magnitude relationship between the potential and the second threshold is reversed compared to a threshold; and the H output signal of the first comparator. , timer means that is activated when the L level is inverted and outputs a timer signal for a predetermined timer period, and turns on the switching circuit for one timer period using the timer signal; an output circuit that detects and outputs an on/off change of the switch during the output period of the timer signal when the H and L levels of the output signal are inverted, and maintains the output state even after the output period. Further, the first threshold value is a first potential that is a potential at the midpoint of the connection when a first current flows from the power supply to the ground via the first resistor and the leakage resistor when the switch is in the off state. (V), and the second threshold is set such that the first current flows when the switch is off, and the second resistance and the leakage resistance are removed from the power supply when the switching circuit is turned on. lower than the second potential (V1) that is the potential at the middle point of the connection when the second current flows to the ground through the first
It is configured to be set higher than the potential (v0).

(Function) In a steady state in which the switching circuit is off, the potential at the connection midpoint changes above and below the first threshold value as the switch changes on and off. Therefore, the first comparator detects the change whether it is from on to off or from off to on. This activates the timer means to turn on the switching circuit. As a result, current from the power source flows from the second resistor to the connection midpoint for the timer period.

When the on/off change of the switch is from on to off, the current flows from the midpoint of the connection to the ground via the leak resistance. As a result, the potential at the midpoint of the connection rises above the second threshold, and the second comparator detects this and inverts the output. The inverted output of the second comparator is output by the output circuit as a signal indicating that the switch is off within the timer time. After the timer period has elapsed, the current passing through the second resistor stops, the potential at the midpoint of the connection becomes lower than the second threshold, and the output of the second comparator is inverted again. however,
Since the timer is out of time, the output circuit maintains an output indicating that the switch is off.

Also, if the on/off change of the switch is from off to on, then the second switch is connected to the power source as before.
Current flows through the resistor to the midpoint of the connection, but since the switch is on, that current flows through the switch to ground. Therefore, the potential at the midpoint of the connection never rises above the second threshold. Therefore, the second comparator maintains the previous output state, but the output state is different from when it is inverted again after the timer time elapses and the current output is obtained from the output circuit as described above. It has become something like this. Therefore, the output of the output circuit is inverted within the timer period, outputs a signal indicating the on state of the switch, and maintains this output state.

Such operations are repeated by turning the switch on and off.

(Example) The present invention is applied to various devices in which leak resistance is generated in parallel to a switch due to exposure to rain, etc., and the case of an automobile will be described below as an example.

In FIG. 1, 11 is a switch that operates in conjunction with the door of the automobile, and is turned on and off when the door is opened and closed, respectively. A resistor 12 is connected in series to the switch 11. The car battery Batt is grounded via a resistor 12 and a switch 11. Theoretically, a leak resistor 13 is connected to the switch 11 in parallel. A resistor 14 is connected between the connection midpoint (point A) between the switch 11 and the resistor 12 and the terminal G. Resistance value R1□ of resistor 12.14.

R14 has a width of 2) R14.

The above point A is connected to a non-inverting input terminal of a comparator (I) 15 and a non-inverting input terminal of a comparator (II) 16. The inverting input terminal of the comparator (1) 15 is connected to the connection midpoint of resistors 18 and 19 connected in series between the battery Batt and the ground. This results in
Its inverting input terminal is held at a first threshold value vthl. The inverting input terminal of the comparator (n) 16 is connected to a resistor 20 connected in series between the battery Batt and ground.
．． 21 connection midpoints are connected. Thereby, the inverting input terminal is held at the second threshold value vth2.

The magnitude relationship between the first and second threshold values vtht'■ is "
thl <vth2.

The output terminal of the h2 comparator (1) 15 is connected to the terminal G via a sampling circuit 23, a timer 24, and a switching circuit 25.

The switching circuit 25 is for controlling the battery Batt to be turned on and off with respect to the terminal G. The output terminal of the comparator (II) is connected to a chattering prevention circuit (output circuit) 27, and the output terminal of the chattering prevention circuit 27 is used as the output terminal 29 of the entire apparatus shown in FIG. The output terminal of the timer 24 is connected to the chattering prevention circuit 27. The chattering prevention circuit 27 is a circuit that filters chattering of the switch 11. The output of this circuit 27 is used for various tasks.

The operation of the apparatus having the above configuration will be explained with reference to the time chart shown in FIG.

At time 10, switch 11 is off. As a result, current 2 flows through the resistors 12 and 13, and the potential at point A becomes Vo. This potential vo is equal to the first threshold value vth, as is clear from the chart of the potential at point A in FIG.
It is a value larger than 1 and smaller than the second threshold value V 2 (v, hl<vh2 o × vth2). Therefore, comparator (1, II) 1
5.16 outputs an H level signal 15 and an L level signal 16a, respectively. Then, from the chattering prevention circuit 27, the switch 11 was changed from on to off before time 10. (not shown), the H level signal 27a is output.

In this state, when the switch 11 changes from off to on at time 11, the current!・Instead of current 1. flows. Then, as the point A is grounded by the switch 11, the potential at the point A begins to drop. The potential at point A falls below the first threshold value vLhl at time t2 and eventually becomes zero. As a result, the comparator (I) 15 outputs an L level signal 15b instead of the previous H level signal 15a. The level change is transmitted to an oscillation circuit (not shown) and a sampling circuit 23. The oscillation circuit operates for a certain period of time in response to this change. Further, the sampling circuit 23 is configured as a digital differentiating circuit, and generates a pulse 23a according to a change in the level of the output of the comparator (1) 15, and sends it to the timer 24. The timer 24 receives the pulse 23a and outputs the L level signal 24.
An H level signal (timer signal) 24b is output instead of signal a. The H level signal 24b is transmitted to the chattering prevention circuit 27 and the switching circuit 2°5.

The switching circuit 25 is turned on by the H level signal 24b, and connects the battery Batt to the terminal G. As a result, a current I3 flows from the battery Batt to the ground via the switching circuit 25, the terminal G, the low resistance 4, and the switch 11. However, switch 11
Since is in the on state, the potential at point A maintains zero.

Therefore, naturally, the comparator (n) 16 also maintains the output state of the L level signal 8 signal 16a. Comparator (II
) 16 L level signal 16a is the chattering prevention circuit 2
7 can be conveyed. As mentioned earlier, the chattering prevention circuit 27 receives the n level signal 24 from the tie 7-24.
b has been added.

Therefore, the output of the chattering prevention circuit 27 is the n-level signal 24b from the timer 24 and the comparator (II).
Based on the L level signal 16a from the oscillation circuit 16, the H level signal 27a to the n level signal 27 are generated at time t3, for example, at the rising edge of the clock CLo from the oscillation circuit.
Changes to b. The n-level signal 27b from the chattering prevention circuit 27 is outputted to the outside from the output terminal 29, and a certain predetermined work is performed.

The n level signal 24b from the timer 24 changes from the n level signal 24b to the L level signal 24c at time t4 after a predetermined time. In synchronization with this, the switching circuit 25 also changes from on to off. As a result, a current I3 flows from the battery Batt to the ground via the switching circuit 25, the terminal G, the low resistance 4, and the switch 11.
Stop the current! Only 1 flows.

Next, at time t5, the switch 11 changes from on to off. As a result, in FIG. 1, current 12 flows instead of current 11. As a result, the potential at point A begins to rise as shown in FIG.

At time t6, the potential at point A exceeds the first threshold value vtht. Therefore, at time t6, comparator (I)
15 changes from an N level signal 15b to an H level signal 15c. Due to the level change, the sampling circuit 23 outputs the pulse 23b, similar to when the level changed at time t2, and the pulse 23b
The timer 24 outputs an H level signal (timer signal).
24d, and the switching circuit 25 is turned on at time t6 by the H level signal 24d. By turning on the switching circuit 25, the battery Batt is connected to the terminal G as before. However, time t
At 8, since the switch 11 is off, the current I4 from the battery flows to the switching circuit 25 and the terminal 0.
1 resistor 14 and leakage resistor 13 to ground.

Then, the resistance value R14 of the resistor 14 is changed to the resistance value R14 of the resistor 12.
Since it is set significantly smaller than 12, the potential at point A further increases. Then, at time t7, the potential at point A exceeds the second threshold value vLh2.

As a result, the output of the comparator (II) 16 changes from the L level signal 16a to the N level signal 16b. Then, at time t8, since the output of the timer 24 is the H level signal 24d and the output of the comparator (II) 16 is the N level signal 16b, chattering occurs in synchronization with, for example, the rising edge of the clock CL2 from the oscillation circuit. The output from the prevention circuit 27 changes from the n level signal 27b to the H level GK'+27c. The H level signal 27c is sent out from the output terminal 29 and performs a certain task.

Next, at time t9 after a certain period of time has elapsed, the timer 2
The output from 4 is the H level signal 24d to the L level signal 2.
Changes to 4e. Along with this, the switching circuit 25
also changes from on to off.

As a result, the current I4 shown in FIG. 1 no longer flows, and only the current I2 flows. Since the magnitude relationship between the resistance values R1□ and R14 of the resistor 12°14 is R12)R14, the potential at point A begins to drop from the potential v1. At time t1o, the potential at point A falls below the second threshold value vth2. Thereby, the output from the comparator (IF) 16 changes from the N level signal 16b to the L level signal 16c. Then, at time t10-2, the potential at point A is
Potential V due to current ■2. calm down.

Thereafter, the above operation is repeated as the switch 11 is turned on and off. That is, time t1□ becomes time t1, time t12
is at time t2, time t13 is at time t3, and time t
correspond to time t4, respectively.

FIG. 3 briefly shows the operation of the apparatus described in FIGS. 1 and 2 above. That is, first, it is determined whether the switch 11 has changed from on to off or from off to on (step 1). If there is no change, the judgment is repeated (step N). If it changes (
Step Y) The oscillation circuit starts operating. Step 2)
, the timer 24 is operated (step 3), the current IB is passed through the resistor 14 in FIG. 1 (step 4), and the switch 11 is activated.
Step 5 to prevent chattering when changing on and off.
) to get the output.

It is determined whether the output is HSL (step 6). If the result is H, perform the corresponding work (step 7); if yes, perform the corresponding work (step 8), and return to step 1.

FIG. 4 shows a more specific circuit of FIG. 1. As can be seen from Figure 4, Compare Lake (I) 1
5, (7) the first threshold value vth1 is set to 0.7V. Second threshold value vt at comparator (II) 16
h2 is set to 3v.

The sampling circuit (digital differentiation circuit) 23 is a D-FF
231, 232 and Ex-OR233,
A 40 Hz signal is applied to the cp terminals of the D-FFs 231 and 232.

This digital differentiation circuit 23 holds the previous data and compares it with the output from the comparator (I) 15.
If there is a mismatch, the output is sent to the timer 24 at the next stage.

The timer 24 includes frequency dividers 241 to 243 and an inverter 2.
45, 246 and FF247, a 20Hz signal is applied to the CP terminal of the frequency divider 241,
The frequency of this signal is sequentially divided by frequency dividers 241 to 243, and a timer signal of only 0.2 Sec is obtained from the frequency divider 243.

That is, the timer 24 is started by the output from the digital differentiation circuit 23, and is turned off after Q, 2 seconds.

The switching circuit 25 includes a switching element 251, and applies a signal from the timer 24 to its control terminal via an inverter 252 to turn on the switching element 251 for a predetermined period of time.

The chattering prevention circuit 27 is a D-FF272°273
, N0R274, AND275, 2.71, and the output from the timer 24 and the 40Hz signal are AN
It is applied to the CP terminals of D-FF272 and 273 via D271.

The potential at point A-F in FIG. 4 is the same as that shown in FIG. Details of the potentials at other points in FIG. 4 are shown in FIG. This figure 5 shows the time t in figure 2.
4-2 to t14-2.

Clock CL shown superimposed on the D point potential chart in Figure 2
, CL4 is the same code CL2 in the 340 chart in FIG.
, CL4. That is, comparator (II)
16 (point E potential) is at H level, and the output of timer 24 is 0. When 28 (potential at point D) is at H level, I' becomes H level in synchronization with the rise of clock CLl in S40. and,
0.28 in synchronization with the rise of the next clock CL2.
Since (potential at point D) is at H level and 2' is at H level, I' (potential at point F) changes to H level. Also, I (E) is at L level and 0. 2S
(potential at point D) is at H level, so clock C
I' changes to L level in synchronization with the rise of L3.

When the next clock CL4 rises, I' is at the L level and S40 is at the H level.
'The CFE point potential changes to L level.

〔Effect of the invention〕

According to the present invention, two comparators, the first and second comparators having different threshold values, are provided in order to detect whether the switch is on or off, and the first comparator first detects the change in the on or off state of the switch, and when the switch is on, the first and second comparators have different threshold values. , when the switch is off, a large current is passed through each leak resistor for a certain period of time, and the large change in potential drop due to when the large current flows to the leak resistor and when it stops is calculated as a second
Since the comparator is used to detect whether the switch is on or off, it is possible to accurately detect whether the switch is on or off while minimizing power consumption.

[Brief explanation of the drawing]

FIG. 1 is an overall configuration diagram of an embodiment of the present invention, FIGS. 2 and 3 are timing charts and flowcharts showing its operation, FIG. 4 is a circuit diagram showing an example of the integrated circuit shown in FIG.
The figure is a timing chart showing the details of its operation, FIG. 6 is a circuit diagram of a conventional example, and FIG. 7 is a pulse waveform diagram used to cause a large current to flow therein. 11... Switch, 12... Resistor (first resistor), 1
3... Leak resistance, 14... Resistance (second resistance), 1
5... Comparator (I) (first comparator)'',
16... Comparator (n) (i2 comparator),
23.24... Timer means (sampling circuit, timer), 25... Switching circuit, 27... Chattering prevention circuit (output circuit), I2... First current, 14... Second current , A... Connection midpoint, vthl.
...First threshold, vLh2...Second threshold, vo
...first potential, vl...second potential. Applicant's agent Mr. Sato Figure 7

Claims (1)

[Claims] A first resistor and a switch electrically parallel to the leakage resistor are connected in series between a power supply and the ground, and a potential at a midpoint between the first resistor and the switch is connected in series. A switch on/off detection device that detects the on/off state of the switch from a change, comprising a switching circuit and a second resistor connected in series between a power source and the connection midpoint, the second resistor being connected to the first
It is configured to have a resistance value smaller than a resistor, and further compares the potential at the midpoint of the connection with a first threshold, and outputs an output when the magnitude relationship between the potential and the first threshold is reversed. a first comparator that inverts the H and L levels of the signal; and a first comparator that compares the potential at the midpoint of the connection with a second threshold that is larger than the first threshold, and determines the difference between the potential and the second threshold. a second comparator that inverts the H and L levels of the output signal when the magnitude relationship is reversed; and a timer that operates when the H and L levels of the output signal of the first comparator are reversed for a predetermined timer period. a timer means that outputs a signal and turns on the switching circuit for the timer period according to the timer signal; and when the H and L levels of the output signal from the second comparator are inverted, during the output period of the timer signal , an output circuit that detects and outputs an on/off change of the switch and maintains the output state even after the output period; is set lower than a first potential (V_0) that is the potential of the connection midpoint when a first current flows to the ground via the first resistor and the leakage resistor,
The second threshold is such that the first current flows when the switch is off, and a second current flows from the power supply to the ground via the second resistor and the leakage resistor when the switching circuit is turned on. A switch on/off detection device characterized in that the switch is set lower than a second potential (V_1) which is the potential of the connection midpoint at the time of the switch, and higher than the first potential (V_0).