JPH0122086Y2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to a capacitive transducer using a pair of capacitors in which the capacitance of at least one of them changes depending on a measured quantity such as pressure or differential pressure. This invention relates to an improvement of a capacitive converter that converts into a signal and detects it.

A capacitive converter that detects the capacitance by converting it into a pulse width signal has the advantage of not requiring an AC power supply, as shown in Japanese Patent Application Laid-Open No. 51-61864, but it has the advantage of not requiring an AC power supply. The charging current is supplied from the DC power supply through each high resistance. By the way, high resistance poses problems in temperature coefficient management, etc., and differences in resistance tend to occur due to temperature changes, so conventional capacitive converters of this type have the disadvantage of being susceptible to the influence of ambient temperature.

The present invention is a bipolar device that exhibits the same characteristics.
Using a current mirror circuit consisting of a plurality of transistors made by an IC process whose bases and emitters are at the same potential, a pair of capacitors are supplied with charging currents of equal magnitude, and a resistor is supplied with charging currents of equal magnitude. A capacitive converter that is stable against temperature can be realized with a simple configuration by supplying a current with a constant ratio of 1 and 2 and applying the voltage generated across the resistor to a pair of comparators as a set value.

FIG. 1 is a connection diagram showing one embodiment of the converter of the present invention. In the figure, C ₁ and C ₂ are a pair of capacitors whose capacitance values change differentially. A configuration is shown in which fixed electrodes 11 and 12 are placed opposite each other, and a movable electrode 10 is connected to a reference point.
The CM is a current mirror circuit and has transistors Q ₁ , Q ₂ , Q ₃ , and Q ₄ made by a bipolar IC process so as to have the same dimensions and exhibit the same characteristics. The emitters of the transistors Q ₁ to _{Q 4} are commonly connected to the DC power supply Vr, and the bases are also commonly connected to the collector of Q ₁ . Further, the collector of Q ₁ is connected to the reference point via a resistor Rr, the collector of Q ₂ is connected to a capacitor C ₁ , the collector of Q ₃ is connected to a capacitor C ₂ , and the collector of Q ₄ is connected to a resistor Ra.
Since transistor Q ₁ is diode-connected in this way, the voltage between the base and emitter of Q ₁ is
When V _be is assumed, a constant current Ir of (Vr - V _be )/Rr flows through the resistor Rr. and transistor Q ₁ ~
Since Q ₄ is made to have the same dimensions and characteristics using a bipolar IC process, and the base and emitter are at the same potential, Q ₂ , Q ₃ ,
Capacitors C ₁ , C ₂ and resistor Ra connected to the collector of Q ₄ have currents I ₁ , I _{2 ,} and resistors equal to Ir, respectively.
Ia is supplied.

SW ₁ and SW ₂ are discharge switches connected in parallel to the capacitors C ₁ and C ₂ , respectively, and although transistors are shown, field effect transistors or the like can be used as necessary.
CP ₁ and CP ₂ are each comparators, and the input terminals (-) of CP ₁ and CP ₂ have the voltage across Ra, IaRa, set value Va.
It is commonly added as Further, the charging voltage V _C1 of C ₁ is applied to the input terminal (+) of CP ₁ , and the charging voltage V _CC2 of C ₂ is applied to the input terminal (+) of CP ₂ . FF is a flip-flop, which is set by the output of CP ₁ and reset by the output of CP ₂ , and outputs a constant amplitude pulse width signal PW ₁ to the output terminal Q.
, the inverted pulse width signal PW ₂ of PW ₁ is sent to the output terminal Q.
occurs. Switch with this pulse width signal PW ₁
Drive SW ₁ and SW ₂ with PW ₂ . FI is a filter circuit for smoothing the pulse width signal PW ₂ to obtain a DC voltage E ₀ .

In the present invention configured in this manner, if PW ₁ is generated with the flip-flop FF set and switch SW ₁ is on and SW ₂ is off, the capacitor C ₁ side is discharged and the capacitor C ₂
side is charged with current I ₂ . The charging voltage V _C2 of capacitor C ₂ increases with a time constant determined by the capacitance value of C ₂ ,
When V _C2 reaches the set value Va of CP ₂ , the FF is reset, SW ₁ is turned off and SW ₂ is turned on. As a result, the capacitor _C1 side is charged with the current _I1 , and the _C2 side is discharged. The charging voltage V _C1 of capacitor C ₁ rises with a time constant determined by the capacitance value of C ₁ , and when V _C1 reaches the set value Va of CP ₁ , FF is set again and the above operation is repeated, and the pair of capacitors C ₁ and _C2 are charged and discharged alternately. Therefore, the charging time t ₁ of C ₁ and the charging time t 2 of C ₂ are as follows: _{t 1 =} C ₁ RaIa/I ₁ (1) t ₂ = C ₂ RaIa/I ₂ (2) It is not affected by fluctuations in the power supply voltage of the DC power supply Vr, fluctuations in the base-emitter voltage _Vbe due to changes in ambient temperature, fluctuations in the resistance value of the resistor Rr, etc. In addition, in the current mirror circuit CM, transistors Q ₁ to _{Q 4} are manufactured using a bipolar IC process so that they have the same size and characteristics, so they can withstand a wide range of ambient temperatures and a wide range of collector-emitter voltages. Therefore, the ratio of I ₁ , I ₂ , and Ia does not change, and Ia/I ₁ =Ia/I ₂ . Therefore, the duty ratio t ₁ /T of the pulse width signal PW ₂ generated at the output terminal Q of the FF is t ₁ /T=t ₁ /t ₁ +t ₂ =C ₁ /C ₁ +C ₂ (3), and the ambient temperature It is also not affected by resistance value fluctuations in resistance Ra due to changes in . In other words, PW ₂ is a period corresponding to the sum of the capacitances of a pair of capacitors C ₁ and C ₂ ,
The pulse width corresponds to the capacitance of the capacitor _C1 , and the pulse width signal is stable over temperature.

The capacitance of the pair of variable capacitors C ₁ and _{C 2} is determined by the reference position of the movable electrode 10 (d,
The duty ratio t 1 / of the pulse width signal PW ₂ changes as follows: C ₁ = C ₀ d/d−x, C ₂ = C ₀ d/d+x ( ₄ ) T is t ₁ /T=1/2(1+x/d) (5), which means that the displacement x is not affected by the fluctuation elements of the circuit.
In other words, it accurately corresponds to the quantity to be measured.
The voltage E ₀ obtained by smoothing this pulse width signal PW ₂ by the filter circuit FI also corresponds accurately to the measured quantity.

Note that in the above, the output is obtained using either the pulse width signal PW ₁ or PW ₂ , but the difference between the voltage obtained by smoothing PW ₁ and the voltage obtained by smoothing PW ₂ is calculated and the difference is proportional to x/d. You may also obtain the following output. Furthermore, in the above description, the case where transistors Q ₁ to Q ₄ have the same dimensions has been explained, but if the emitter area of Q ₁ and Q ₄ is made, for example, 10 times that of Q ₂ and Q ₃ , the resistors Rr,
The resistance value of Ra may be 1/10. Further, although the current Ia from Q ₄ is used to set the set value Va of the comparators CP ₁ and CP ₂ , it can also be obtained using the reference current Ir from Q ₁ . In this case, Q ₄ can be omitted.

Figure 2 is a connection diagram showing another embodiment of the converter of the present invention.The difference from the embodiment of Figure 1 is that one of the pair of capacitors, _C1 , is a variable capacitor, and the other is a variable capacitor.
This is the configuration of a pulse width/voltage conversion circuit P/V which demodulates a pulse width signal and obtains an output voltage E ₀ corresponding to the amount of displacement x when C ₂ is a fixed capacitor. The pulse width/voltage conversion circuit P/V is driven by the pulse width signal PW ₂ and calculates the voltage (kE ₀ +Es) that is the sum of the voltage kE ₀ obtained by multiplying the output voltage E ₀ by k by the coefficient unit KC and the reference voltage Es. Switch SW ₃ to turn on and off,
A filter circuit FI smoothes the voltage turned on and off by SW ₃ , and the voltage smoothed by the filter circuit FI is amplified with a constant gain A and output as an output voltage E ₀ to the output terminal.
It consists of an amplifier AMP that outputs to OUT.
Pulse width/voltage conversion circuit P/V with such a configuration
, the switch SW ₃ is driven by the pulse width signal PW ₂ , and when PW ₂ is off, the filter circuit FI (kE ₀
Since a voltage of +Es) is applied, the filter circuit FI
An average value voltage E ₁ as shown in the following equation is generated at the output of .

E ₁ = C ₂ /C ₁ +C ₂ (kE ₀ +Es) (6) This average voltage E ₃ is amplified by the amplifier AMP and becomes the output voltage E _0. If the gain of AMP is A, the output voltage E ₀ is E ₀ =AC ₂ /C ₁ +C ₂ −kAC ₂ Es (7). On the other hand, the capacitance of the variable capacitor C ₁ is determined by the following equation with respect to the displacement x, where C ₀ is the initial capacitance, and d is the reference interval between the movable electrode 10 and the fixed electrode 11 (when x = 0), C ₁ = C ₀ d/ It changes according to the relationship d+x (8). Therefore, the output voltage E ₀ is E ₀ = A(d+x)C ₂ /d(C ₀ +C ₂ −kAC ₂ )+x(C ₂ −
kAC ₂ ) Es. Here, if the coefficient k of the coefficient unit KC is adjusted to satisfy kA=1, the output voltage E ₀ becomes E ₀ = AC ₂ /C ₀ (1+x/d)Es, and C ₀ , C ₁ , C ₂ , d, A, and Es are constant values, so the output voltage E ₀ accurately corresponds to the displacement x. In addition, variable capacitor C ₁
There is a stray capacitance Cs in parallel with C ₁ = C ₀
When changing according to the relationship d/d+x+Cs, the coefficient k of the coefficient unit KC may be adjusted so as to satisfy kA = 1+(Cs/C ₂ ).

In Figure 2, the transistor _Q5 connected in series to the resistor Ra is connected in series.
This is to eliminate the problem of saturation voltage of the transistors of switches _SW1 and _SW2 . Also transistor Q ₁ ~
The reason for inserting a resistor into the emitter of Q ₄ is Q ₂ ,
This is so that the current ratio can be adjusted accurately using the resistor placed in the emitter of _Q3 .

As explained above, the present invention uses a current mirror circuit consisting of a plurality of transistors made by a bipolar IC process and whose bases and emitters are at the same potential so as to exhibit the same characteristics.
By supplying charging currents of equal magnitude to a pair of capacitors, supplying a current having a constant ratio to the charging current to a resistor, and applying the voltage generated across the resistor to a pair of comparators as a set value. This is a temperature-stable capacitive converter with a simple configuration.

[Brief explanation of drawings]

FIG. 1 is a connection diagram showing one embodiment of the converter of the present invention, and FIG. 2 is a connection diagram showing another embodiment of the converter of the present invention. C ₁ , C ₂ ... A pair of capacitors, CP ₁ , CP ₂ ...
Comparator, CM...Current mirror circuit, Vr,
Vs...DC power supply, _Q1 to _Q5 ...transistor,
Rr, Ra...Resistance, FF...Flip-flop, FI
... Filter, P/V ... Pulse width/voltage conversion circuit, SW ₁ to _{SW 3} ... Switch.

Claims (1)

[Scope of utility model registration request] A pair of capacitors in which the capacitance of at least one of them changes depending on the quantity to be measured is alternately charged and discharged, the terminal voltage of each pair of capacitors is monitored by a pair of comparators, and based on the monitoring results, the capacitance of the pair of capacitors is In a capacitive converter, the period of charging and discharging is controlled to obtain a pulse width signal with a period corresponding to the sum of the capacitances of a pair of capacitors and a pulse width corresponding to the capacitance of one of the capacitors, It consists of a plurality of transistors manufactured using a bipolar IC process so as to exhibit the same characteristics and whose bases and emitters are at the same potential, respectively, supplying charging currents of equal magnitude to the pair of capacitors, and supplying the charging current to the resistor. 1. A capacitive converter comprising: a current mirror circuit that supplies a current with a constant ratio to the current; and means for applying a voltage generated across the resistor as a set value to the pair of comparators.