JPH01220265A - Controller - Google Patents

Abstract

PURPOSE:To judge the number of times of an error generated on one and the same sector address by a controller itself and to automatically perform an alternate processing by providing a non-volatile RAM to store the sector address in which the error is generated at the time of performing a read operation or a write operation on a storage device and the number of times of the error. CONSTITUTION:An internal CPU 11 in a disk controller sends the sector address in which the error is generated to a data search control part 12 via a CPU bus A. An error count control part 13 fetches the content of an error counter bus C when a RAM address control signal G becomes active, and increments the number of count by one, and writes it on an error information buffer non- volatile RAM 14. When the updated number of times of the error exceeds a decided constant value, the error count control part 13 activates an error over signal I. An alternate processing control part 16 performs the alternate processing of the sector address supplied from an error information bus B via a drive interface J when the error over signal I becomes active.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a control device, and particularly to a control device that controls information on how many times a sector address that has caused an error during a read or write operation to a storage device has caused an error in the past. The present invention relates to a control device that can be accumulated on the hardware of the device and automatically performs alternative processing for sectors in which errors have occurred a certain number of times or more.

BACKGROUND ART Conventionally, this type of control device has a method of notifying a host computer of the sector address where an error has occurred during a read or write operation to a storage device, but not storing the number of times an error has occurred within the control device. was taking.

Problems to be Solved by the Invention The conventional control device described above notifies the host computer of the sector address where an error occurred in a read or write operation to a storage device, and internally records the number of times an error has occurred. Since the method is not memorized, the control device cannot keep track of the number of errors that have occurred at the same sector address, which is necessary to determine whether it is a subsequent defective address, and it automatically performs alternative processing. The drawback is that it cannot be done.

The present invention has been made in view of the above-mentioned conventional situation,
SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a novel control device that makes it possible to eliminate the above-mentioned drawbacks inherent in the prior art.

Means for Solving the Problems In order to achieve the above object, the control device according to the present invention includes a non-volatile controller that stores the sector address where an error occurred and the number of times the error occurred during a read or write operation to a storage device. and a data search control unit that controls the write operation to this non-volatile RAM and compares the data written to this non-volatile RAM with the error sector address given from the internal CPU of the control device, and the same sector. It is configured to include an error count control section that counts the number of errors that have occurred in an address, and an alternative processing control section that automatically performs alternative processing on a reported sector address.

EXAMPLE Next, a preferred embodiment of the present invention will be specifically explained with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention using a disk controller and a disk drive.

Referring to FIG. 1, reference numeral 11 indicates a CPU within the disk controller, and this CPU II normally controls the interface between the host computer and the disk drives.

Reference numeral 12 denotes a data search control unit, which searches data in the error information buffer non-volatile RAM 14 for data equivalent to the error sector address sent from the internal CPU II of the disk controller using CPU path A. If there is equal data, the data search control section 12 activates the key address control device G.

If there is no equivalent data in the previously stored data, the data search control unit 12 writes the error sector address into the error information puffer nonvolatile RAM 14, and at the same time writes the initial value of the error count number.

Reference numeral 13 denotes an error count control unit, which increases the error count number when the RAM address control device is active. The error count control section 13 is.

When the error count exceeds a predetermined value, an error over statement I is activated.

14 is a non-volatile error information buffer.

Accumulate error information. The RAM 14 also generates final data No. 1 F, which signals the end of nine stored data.

15 is a key address control section, which is a key address control device G.
The address shield signal sent to the key address bus E is sequentially changed until the final data No. 1 F indicating the end of the stored data becomes active.

Reference numeral 16 denotes an alternative processing control unit, which performs alternative processing for the error sector address sent from the error information path B when the Nira-O No. 31 becomes active.

Next, the present invention will be explained in detail.

If the disk controller internal CPU II finds an error when performing a read or write operation to the disk drive, it sends the sector address where the error occurred to the data search control unit 12 through the CPU path A. The data search control section 12 is.

The sector address in which the error occurred sent from CPU path A is compared with the contents of the error information buffer nonvolatile RAM 14 sent from error information path B, and if they are equal to 1, the RAM address control device is activated. The RAM address control unit 15 sequentially changes the number of addresses sent to the RAM address bus E until the RAM address control signal G becomes active.

When key address control number G becomes active, RA
M Holds the value sent to address bus E.

When the RAM address control device becomes active, the error count control section 13 takes in the contents of the error counter path C, increments the count number by 1, and writes it into the error information buffer nonvolatile BAM 14. As a result, the number of errors at the already registered error sector address is stored in the error information packer nonvolatile RAM 14.

When the updated number of errors exceeds a predetermined value, the error count control unit 13 activates the error overlayer function. The alternative processing control unit 16 performs alternative processing on the sector address given from the error information path B through the drive interface J when error over No. 1 becomes active.

Furthermore, if the RAM address control section 15 detects the final data signal F sent from the error information puffer nonvolatile RAM 14 before the RAM address control signal G becomes active, it makes the data end signal H active.

When the data search control unit 12 detects that the data end signal H is active, it writes the sector address where the error occurred and the initial value "1" of the error count into the error information buffer nonvolatile RAM 14. As a result, error sector addresses that have not yet been registered are stored.

DETAILED DESCRIPTION OF THE INVENTION According to the present invention, a control device includes a non-volatile RAM that stores a sector address where an error occurs and the number of times an error occurs when a read operation or write operation is performed on a storage device. , a data search control unit that controls the write operation to the non-volatile RAM and compares the data written to the non-volatile RAM with the error sector address given from the CPU inside the control device;
By having an error count control unit that counts the number of errors that occur in the same sector address, and an alternative processing control unit that automatically performs alternative processing on a given sector address, it is determined whether it is a later defective sector address. The control device itself can determine the number of errors that have occurred at the same sector address, which is necessary for the process, and has the effect of automatically performing alternative processing.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an example of the winding of the present invention.

Claims (1)

[Claims] In a storage device, there is a non-volatile RAM that stores the sector address where an error occurred during a read or write operation and the number of times the error occurred, and a non-volatile RAM that controls write operations to this non-volatile RAM and data written to this non-volatile RAM. A data search control unit that compares error sector addresses given by the CPU inside the control device, an error count control unit that counts the number of errors that have occurred at the same sector address, and an automatic replacement of reported sector addresses. A control device comprising: an alternative processing control section for processing.