JPH01219827A - Active matrix type liquid crystal display device - Google Patents

Abstract

PURPOSE:To prevent a flicker from being generated by varying a scanning signal voltage which is applied to address lines in order abruptly at the time of a change from a holding potential to a write potential and varying the voltage gradually at the time of a change from the write potential to the holding potential. CONSTITUTION:The potential of an address line is varied abruptly at the time of the change from the holding potential VYL to the write potential VYH, which is held to turn on a thin film transistor (TR), thereby writing a display signal voltage Vx in a liquid crystal cell capacitor and a picture element voltage holding capacitor. Then the potential of the address line is varied from the write potential VYH to the holding potential VYL gradually to turn off the thin film TR gradually. Consequently, the voltage applied to liquid crystal is vertically symmetrical about the potential of the counter electrode and the flicker of image display is precluded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Application) The present invention relates to an active matrix liquid crystal display device.

(Prior Art) In recent years, active matrix type liquid crystal display devices with a large number of pixels and high density are being actively developed and put into practical use for use in television displays and the like.

As such active matrix type liquid crystal display devices, those shown in FIGS. 6 and 7 are known.

In FIG. 6, the active matrix type liquid crystal display device has an active matrix array composed of thin film transistors and the like. As a drive circuit, the address line Y
The address line drive circuit 1 drives the signal line X, and the signal line drive circuit 2 drives the signal line X.

FIG. 7 shows an active matrix array circuit. Each pixel is composed of a thin film transistor 3, a liquid crystal cell 4, and a signal voltage holding capacitor 5. Each gate terminal 6 of each thin film transistor 3 is connected to an address line Yj.
, Yj+1..., and each drain terminal 7 of the thin film transistor 3 is connected to the signal line Xi, Xi+1, respectively.
It is connected to... and together they form a matrix.

The operation of the conventional active matrix liquid crystal display device configured as described above will be explained with reference to FIG.

In the same figure, the waveform of the solid line is the scanning signal voltage Y1 supplied to the address line Yj... - The waveform of the dotted chain line is the signal line X
represents the display signal voltage Vx supplied to i...

Moreover, the waveform of the broken line is the pixel voltage Vs applied to the liquid crystal cell 4.
represents. The scanning signal voltage VY is the vertical scanning period Tf
The polarity of the display signal voltage Vx and the pixel voltage VS is inverted every vertical scanning period Tf. This is because AC drive is essential for liquid crystal display devices in order to improve the durability of the liquid crystal.

In this way, when the scanning signal voltage VY and the display signal voltage Vx are respectively supplied to the address line Y1 and the signal line is accumulated in the capacitance of the liquid crystal cell 4 and the signal voltage holding capacitor 5, and the pixel voltage Vs is charged to the display signal voltage Vx. After that, when the address line Y becomes the holding potential VYL,
The thin film transistor 3 is cut off, but at this time the pixel voltage Vs is determined by the liquid crystal cell 4 capacity ffi CLC, the signal voltage holding capacitor 5 capacity CS % gate 6 - source 8 capacitance CGS, and the gate voltage V YH-V YL. After the voltage drops from the display signal voltage Vx by the level shift ΔVs, it enters a holding state. The level shift ΔVs of the pixel voltage Vs is expressed by the following equation.

GS ΔV s −(VYH−VYL) CGS+ Cs + CLC Then, the held pixel voltage Vs is kept at a constant value until the next field. In the next field as well, the display signal voltage VX with the reversed polarity is written in the liquid crystal cell 4 and the signal voltage holding capacitor 5 as in the previous field, and the pixel voltage Vs is a voltage lower in potential by ΔVs than the display signal voltage Vx. hold. Potential of counter electrode 9■C0I
l is set approximately at the center of the pixel voltage VS whose polarity is inverted, so that the effective value of the voltage applied to the liquid crystal cell 4 on the positive and negative sides of polarity inversion is not asymmetrical.

By performing the driving as described above, the liquid crystal cell 4 can operate statically, so that it is possible to obtain a higher contrast and display a high quality image compared to a conventional simple matrix liquid crystal display device. Can be done.

Incidentally, in the active matrix type liquid crystal display device described above, the pixel voltage VS is kept at a constant value while the thin film transistor 3 is in the cutoff state, but in reality, the pixel voltage VS is kept at a constant value while the thin film transistor 3 is in the cutoff state. state, the liquid crystal cell 4 and pixel voltage holding capacitor 5
is not disconnected from the signal line Xi, and the signal line
i, the liquid crystal cell 4 and the pixel voltage holding capacitor 5,
High resistance off resistance Rof'f' between drain 7 and source 8
It is thought that the connection is made through.

Therefore, the pixel voltage Vs is not kept at a constant value during the cut-off period of the thin film transistor 3, but actually changes as shown in FIG.

As shown in FIG. 5, the conduction period Ton of the thin film transistor 3 is usually selected to be shorter than the cut-off period Tof'f.
5 μsec, Toff is approximately 16.5 isec. Therefore, the asymmetry of the pixel potential Vs between the positive field and the negative field of polarity reversal during the conduction period Ton hardly poses a problem in view of the response speed of the liquid crystal injected into the liquid crystal cell 4. However, during the cutoff period Tof'f', the pixel voltage Vs is a time constant consisting of the off resistance Roff' between the drain 7 and source 8 of the thin film transistor 3, the capacitance CLC of the liquid crystal cell 4, and the capacitance Cs of the pixel voltage holding capacitor 5. ΔVs from display signal voltage Vx
Leakage occurs toward the display signal voltage Vx from the voltage whose level has been shifted by the amount of the voltage, and asymmetry occurs in the Vs waveform between the high potential field and the low potential field, as shown in FIG.

This asymmetry of the pixel potential Vs cannot be ignored considering the response speed of the liquid crystal, and causes asymmetry in the optical response of the liquid crystal in the high potential field and the low potential field, resulting in a change in brightness between the two fields. Therefore, when the displayed image was observed, it was visually recognized as flicker, which was undesirable.

Further, due to the asymmetry of the pixel potential Vs in both fields as described above, a DC voltage is applied to the liquid crystal in the liquid crystal cell 4, which also causes problems in terms of the lifespan of the liquid crystal material.

Furthermore, even if the off-resistance Roff of the thin film transistor 3 is sufficiently large and the leakage of the pixel potential Vs during the cut-off period Toff is negligibly small, the following problems occur when performing multi-gradation display. It was happening.

That is, the liquid crystal cell 4 capacitance CLC changes depending on the voltage applied to the liquid crystal cell 4. Therefore, the level shift ΔVs of the pixel potential varies depending on the display signal voltage Vx, as can be seen from the above equation. Therefore, at a certain display signal voltage VX, the voltage v cow of the counter electrode 7 is adjusted so that there is no asymmetry in the voltage applied to the liquid crystal cell 4.
Even if flicker is suppressed by setting , when displaying another gradation using a display signal voltage different from this, the difference in level shift ΔVs of pixel potential causes the difference in voltage applied to the liquid crystal between the high potential field and the low potential field. Asymmetry may occur in the applied voltage, resulting in flicker in the display.

(Problems to be Solved by the Invention) As described above, the conventional active matrix liquid crystal display device has a problem in that flicker occurs in image display.

The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide an active matrix liquid crystal display device that can prevent flicker from occurring in image display.

[Structure of the Invention (Means for Solving the Problems)] The present invention provides an active device in which a large number of address lines and a large number of signal lines that are orthogonal to each other are formed, and pixels having switching elements are formed at the intersections of these lines. In a matrix type liquid crystal display device, the scanning signal voltages sequentially applied to address lines are changed sharply when changing from a holding potential to a writing potential, and gradually changed when changing from a writing potential to a holding potential. This is what I did.

(Function) In the present invention, since the liquid crystal is driven with a small level difference between the display signal voltage and the pixel voltage immediately after writing, the voltage applied to the liquid crystal is vertically symmetrical with respect to the counter electrode potential, and flickering occurs in image display. - can be prevented from occurring.

(Example) Hereinafter, an example of the present invention will be described in detail based on the drawings.

FIG. 1 is a diagram for explaining driving waveforms in an active matrix liquid crystal display device according to an embodiment of the present invention.

As shown in the figure, the scanning signal voltage VY is the holding potential VY
It has an L state and a write potential VYH state.

The potential of the address line Y changes sharply from the holding potential VYL to the write potential VYH, and then maintains the write potential VYH and makes the thin film transistor 3 conductive, and the display signal voltage Vx changes to the liquid crystal cell capacitor CLC and the pixel voltage holding. data is sufficiently written to the capacitor 5 for use. Next, the potential of the address line Y is changed from the write potential VYI+ to the holding potential VYL.
By gradually changing the change in , the thin film transistor 3 is gradually changed from a conductive state to a cutoff state.

Therefore, when the potential of the address line Y is gradually changed from VYH to VYL, the source 8 of the thin film transistor 3 is turned off before the thin film transistor 3 is completely turned off.
・Since charge is transferred between the signal line X, the signal voltage holding capacitor 5, and the liquid crystal cell 4 capacitor Cs through the drain 7 resistor RDS, it is possible to significantly reduce the level shift ΔVs of the pixel potential Vs. As a result, even if the pixel voltage Vs leaks to the display signal voltage Vx side because the off-resistance Rofr between the drain 7 and source 8 of the thin film transistor 3 cannot be made sufficiently large in the holding state, it will not be applied to the liquid crystal. The voltage is approximately symmetrical to the potential vco11 of the counter electrode 9.

Furthermore, since the level shift itself of the pixel potential Vs can be reduced, it becomes possible to uniquely determine the counter electrode 9 potential v com regardless of the amplitude of the display signal voltage Vx, and even when performing gradation display, It is possible to prevent flicker from occurring in the display.

In addition, in the above-mentioned embodiment, a case was shown in which the scanning signal voltage vy changes from the write potential VYH to the holding potential VYL at a constant rate of change, but as shown in FIG.
A similar effect can be obtained when Y is changed in a stepwise manner or when the scanning signal voltage vY is changed in a curved manner as shown in FIG.

[Effects of the Invention] As explained above, the active matrix type liquid crystal display device of the present invention performs liquid crystal driving with a small level difference between the display signal voltage and the pixel voltage immediately after writing, so the voltage applied to the liquid crystal is It is vertically symmetrical with respect to the same electrode potential, and it is possible to prevent flicker from occurring in image display.

[Brief explanation of the drawing]

FIG. 1 is a diagram for explaining driving waveforms in an active matrix type liquid crystal display device according to one embodiment of the present invention, and FIGS. 2 and 3 are diagrams for explaining driving waveforms in an active matrix type liquid crystal display device according to another embodiment of the present invention. Figures 4 and 5 are diagrams for explaining the drive waveforms of a conventional active matrix liquid crystal display device. Figure 6 is a diagram for explaining the configuration of a conventional active matrix liquid crystal display device. and FIG. 7 are equivalent circuit diagrams of the active matrix array of FIG. 6. DESCRIPTION OF SYMBOLS 1...Address line drive circuit, 3...Thin film transistor, Y...Address line, vY...Scanning signal voltage, V
YH...Writing potential, VYL...Holding potential. Applicant Toshiba Corporation Patent Attorney Sasa Suyama - Figure 1 Figure 3 Figure 4 Figure 6

Claims (1)

[Claims] (1) In an active matrix liquid crystal display device in which a large number of address lines and a large number of signal lines that are orthogonal to each other are formed, and pixels having switching elements are formed at the intersections of these lines, a voltage is sequentially applied to the address lines. An active matrix type liquid crystal display device characterized in that the scanning signal voltage is changed sharply when changing from a holding potential to a writing potential, and gradually changed when changing from a writing potential to a holding potential.