CN107479289B - Pixel structure and array substrate - Google Patents
Pixel structure and array substrate Download PDFInfo
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- CN107479289B CN107479289B CN201710822527.6A CN201710822527A CN107479289B CN 107479289 B CN107479289 B CN 107479289B CN 201710822527 A CN201710822527 A CN 201710822527A CN 107479289 B CN107479289 B CN 107479289B
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- G—PHYSICS
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136213—Storage capacitors associated with the pixel electrode
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- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/13306—Circuit arrangements or driving methods for the control of single liquid crystal cells
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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Abstract
The embodiment of the invention discloses a pixel structure and an array substrate, wherein the pixel structure comprises: the pixel unit, the data line and the first scanning line; the pixel unit comprises a Thin Film Transistor (TFT) and a pixel electrode; the grid electrode of the TFT is electrically connected with the first scanning line; one end of a drain electrode and one end of a source electrode of the TFT are electrically connected with the data line, and the other end of the TFT is electrically connected with the pixel electrode; a liquid crystal capacitor is formed between the pixel electrode and the common electrode; and a storage capacitor is formed between the pixel electrode and a second scanning line, and the second scanning line is the next scanning line of the first scanning line. After the TFT is started, the data line charges the pixel electrode, and in the charging process, the driving voltage on the second scanning line is adjusted from a first voltage to a second voltage. By implementing the embodiment of the invention, the charging performance can be improved, and the display effect is improved.
Description
Technical Field
The invention relates to the technical field of liquid crystal display, in particular to a pixel structure and an array substrate.
Background
In the information society of today, Thin Film Transistor liquid crystal displays (TFT LCDs) have been widely used in various aspects of our lives, including small-sized mobile phones, video cameras, digital cameras, medium-sized notebook computers, desktop computers, large-sized household televisions, large-sized projection equipment, and the like, and TFTLCDs have the advantages of light weight and thinness, and have perfect pictures and fast response characteristics, thereby ensuring that they occupy the place of the great priority in the Display market.
In an active matrix Liquid Crystal Display (LCD), each pixel has a Thin Film Transistor (TFT) having a gate connected to a scan line in a horizontal direction, a drain connected to a data line in a vertical direction, and a source connected to a pixel electrode. On the same scanning line in the horizontal direction, because the grid electrodes of all the TFTs are connected together, the applied voltage is interlocked; if a positive voltage is applied to a scan line, all TFTs on the scan line are turned on; at this time, the pixel electrodes on the scanning lines are connected with the data lines in the vertical direction, and corresponding video signals are sent through the data lines so as to charge the pixel electrodes to proper voltage; then a sufficiently large negative voltage is applied, turning off the TFT until the next time the signal is rewritten again, during which time charge is stored on the liquid crystal capacitance. At this time, the next horizontal scanning line is started again, and the corresponding video signal is sent. Thus, the video data of the whole frame is written in sequence, and then the first re-writing signal is re-written, and the pixel array in the liquid crystal panel is as shown in fig. 1.
The resolution of a full-high-definition liquid crystal panel is usually 1920 × 1080, and the on time of each row of scanning lines is about 1/(60 × 1080) ≈ 15.4ms in the case of a screen refresh frequency of 60 Hz. As the size of the liquid crystal panel is larger and the resolution is higher, the on time of each row of scanning lines is further compressed, which may cause the liquid crystal panel to be under-charged. In fact, in order to avoid pixel electrical charge, the writing time of the pixel signal is usually shorter than the turn-on time of the scan line, which will aggravate the occurrence of the undercharge condition of the liquid crystal panel, as shown in fig. 2, where t1 is the turn-on time of the scan line and t2 is the writing time of the pixel signal.
The conventional approach to solve the above problem is to increase the line widths of the scan lines and the data lines to improve the charging deficiency, but this approach will lose the aperture ratio of the pixels and reduce the transmittance of the liquid crystal panel.
Disclosure of Invention
Embodiments of the present invention provide a pixel structure and an array substrate, which can improve charging performance and display effect.
A first aspect of an embodiment of the present invention provides a pixel structure, including:
the pixel unit, the data line and the first scanning line; the pixel unit comprises a Thin Film Transistor (TFT) and a pixel electrode;
the grid electrode of the TFT is electrically connected with the first scanning line; one end of a drain electrode and one end of a source electrode of the TFT are electrically connected with the data line, and the other end of the TFT is electrically connected with the pixel electrode; a liquid crystal capacitor is formed between the pixel electrode and the common electrode; a storage capacitor is formed between the pixel electrode and a second scanning line, and the second scanning line is a next scanning line of the first scanning line;
after the voltage applied to the TFT by the first scanning line exceeds the initial voltage, a conducting channel is formed between the source electrode of the TFT and the drain electrode of the TFT; the data line charges the pixel electrode through the channel within a first time length after the channel is formed; the first time length is divided into a second time length and a third time length according to the time sequence, the second scanning line is kept at a first voltage in the second time length, the second scanning line is kept at a second voltage in the third time length, the first voltage is lower than or higher than the second voltage, and the second voltage is the voltage for turning off the TFT; the starting voltage is the lowest voltage required for the source and drain of the TFT to conduct.
In a second aspect, an array substrate is provided, which includes the pixel structure of the first aspect.
A third aspect of the embodiments of the present invention provides a charging method, where the method is applied to a pixel structure, and the pixel structure includes: the pixel unit, the data line and the first scanning line; the pixel unit comprises a Thin Film Transistor (TFT), a pixel electrode, a liquid crystal capacitor and a storage capacitor;
the grid electrode of the TFT is connected with the first scanning line, the drain electrode of the TFT is connected with the data line, and the source electrode of the TFT is connected with the pixel electrode; one end of the liquid crystal capacitor is connected with the pixel electrode, and the other end of the liquid crystal capacitor is connected with the common electrode; one end of the storage capacitor is connected with the pixel electrode, and the other end of the storage capacitor is connected with a second scanning line which is the next scanning line of the first scanning line;
the charging method comprises the following steps:
after the voltage applied to the TFT by the first scanning line exceeds the initial voltage, a conducting channel is formed between the source electrode of the TFT and the drain electrode of the TFT; the data line charges the pixel electrode through the channel within a first time length after the channel is formed; the first time length is divided into a second time length and a third time length according to the time sequence, the second scanning line is kept at a first voltage in the second time length, the second scanning line is kept at a second voltage in the third time length, the first voltage is lower than or higher than the second voltage, and the second voltage is the voltage for turning off the TFT; the starting voltage is the lowest voltage required for the source and drain of the TFT to conduct.
In the embodiment of the invention, the (N + 1) th scanning line is used as the polar plate of the storage capacitor on the (N) th scanning line, and the charging current in the starting state of the TFT can be improved and the charging performance is improved by controlling the voltage applied to the TFT by the (N + 1) th scanning line.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a pixel array according to an embodiment of the disclosure;
FIG. 2 is a diagram illustrating scan line on time and pixel writing time according to an embodiment of the present invention;
fig. 3 is an equivalent circuit diagram of a pixel structure disclosed in the prior art;
fig. 4 is an equivalent circuit diagram of a pixel structure according to an embodiment of the disclosure;
FIG. 5 is a waveform diagram of a driving voltage on a scan line according to an embodiment of the present invention;
fig. 6 is a waveform diagram of a driving voltage on another scan line according to an embodiment of the disclosure.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It is to be understood that the described embodiments are only a few embodiments of the present invention, and not all embodiments. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, shall fall within the scope of the present invention.
Furthermore, the following description of the various embodiments refers to the accompanying drawings, which illustrate specific embodiments in which the invention may be practiced. Directional phrases used in this disclosure, such as, for example, "upper," "lower," "front," "rear," "left," "right," "inner," "outer," "side," and the like, refer only to the orientation of the appended drawings and are, therefore, used herein for better and clearer illustration and understanding of the invention, and do not indicate or imply that the device or element so referred to must have a particular orientation, be constructed and operated in a particular orientation, and are therefore not to be considered limiting of the invention.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as being fixedly connected, detachably connected, or integrally connected; may be a mechanical connection; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
In addition, in the description of the present invention, "a plurality" means two or more unless otherwise specified. In the present specification, the term "step" is used to mean not only an independent step but also a step that is not clearly distinguished from other steps, provided that the intended function of the step is achieved. In the present specification, the numerical range represented by "to" means a range including numerical values before and after "to" as a minimum value and a maximum value, respectively. In the drawings, elements having similar or identical structures are denoted by the same reference numerals.
Embodiments of the present invention provide a pixel structure, which can improve charging performance and display effect. The following are detailed below.
Referring to fig. 3, fig. 3 is an equivalent circuit diagram of a pixel structure in the prior art. As shown in fig. 3, the pixel structure described in this embodiment includes: pixel unit 30, data line 31, and scan line 32; the pixel unit 30 includes a thin film transistor TFT301 and a pixel electrode 302; a gate 3011 of the TFT is electrically connected to the scanning line 32, a drain 3012 of the TFT is electrically connected to the data line 31, and a source 3013 of the TFT is electrically connected to the pixel electrode 302; a liquid crystal capacitor 303 is formed between the pixel electrode 302 and the common electrode 33; a storage capacitor 304 is formed between the pixel electrode 302 and the common electrode line 34. The voltage of the common electrode is a common electrode voltage (Vcom), which is also referred to as a "common voltage". The pixel electrode 302 and the common electrode 33 are located on different glasses, and the pixel electrode 302 and the common electrode line 34 are located on the same glass. It is to be understood that the common electrode 33 and the common electrode line 34 are located on different glasses. The common electrode and the common electrode line may have the same voltage. In the pixel structure, one end of the storage capacitor is connected with the common electrode wire, so that on one hand, the routing of the common electrode wire is increased, and the aperture opening ratio of the pixel is improved; on the other hand, the voltage at this end is only constant and cannot be adjusted.
Referring to fig. 4, fig. 4 is an equivalent circuit diagram of a pixel structure according to an embodiment of the disclosure. As shown in fig. 4, the pixel structure described in this embodiment includes: pixel unit 40, data line 41, and first scan line 42; the pixel unit 40 includes a thin film transistor TFT401 and a pixel electrode 402; a gate electrode 4011 of the TFT is electrically connected to the first scan line 42; one end 4012 of the drain electrode and the source electrode of the TFT is electrically connected to the data line 41, and the other end 4013 is electrically connected to the pixel electrode 402; a liquid crystal capacitor 403 is formed between the pixel electrode 402 and the common electrode; a storage capacitor 404 is formed between the pixel electrode 402 and a second scan line, which is a scan line next to the first scan line 42. The triangles in fig. 4 represent the common electrodes, and the circles represent the second scan lines. It can be understood that, in the embodiment of the present invention, the TFT may adopt two connection manners, one connection manner is that the source electrode of the TFT is connected to the data line, and the drain electrode is connected to the pixel electrode, that is, 4012 in the figure is the source electrode of the TFT, 4013 is the drain electrode; in another connection mode, the drain electrode of the TFT is connected with the data line, and the source electrode is connected with the pixel electrode, namely 4012 in the figure is the drain electrode of the TFT, and 4013 is the source electrode. The TFT in the embodiments of the present invention may adopt any connection method. The voltage of the common electrode is a common electrode voltage (Vcom), which is also referred to as a "common voltage". The storage capacitor in the pixel structure provided by the embodiment of the invention does not need to be connected with the common electrode wire, so that the routing of the common electrode wire can be reduced, and the aperture opening ratio of the pixel is improved.
The charging operation that the common pixel structure can execute in the embodiment of the invention is as follows: a channel for establishing conduction between the source and drain of the TFT401 when the voltage applied to the TFT401 by the first scanning line 42 exceeds a threshold voltage; the data line 41 charges the pixel electrode 40 through the channel for a first period of time after the channel is formed; the first period is divided into a second period in which the second scan line is held at a first voltage and a third period in which the second scan line is held at a second voltage, the first voltage being lower or higher than the second voltage, the second voltage being a voltage for turning off the TFT 401; the threshold voltage is the minimum voltage required for turning on the source and drain of the TFT.
Since the first scan line 42 is electrically connected to the gate 4011 of the TFT, the voltage applied to the TFT401 by the first scan line 42 is a driving voltage on the first scan line 42. When the voltage applied to the TF401T by the first scan line 42 exceeds the threshold voltage, the driving voltage applied to the first scan line 42 may exceed the threshold voltage. It is understood that the first scan line 42 controls the turn-on and turn-off of the TFT under the action of the driving voltage. For example, if the voltage value of the driving voltage on the first scan line exceeds the threshold voltage, the TFT is turned on, i.e., the drain and the source of the TFT are turned on. For another example, in the case that the TFT is in the on state, if the voltage value of the driving voltage on the first scan line is smaller than the initial voltage, the TFT is turned off, that is, the channel between the drain and the source of the TFT is disconnected. For another example, in the case where the TFT is in the off state, if the voltage value of the driving voltage on the first scan line is smaller than the initial voltage, the TFT maintains the off state, that is, the channel between the drain and the source of the TFT is disconnected. After the TFT401 is turned on, the data line 41 may write a corresponding signal into the liquid crystal capacitor 403, and after the TFT401 is turned off, the TFT may prevent a signal from leaking from the liquid crystal capacitor 403. Since the TFT is turned on, that is, the source electrode of the TFT and the drain electrode of the TFT are turned on, it is considered that the data line 41 charges the pixel electrode 40 immediately after the driving voltage on the first scan line exceeds the threshold voltage. The channel formed between the source and drain of the TFT401 may be an a-Si channel that induces electrons to turn on the source and drain of the TFT 401. The first duration is a total duration of charging, and the second duration and the third duration constitute the first duration. For example, the first time period is first to fifth seconds, the second time period is first to third seconds, and the third time period is third to fifth seconds. The second scan line may be maintained at the first voltage for the second period, and the second scan line may be maintained at the second voltage for the third period, where the driving voltage of the second scan line is the first voltage for the second period, and the second voltage for the third period. It is to be understood that the voltage values of the driving voltage on the second scanning line in the second period and the third period are different. The waveforms in the lower half of fig. 5 are waveforms corresponding to the driving voltages on the second scan lines, as shown in the lower half of fig. 5, t2 represents the second time period, t3 represents the third time period, the driving voltage is V2, i.e., the first voltage, during t2, the driving voltage is V1, i.e., the second voltage, during t3, and V1 is greater than V2. The waveforms in the lower half of fig. 6 are waveforms corresponding to the driving voltages on the second scan lines, as shown in the lower half of fig. 6, t5 represents the second time period, t6 represents the third time period, the driving voltage is V4, i.e., the first voltage, during t5, the driving voltage is V1, i.e., the second voltage, during t6, and V1 is less than V4.
In the currently adopted scheme, one end of the storage capacitor is connected to the common electrode, and the voltage of the end is kept constant. In the embodiment of the invention, one end of the storage capacitor is connected with the second scanning line, the voltage of the end is the same as the driving voltage on the second scanning line, and the driving voltage is controlled to improve the charging speed of the data line to the pixel electrode and improve the charging performance.
Since the liquid crystal molecules cannot be under the same voltage for a long time, otherwise, the liquid crystal molecules cannot be deflected under the action of an electric field due to the change of characteristics. In order to prevent the liquid crystal molecular characteristics from being deteriorated, the liquid crystal panel performs display by a driving method of polarity inversion. The voltage of the pixel electrode (voltage of the pixel electrode, simply referred to as "pixel voltage") in the liquid crystal display is divided into two polarities, one of which is positive and the other of which is negative. When the pixel voltage is higher than the common voltage Vcom, it is called positive polarity. And, when the pixel voltage is lower than the common voltage (Vcom), it is called a negative polarity. In the embodiment of the present invention, the pixel electrode is also driven by polarity inversion, i.e., positive polarity and negative polarity are alternately changed.
When the voltage of the pixel electrode is lower than the voltage of the common electrode, the first voltage is lower than the second voltage, i.e. when the voltage of the pixel electrode is negative, the first voltage is lower than the second voltage, before the channel is formed, the voltage applied to the TFT by the second scan line is adjusted from the second voltage to the first voltage, a specific example of an embodiment of the present invention is that the voltage of the pixel electrode is 1V, the source potential is 1V, the drain potential is 14V, the common electrode is 7V, as shown in fig. 5, V is the off voltage of the TFT, i.e. the second voltage, V is-6V, V is the on voltage of the TFT, V is 33V, V is the first voltage, V is less than V1, before the TFT is turned on, i.e. before the channel is formed, the voltage applied to the TFT is adjusted from the second voltage to the first voltage, as shown in fig. 5, before the TFT is turned on, i.e. before the channel is formed, the channel is turned on, the voltage applied to the second scan line is adjusted from the first voltage to the first voltage, the second voltage, i.e. the voltage is decreased, the voltage is not decreased during the time interval of the second scan line, i.e. after the scan line is changed from the scan line, the scan line is not increased, the scan line is not decreased, the scan line is the scan line, the scan line is not decreased, the scan line is the scan line, the scan line is not increased, the scan line is not increased, the scan line, i.e. the scan line, the scan line is not increased, the scan line is not increased, the scan line is the scan line, the scan line is not increased, the scan line is not increased, the scan line is not increased, the scan line.
In the embodiment of the invention, under the condition that the voltage of the pixel electrode is negative, the charging speed of the data line to the pixel electrode can be improved by adjusting the voltage of the storage capacitor, and the charging performance is improved.
In the foregoing embodiment, the first scan line is further configured to turn off the TFT at a target time point when the channel formation time reaches the first time length;
the second scan line is further configured to turn on the TFT corresponding to the second scan line at the target time point.
The turning off of the TFT at the target time point by the first scan line may be a reduction of the driving voltage on the first scan line to the second voltage. The TFT corresponding to the second scan line turned on at the target time point may be a driving voltage on the second scan line increased to a target voltage, where the target voltage is greater than the threshold voltage. The second scan line turns on the TFT corresponding to the second scan line at the same time when the TFT is turned off by the first scan line or immediately after the TFT is turned off by the first scan line. As can be seen from fig. 5, at the same time point, i.e., the target time point, the driving voltage on the first scan line is decreased from V3 to V1, and the voltage on the second scan line is increased from V1 to V3.
In the embodiment of the invention, the starting time of the scanning line can be saved by starting the TFT in time.
In the above embodiment, the second scanning line is maintained at the second voltage until the voltage applied to the TFT by the second scanning line is adjusted from the second voltage to the first voltage.
The second voltage to be maintained in the second scanning line may be a driving voltage to be maintained in the second scanning line. The second scanning line is kept at the second voltage, so that the leakage of signals from the liquid crystal capacitor can be effectively prevented, and the driving voltage on the second scanning line only needs to be kept at the second voltage, so that the realization is simple.
In the embodiment of the invention, the signal can be effectively prevented from leaking from the liquid crystal capacitor, and the implementation is simple.
In a specific example of the present invention, the voltage applied to the TFT by the second scan line is adjusted from the second voltage to the first voltage when the voltage of the pixel electrode is positive, the source voltage is 14V, the drain voltage is 1V, the common electrode is 7V, as shown in fig. 6, V is the off voltage of the TFT, i.e., the second voltage, V is-6V, V is the on voltage of the TFT, V is 33V, V is the first voltage, V is greater than 1, before the TFT is turned on, i.e., before the channel is formed, the voltage applied to the TFT by the second scan line is adjusted from the second voltage to the first voltage, as shown in fig. 6, the voltage applied to the TFT is increased from the second voltage to the first voltage, as shown in fig. 6, i.e., before the TFT is turned on, i.e., during the time period before the channel is formed, the voltage applied to the second scan line is increased from the second voltage, i.e., the voltage is increased from the voltage applied to the second voltage, i.e., during the time period before the TFT is turned on, the pixel electrode is changed from the second voltage, i.e., the voltage is increased, the voltage applied to the second voltage, the voltage applied to the pixel electrode is not increased during the time period after the time period of the pixel electrode is changed from the second voltage, i.e., the pixel electrode is changed from the pixel electrode, i.e., the pixel electrode is changed from the pixel electrode is not increased, i.e., the pixel electrode is maintained, i.e., the pixel is maintained, the pixel electrode is maintained, the pixel is maintained at the pixel, the pixel is maintained at the pixel, the pixel is maintained at the pixel, the pixel is maintained at the time period of the time period after the time period of the.
In the embodiment of the invention, under the condition that the voltage of the pixel electrode is positive, the charging speed of the data line to the pixel electrode can be improved by adjusting the voltage of the storage capacitor, and the charging performance is improved.
In the foregoing embodiment, the first scan line is further configured to turn off the TFT at a target time point when the channel formation time reaches the first time length;
the second scan line is further configured to turn on the TFT corresponding to the second scan line at the target time point.
The turning off of the TFT at the target time point by the first scan line may be a reduction of the driving voltage on the first scan line to the second voltage. The TFT corresponding to the second scan line turned on at the target time point may be a driving voltage on the second scan line increased to a target voltage, where the target voltage is greater than the threshold voltage. The second scan line turns on the TFT corresponding to the second scan line at the same time when the TFT is turned off by the first scan line or at the moment after the TFT is turned off by the first scan line. As can be seen from fig. 6, at the same time point, i.e., the target time point, the driving voltage on the first scan line is decreased from V3 to V1, and the voltage on the second scan line is increased from V1 to V3.
In the embodiment of the invention, the starting time of the scanning line can be saved by starting the TFT in time.
In the above embodiment, the second scanning line is maintained at the second voltage until the voltage applied to the TFT by the second scanning line is adjusted from the second voltage to the first voltage.
The second voltage to be maintained in the second scanning line may be a driving voltage to be maintained in the second scanning line. The second scanning line is kept at the second voltage, so that the leakage of signals from the liquid crystal capacitor can be effectively prevented, and the driving voltage on the second scanning line only needs to be kept at the second voltage, so that the realization is simple.
In the embodiment of the invention, the signal can be effectively prevented from leaking from the liquid crystal capacitor, and the implementation is simple.
In the foregoing embodiments, the charging process when the voltage of the pixel electrode is positive polarity and the charging process when the voltage of the pixel electrode is negative polarity are described separately. In practical applications, the polarity of the voltage of the pixel electrode is alternated due to the alternation of the voltage of the data line. For example, when the voltage of the pixel electrode is negative polarity, the waveforms of the driving voltages on the first scan line and the second scan line are as shown in fig. 5, and when the voltage of the pixel electrode is positive polarity, the waveforms of the driving voltages on the first scan line and the second scan line are as shown in fig. 6. The pixel structure in the embodiment of the invention alternately performs the charging operation of the pixel electrode under the positive polarity and the charging operation under the negative polarity, thereby improving the charging speed.
In an embodiment of the invention, an array substrate is provided, which includes the pixel structure in any of the above embodiments and can perform any of the above charging methods.
The embodiment of the invention provides a charging method, which is applied to a pixel structure, wherein the pixel structure comprises the following components: the pixel unit, the data line and the first scanning line; the pixel unit comprises a Thin Film Transistor (TFT) and a pixel electrode;
a gate electrode of the TFT is electrically connected to the first scan line; one end of the drain electrode and the source electrode of the TFT is electrically connected with the data line, and the other end is electrically connected with the pixel electrode; a liquid crystal capacitor is formed between the pixel electrode and the common electrode; a storage capacitor is formed between the pixel electrode and a second scanning line, wherein the second scanning line is a next scanning line of the first scanning line;
the charging method comprises the following steps:
a channel for forming conduction between the source of the TFT and the drain of the TFT after the voltage applied to the TFT by the first scanning line exceeds a starting voltage; the data line charges the pixel electrode through the channel within a first time period after the channel is formed; the first period is divided into a second period in which the second scan line is held at a first voltage and a third period in which the second scan line is held at a second voltage, the first voltage being lower or higher than the second voltage, the second voltage being a voltage for turning off the TFT, in chronological order; the threshold voltage is the minimum voltage required for turning on the source and drain of the TFT.
In the embodiment of the invention, the (N + 1) th scanning line is used as the polar plate of the storage capacitor on the (N) th scanning line, and the charging current in the starting state of the TFT can be improved and the charging performance is improved by controlling the voltage applied to the TFT by the (N + 1) th scanning line.
The pixel structure provided by the embodiment of the present invention is described in detail above, and the principle and the implementation of the present invention are explained in this document by applying specific examples, and the description of the above embodiments is only used to help understanding the method and the core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in view of the above, the content of the present specification should not be construed as a limitation to the present invention.
Claims (5)
1. A pixel structure, comprising:
the pixel unit, the data line and the first scanning line; the pixel unit comprises a Thin Film Transistor (TFT) and a pixel electrode;
the grid electrode of the TFT is electrically connected with the first scanning line; one end of a drain electrode and one end of a source electrode of the TFT are electrically connected with the data line, and the other end of the TFT is electrically connected with the pixel electrode; a liquid crystal capacitor is formed between the pixel electrode and the common electrode; a storage capacitor is formed between the pixel electrode and a second scanning line, and the second scanning line is a next scanning line of the first scanning line;
after the voltage applied to the TFT by the first scanning line exceeds the initial voltage, a conducting channel is formed between the source electrode of the TFT and the drain electrode of the TFT; the data line charges the pixel electrode through the channel within a first time length after the channel is formed; the first time length is divided into a second time length and a third time length according to the time sequence, the second scanning line is kept at a first voltage in the second time length, the second scanning line is kept at a second voltage in the third time length, the first voltage is lower than or higher than the second voltage, and the second voltage is the voltage for turning off the TFT; the starting voltage is the lowest voltage required by the conduction of the source electrode and the drain electrode of the TFT;
in the case where the voltage of the pixel electrode is lower than the voltage of the common electrode, the first voltage is lower than the second voltage;
the first voltage is higher than the second voltage in a case where a voltage of the pixel electrode is higher than a voltage of the common electrode.
2. The pixel structure of claim 1, wherein the first and second electrodes are disposed on opposite sides of the substrate,
the voltage applied to the TFT by the second scan line is adjusted from the second voltage to the first voltage before the channel is formed.
3. The pixel structure of claim 1 or 2, wherein the first and second electrodes are disposed on opposite sides of the substrate,
the first scanning line is further configured to turn off the TFT at a target time point, where the target time point is a time point when a time for forming the channel reaches the first time length;
and the second scanning line is also used for starting the TFT corresponding to the second scanning line at the target time point.
4. The pixel structure of claim 3, wherein the second scan line is maintained at the second voltage before the voltage applied to the TFT by the second scan line is adjusted from the second voltage to the first voltage.
5. An array substrate comprising the pixel structure of any one of claims 1 to 4.
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| TWI784509B (en) * | 2020-05-12 | 2022-11-21 | 立景光電股份有限公司 | Liquid crystal on silicon panel and projection apparatus |
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| JPH11344959A (en) * | 1998-06-03 | 1999-12-14 | Matsushita Electric Ind Co Ltd | Method for driving liquid crystal panel |
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