JPH01218118A - Delay circuit - Google Patents

Delay circuit

Info

Publication number
JPH01218118A
JPH01218118A JP4259988A JP4259988A JPH01218118A JP H01218118 A JPH01218118 A JP H01218118A JP 4259988 A JP4259988 A JP 4259988A JP 4259988 A JP4259988 A JP 4259988A JP H01218118 A JPH01218118 A JP H01218118A
Authority
JP
Japan
Prior art keywords
frequency
signal
circuit
delay
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4259988A
Other languages
Japanese (ja)
Inventor
Kazuhiro Oguro
一弘 大黒
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP4259988A priority Critical patent/JPH01218118A/en
Publication of JPH01218118A publication Critical patent/JPH01218118A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To delay a signal of a microwave band by millisecond or over by converting a microwave band signal into a low frequency, retarding the signal at a frequency region where the delay element whose delay is possible in millisecond or over and converting the frequency into the original frequency region. CONSTITUTION:A 1st frequency mixing circuit 2 receiving a signal at an input terminal 1, a 1st band pass filter using a frequency lower than the signal frequency of the input terminal 1 as its pass band, and a delay element 4 are provided to the circuit. Moreover, a 2nd frequency mixing circuit 5 receiving an output signal of the delay element 4 as the input, a 2nd band pass filter 6 using the frequency equal to the signal frequency of the input terminal 1 and passing through the output signal of the circuit 5 as the pass band and a local oscillation circuit 7 are provided to the circuit. Furthermore, the output signal of the local oscillation circuit 7 is branched to be fed to the 1st frequency mixing circuit 2 and the 2nd frequency mixing circuit 5 by a branch circuit 8 and also an output terminal 9 is provided. Thus, the microwave band signal is retarded by millisecond or over and the delay circuit without amplitude attenuation and waveform deterioration is obtained.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はマイクロ波通信装置に利用するに適する。[Detailed description of the invention] [Industrial application field] The present invention is suitable for use in microwave communication devices.

〔従来の技術〕[Conventional technology]

マイクロ波帯の信号を遅延させるためには、表面弾性波
(SAW)を利用したSAWデバイスが多用されている
。このSAWデバイスの遅延量を大きくするには、用い
る基板のサイズを大きくするか、音速の遅い材料を用い
る必要がある。SAWデバイス以外には、同軸ケーブル
による遅延回路も利用されている。
SAW devices that utilize surface acoustic waves (SAW) are often used to delay signals in the microwave band. In order to increase the amount of delay in this SAW device, it is necessary to increase the size of the substrate used or to use a material with a low sound velocity. In addition to SAW devices, delay circuits using coaxial cables are also used.

〔問題点を解決するための手段〕[Means for solving problems]

しかし、SAWデバイスでは絶対遅延量に限界がありせ
いぜい10μsec程度である。一方向軸ケーブルによ
る遅延量は約5 n5ec/mと一定であるから、その
絶対遅延量は用いるケーブルの長さに比例する。ケーブ
ルの長さが増加すると、振幅が減衰すると共に波形劣化
が発生するなどの欠点がある。。
However, in SAW devices, there is a limit to the absolute amount of delay, which is about 10 μsec at most. Since the amount of delay due to a unidirectional axial cable is constant at approximately 5 n5 ec/m, the absolute amount of delay is proportional to the length of the cable used. As the length of the cable increases, there are disadvantages such as amplitude attenuation and waveform deterioration. .

このように、マイクロ波帯の信号を上記回路素子でミリ
セカンド以上遅延させることはほとんど不可能である。
In this way, it is almost impossible to delay a microwave band signal by milliseconds or more using the circuit element described above.

本発明は、マイクロ波帯の信号をミリセカンド以上遅延
させるための回路であり、かつ、振幅減衰と波形劣化を
伴わない遅延回路を提供することを目的とする。
SUMMARY OF THE INVENTION An object of the present invention is to provide a delay circuit for delaying a microwave band signal by milliseconds or more, and which does not cause amplitude attenuation or waveform deterioration.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、マイクロ波帯の信号を低い周波数に変換して
、ミリセカンド以上の遅延が可能な遅延素子が動作する
周波数領域で信号を遅延させたのち、元の周波数領域に
周波数変換することを主要な特徴とするものであり、従
来技術とは信号を周波数変換した低い周波数の領域で遅
延させる点で異なるものである。
The present invention converts a microwave band signal to a lower frequency, delays the signal in a frequency range in which a delay element capable of delaying milliseconds or more operates, and then converts the signal back to the original frequency range. This is the main feature, and differs from the conventional technology in that the signal is delayed in a low frequency region after frequency conversion.

〔作用〕[Effect]

マイクロ波を時間の大きい遅延素子を利用できる程度の
低い周波数に変換し、遅延素子により遅延を与えた後に
、元の周波数に変換する。これにより、遅延素子として
、FIRディジタルフィルタ、CCDあるいはBBDな
どのトランスファ・デバイス、あるいはディジタルメモ
リへの書込および続出など、きわめて広範囲な素子を利
用することができる。
The microwave is converted to a low frequency that allows the use of a delay element with a long time, and after a delay is given by the delay element, it is converted back to the original frequency. This makes it possible to use a wide variety of elements as delay elements, such as FIR digital filters, transfer devices such as CCDs or BBDs, or writing and reading to digital memories.

また第一の周波数混合回路および第二の周波数混合回路
では同一の局部発振周波数を利用するので、かりに局部
発振周波数に周波数変動があってもこれは相殺されて出
力に現れることはない。
Further, since the first frequency mixing circuit and the second frequency mixing circuit use the same local oscillation frequency, even if there is a frequency fluctuation in the local oscillation frequency, this is canceled out and does not appear in the output.

さらに、局部発振周波数を変化させることにより、遅延
された出力信号の位相を変化させることができる。
Furthermore, by changing the local oscillation frequency, the phase of the delayed output signal can be changed.

〔実施例〕〔Example〕

図は本発明実施例装置のブロック構成図である。 The figure is a block diagram of an apparatus according to an embodiment of the present invention.

この装置は、信号の入力端子1と、この入力端子1の信
号を入力とする第一の周波数混合回路2と、上記入力端
子の信号周波数より低い周波数を通過帯域とする第一の
帯域濾波器3と、この低い周波数で動作する遅延素子4
と、この遅延素子4の出力信号を入力とする第二の周波
数混合回路5と、この周波数混合回路5の出力信号が通
過し上記入力端子1の信号周波数と等しい周波数を通過
帯域とする第二の帯域濾波器6と、局部発振回路7と、
この局部発振回路7の出力信号を分岐して上記第一の周
波数混合回路2および第二の周波数混合回路5に供給す
る分岐回路8と、上記第二の帯域濾波器6の出力が接続
された出力端子9とを備える。
This device includes a signal input terminal 1, a first frequency mixing circuit 2 which receives the signal of this input terminal 1, and a first bandpass filter whose pass band is a frequency lower than the signal frequency of the input terminal. 3 and a delay element 4 that operates at this low frequency.
, a second frequency mixing circuit 5 which receives the output signal of this delay element 4 as an input, and a second frequency mixing circuit 5 through which the output signal of this frequency mixing circuit 5 passes and whose pass band is equal to the signal frequency of the input terminal 1. a bandpass filter 6, a local oscillation circuit 7,
A branch circuit 8 that branches the output signal of the local oscillation circuit 7 and supplies it to the first frequency mixing circuit 2 and the second frequency mixing circuit 5 is connected to the output of the second bandpass filter 6. and an output terminal 9.

入力端子1から入力された周波数f、±Δfのマイクロ
波帯信号は、発振周波数f2の局部発振回路7の出力信
号により周波数変換され、その不要波成分を帯域濾波器
3で除去すると、その周波数は、 (f、−f2)±Δf となる。局部発振周波数f2は、遅延素子4の動作領域
に周波数変換されるように選定される。帯域濾波器30
通過帯域は、 (f+   f2):Δf である。さらに遅延素子4で遅延された信号は周波数混
合回路5により周波数変換され、不要波を帯域濾波器6
で除去すると、元の周波数f1±Δfである遅延された
信号を出力端子9から取りだすことができる。
A microwave band signal with a frequency f and ±Δf input from the input terminal 1 is frequency-converted by the output signal of the local oscillation circuit 7 with an oscillation frequency f2, and when its unnecessary wave components are removed by the bandpass filter 3, the frequency becomes (f, -f2)±Δf. The local oscillation frequency f2 is selected such that the frequency is converted into the operating range of the delay element 4. Bandpass filter 30
The passband is (f+f2):Δf. Furthermore, the signal delayed by the delay element 4 is frequency-converted by the frequency mixing circuit 5, and unnecessary waves are filtered out by the bandpass filter 6.
When the signal is removed by , a delayed signal having the original frequency f1±Δf can be taken out from the output terminal 9.

本実施例では、遅延素子4とし、F工R(Flnlte
Impulse Re5ponse )ディジタルフィ
ルタを用いた。
In this embodiment, the delay element 4 is used as the delay element 4.
Impulse Re5ponse) digital filter was used.

その遅延量(τ)はディジタルフィルタの段数(N)と
サンプリング周波数(f、)から τ=N/f2 となる。例えば、N=200 、fs=50kHzとす
ると τ=4msec となる。また、この例における遅延線の使用可能上限周
波数は25KHzである。使用可能上限周波数を高める
には、サンプリング周波数を増大させた領域で動作する
FIRディジタルフィルタを用いればよい。また、FI
Rディジタルフィルタを遅延線に用いると、係数を変え
ることによって任意■振幅および遅延特性を持たせるこ
とができる。
The amount of delay (τ) becomes τ=N/f2 from the number of stages (N) of the digital filter and the sampling frequency (f,). For example, when N=200 and fs=50kHz, τ=4msec. Further, the upper limit usable frequency of the delay line in this example is 25 KHz. In order to increase the usable upper limit frequency, an FIR digital filter that operates in a region with an increased sampling frequency may be used. Also, FI
When an R digital filter is used in a delay line, arbitrary amplitude and delay characteristics can be provided by changing the coefficients.

さらに、遅延素子としてCCD (Charge Co
upledQevice )、B B D (Buck
et Burigade Device )等のトラン
スファーデバイスや、入力信号を一度AD変換したディ
ジタル信号を半導体メモリに記憶させ、一定時間経過後
再びメモリにより読出したデータをDA変換し、出力す
るディジタル遅延素子を使用できる。
Furthermore, a CCD (Charge Co., Ltd.) is used as a delay element.
(upledQevice), BBD (Buck
It is possible to use a transfer device such as a transfer device such as Etc. et Burigade Device), or a digital delay element that stores a digital signal obtained by once AD converting an input signal in a semiconductor memory, and after a certain period of time has elapsed, data read out from the memory is again DA converted and output.

マイクロ波帯信号を遅延素子が動作する領域に周波数変
換して遅延した後に、同一発振器からの出力によって元
の周波数領域に周波数変換するので、周波数変換におけ
る局部発振周波数の変動は、周波数のダウンとアップ過
程で相殺されて全く影響を受けない。
After the microwave band signal is frequency-converted into the region where the delay element operates and delayed, it is frequency-converted back to the original frequency domain using the output from the same oscillator, so fluctuations in the local oscillation frequency during frequency conversion are caused by frequency down. It is canceled out during the up process and is not affected at all.

周波数変換用の局部発振周波数を変化させると出力端子
9の出力信号の位相を変化させることができる。遅延素
子4で発生する位相回転は、2π(fl −f2 )τ で決定されるので局部発振器の発振周波数f2を変化さ
せることによって位相が変化できる。
By changing the local oscillation frequency for frequency conversion, the phase of the output signal at the output terminal 9 can be changed. Since the phase rotation generated in the delay element 4 is determined by 2π(fl - f2)τ, the phase can be changed by changing the oscillation frequency f2 of the local oscillator.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明を用いるとマイクロ波帯の信
号をミリセカンド以上遅延させることができる。また、
局部発振周波数を変化させると遅延したマイクロ波帯の
信号の位相を変化させることができる。
As explained above, by using the present invention, signals in the microwave band can be delayed for milliseconds or more. Also,
By changing the local oscillation frequency, the phase of the delayed microwave band signal can be changed.

FIRディジタルフィルタを遅延線に用いると、係数を
変えることによって任意の振幅、遅延特性を持たせるこ
とができる効果がある。
When a FIR digital filter is used in a delay line, it has the effect of being able to have arbitrary amplitude and delay characteristics by changing the coefficients.

【図面の簡単な説明】[Brief explanation of the drawing]

図は、本発明の一実施例のブロック構成図。 1・・・入力端子、2・・・周波数混合回路、3・・・
帯域濾波器、4・・・遅延素子、5・・・周波数混合回
路、6・・・帯域濾波器、7・・・局部発振回路、8・
・・分配回路、9・・・出力端子。 特許出願人 日本電信電話株式会社 代理人 弁理士 井 出 直 孝
The figure is a block diagram of an embodiment of the present invention. 1...Input terminal, 2...Frequency mixing circuit, 3...
Bandpass filter, 4... Delay element, 5... Frequency mixing circuit, 6... Bandpass filter, 7... Local oscillation circuit, 8...
...Distribution circuit, 9...Output terminal. Patent applicant: Nippon Telegraph and Telephone Corporation Representative Patent attorney: Naotaka Ide

Claims (1)

【特許請求の範囲】 1、信号の入力端子と、遅延素子と、信号の出力端子と
を備えた遅延回路において、 局部発振回路と、 上記入力端子の信号およびこの局部発振回路の出力を入
力とする第一の周波数混合回路と、この周波数混合回路
の出力信号が通過しその出力信号が上記遅延素子に与え
られ上記入力端子の信号の周波数より低い周波数を通過
帯域とする第一の帯域濾波器と、 上記遅延素子の出力信号および上記局部発振回路の出力
を入力とする第二の周波数混合回路と、この周波数混合
回路の出力信号が通過しその出力信号が上記出力端子に
接続され上記入力端子の信号周波数と等しい通過帯域の
第二の帯域濾波器と を備えたことを特徴とする遅延回路。
[Claims] 1. A delay circuit comprising a signal input terminal, a delay element, and a signal output terminal, comprising: a local oscillation circuit; and a signal at the input terminal and the output of the local oscillation circuit as inputs. a first frequency mixing circuit, through which the output signal of the frequency mixing circuit passes, the output signal being applied to the delay element, and a first bandpass filter having a passband having a frequency lower than the frequency of the signal at the input terminal. and a second frequency mixing circuit which receives the output signal of the delay element and the output of the local oscillation circuit, and the output signal of the frequency mixing circuit passes through and the output signal is connected to the output terminal and the input terminal. and a second bandpass filter with a passband equal to the signal frequency.
JP4259988A 1988-02-25 1988-02-25 Delay circuit Pending JPH01218118A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4259988A JPH01218118A (en) 1988-02-25 1988-02-25 Delay circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4259988A JPH01218118A (en) 1988-02-25 1988-02-25 Delay circuit

Publications (1)

Publication Number Publication Date
JPH01218118A true JPH01218118A (en) 1989-08-31

Family

ID=12640518

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4259988A Pending JPH01218118A (en) 1988-02-25 1988-02-25 Delay circuit

Country Status (1)

Country Link
JP (1) JPH01218118A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5062341A (en) * 1973-10-01 1975-05-28

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5062341A (en) * 1973-10-01 1975-05-28

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