JPH0121695B2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention is a DC system with no control on the primary side and a control system on the secondary side.
-Related to DC converters, in particular, it provides a converter with low noise and high efficiency while reducing switching loss.

Figures 1 and 2 are conventional circuit diagrams of this type and operation waveform diagrams of each part. In the figures, E is a DC input power supply,
T is the conversion transformer n ₁ , n ₂ is its primary winding and 2
The next winding, S is a switching element (hereinafter referred to as a transistor) connected to the primary winding side. B is a control circuit for the transistor S, and sends out a control signal to turn the transistor S on and off at a constant period (uncontrolled). . Q is a control transistor provided on the secondary winding _n2 side, A is a control circuit for the control transistor Q,
A signal whose pulse width is controlled according to the output voltage E ₀ is sent out. L ₀ and C ₀ are a choke coil and a capacitor forming an output smoothing circuit, R ₀ is a load D is a flywheel diode, and nb is a base winding. In this circuit, the DC input E is turned on and off (switched) by the transistor S and applied to the conversion transformer T to generate an AC output to the transformer T.The AC output on the secondary side is controlled by the pulse width of the control transistor Q. Controlled and rectified by operation, always stable DC output voltage E ₀ is loaded via the output smoothing circuit.
This is what is supplied to R ₀ . This circuit does not require a main rectifier diode for secondary side control, resulting in high efficiency. At the same time, it does not require an isolation transformer for control circuit B for primary side transistors, resulting in smaller size and lower cost. However, on the other hand, since the transistor S turns on and off regardless of the load condition, the surge voltage when the transistor S turns off is large (Fig. 2a). This has the disadvantage that the loss in time becomes large (Fig. 2c). In addition, the second
Figure b shows the collector current (Ic) waveform of transistor S. The present invention solves the above-mentioned drawbacks and will be described in detail below with reference to the drawings. 3 and 4 are circuit diagrams of an embodiment of the present invention and operation waveform diagrams of each part thereof, and the same reference numerals as in the conventional example indicate equivalent parts. The present invention provides a synchronous delay circuit C that is synchronized with the control signal of the transistor S (or the primary or secondary side output of the conversion transformer), and allows the control circuit A to be controlled by the delay circuit C. The ON operation of the transistor Q is performed after a required time delay from the ON operation of the transistor S, and the OFF operation of the control transistor Q is performed by controlling the transistor S from the rear of the pulse width control signal.
This is characterized in that it is performed before the off operation of the switch. Next, it will be explained in detail using FIG.

First, the transistor S performs a constant cycle ON/OFF operation (constant frequency oscillation) in response to the control signal from the control circuit B (Fig. 4a), and the secondary winding _N2 side is passed through the primary winding N1 of the transformer _T. The AC output shown in FIG. 4d is generated. Note that FIG. 4b shows the voltage (VCE) waveform of the transistor S. The delay circuit C detects the rising voltage of the AC output via a diode D ₀ and generates a synchronizing pulse (FIG. 4f) with a required time width (t ₁ ). On the other hand, control circuit A outputs a triangular wave reference signal (a) synchronized with the control signal (Fig. 4a) and an output voltage E ₀
Detection signal that changes the detection level by raising and lowering the
(b) is compared (FIG. 2g), and a signal whose pulse width is controlled as shown in FIG. 4h by being controlled by the synchronizing pulse (FIG. 4f) is applied to the control transistor Q. This pulse width signal rises with a delay longer than the time width (t1) of the synchronizing pulse (FIG. 4f), that is, the storage time of the transistor S, and falls under pulse width control from behind according to the output voltage. When the control transistor Q is on, it is delayed from the on operation of the transistor S, and when it is off, it is turned off earlier than the transistor S. In addition,
FIG. 4b shows the collector current waveform of the transistor S, and i and j show the collector current waveform and emitter-collector voltage waveform of the control transistor Q. That is, according to the present invention, when the primary side switching element S is switched on or off, the control transistor Q is always in the off state. In other words, since the switching element S switches under no load, the switching loss (k in FIG. 4) during this period is reduced, and there are advantages of low noise, low heat generation, and improved efficiency. In the above embodiments, an example of a single-stone converter has been described, but it is obvious that the converter can also be applied to a two-stone converter as shown in FIG. This can also be done in the same way. As is clear from the above description, according to the present invention, a low-noise, high-efficiency converter can be provided in a small size and at low cost, so that the present invention has great practical effects.

[Brief explanation of drawings]

1 and 2 are conventional circuits and operation waveform diagrams of each part thereof, FIGS. 3 and 4 are circuit diagrams of one embodiment of the present invention and operation waveform diagrams of each part thereof, and FIG. 5 is another embodiment of the present invention. FIG. 3 is an example circuit diagram. In the figure, E is the DC input power supply, T is the output transformer, and n ₁ and n ₂ are the primary and secondary
Next winding, S, S ₁ and S ₂ are switching elements (transistors), Q, Q ₁ and Q ₂ are control transistors,
A and B are control circuits, and C is a synchronous delay circuit.

Claims (1)

[Claims] 1 The switching operation of the transistor provided on the primary winding side of the conversion transformer causes the conversion transformer to generate an AC output, and the AC output is controlled by the control transistor provided on the secondary winding side of the conversion transformer. In a DC-DC converter configured to rectify, a delay circuit is provided to synchronize with the control signal of the transistor or the primary or secondary output of the transformer, and to synchronize with the control signal of the transistor or the primary or secondary output of the transformer. A DC-DC converter characterized in that the alternating current output is controlled and rectified by applying a pulse width control signal that rises with a delay of more than the accumulation time of the primary side transistor and falls first to the control transistor.