JPH01216562A - Hybrid integrated circuit component - Google Patents

Hybrid integrated circuit component

Info

Publication number
JPH01216562A
JPH01216562A JP63042755A JP4275588A JPH01216562A JP H01216562 A JPH01216562 A JP H01216562A JP 63042755 A JP63042755 A JP 63042755A JP 4275588 A JP4275588 A JP 4275588A JP H01216562 A JPH01216562 A JP H01216562A
Authority
JP
Japan
Prior art keywords
resin
light
integrated circuit
circuit components
peripheral circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63042755A
Other languages
Japanese (ja)
Inventor
Osamu Onishi
修 大西
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63042755A priority Critical patent/JPH01216562A/en
Publication of JPH01216562A publication Critical patent/JPH01216562A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Landscapes

  • Light Receiving Elements (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To reduce a size by placing an optical device component and its peripheral circuit components in the same package, sealing the circuit components with light shielding colored resin, and transfer molding the entirety with transparent resin. CONSTITUTION:After peripheral circuit components 4 for processing or amplifying a signal are covered with light shielding colored resin 2 of such as black or the like, its entirety is mold-sealed by a transparent transfer molding resin 1 for transmitting light together with an optical device component 3 for receiving or radiating light. A circuit board 5 is connected by connecting wirings 7 to an external lead terminal 6. Thus, the component 3 is covered with the resin 1, and the components 4 which dislike the light are distinctly covered with colored resin 2 which shields the light. Thus, the characteristics of both can be sufficiently utilized, and since the entirety is transfer molded with the resin 1, its surface protection can be sufficiently conducted.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は異なった複数個の部品を同一パ・ツケージ内に
搭載する混成集積回路部品に関し、特に光デバイス部品
とその周辺回路部品を搭載した混成集積回路部品に関す
る。[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a hybrid integrated circuit component in which a plurality of different components are mounted in the same package, and in particular to a hybrid integrated circuit component in which a plurality of different components are mounted in the same package, and in particular, a hybrid integrated circuit component in which a plurality of different components are mounted in the same package, and in particular, a hybrid integrated circuit component in which a plurality of different components are mounted in the same package. Concerning hybrid integrated circuit components.

〔従来の技術〕[Conventional technology]

従来、光デバイスとその周辺回路部品とは光に対して相
反する特性を有することから、必然的に全く異なったパ
ッケージ形態がとられていた。従って、両者を一つのパ
ッケージ内に搭載することは困難であるので、かかる部
品は未だ開発されていない。Conventionally, since optical devices and their peripheral circuit components have contradictory characteristics with respect to light, they have necessarily taken completely different package forms. Therefore, it is difficult to include both in one package, so such a component has not yet been developed.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかしながら、最近における回路部品の小形化への要望
の高まりから、光デバイス部品とその周辺回路部品との
同一パッケージ化が求められて来ている。However, due to the recent increasing demand for miniaturization of circuit components, there has been a demand for the same packaging of optical device components and their peripheral circuit components.

本発明の目的は、上記の要望に鑑み、光デバイス部品と
その周辺回路部品とを一つのパッケージ内に搭載した集
積回路部品を提供することである。In view of the above-mentioned needs, an object of the present invention is to provide an integrated circuit component in which an optical device component and its peripheral circuit components are mounted in one package.

〔課題を解決するための手段〕[Means to solve the problem]

本発明によれば、混成集積回路部品は、光デバイス部品
とその周辺回路部品を同一パッケージ内に搭載し、前記
周辺回路部を光遮断用の着色樹脂で封止すると共に、全
体を透明樹脂でトランスファーモールドすることを含ん
で構成される。According to the present invention, the hybrid integrated circuit component has an optical device component and its peripheral circuit components mounted in the same package, the peripheral circuit part is sealed with a colored resin for blocking light, and the entire component is made of a transparent resin. The structure includes transfer molding.

〔実施例〕〔Example〕

以下図面を参照して本発明の詳細な説明する。 The present invention will be described in detail below with reference to the drawings.

第１図および第２図はそれぞれ本発明の一実施例の構造
を示す混成集積回路部品の斜視図およびそのＡ−Ａ’断
面図である。本実施例によれば、信号を処理あるいは増
幅する周辺回路部品４は黒色等の光遮断用着色樹脂２で
覆われた後、受光または発光を行う光デバイス部品３と
共に光を透過する透明トランスファ・モールド樹脂１で
全体をモールド封止される。ここで５は配線基板、６は
外部リード端子、７は配線基板５と外部リード端子６と
を接続する接続用ワイヤである。1 and 2 are a perspective view and a sectional view taken along line AA' of a hybrid integrated circuit component showing the structure of an embodiment of the present invention, respectively. According to this embodiment, the peripheral circuit components 4 that process or amplify signals are covered with a light-blocking colored resin 2 such as black, and then together with the optical device component 3 that receives or emits light, a transparent transfer film that transmits light is formed. The entire structure is molded and sealed with mold resin 1. Here, 5 is a wiring board, 6 is an external lead terminal, and 7 is a connection wire that connects the wiring board 5 and the external lead terminal 6.

このように、光デバイス部品３上は透明樹脂１で、また
光を嫌う周辺回路部品４上は光を遮断する着色樹脂２で
それぞれ区分されて被覆されるので、両者それぞれ特性
を充分に引き出すことができ、また、全体が透明樹脂１
でトランスア・モールドされるので表面保護を充分に行
うことができる。In this way, the optical device parts 3 are coated with the transparent resin 1, and the peripheral circuit parts 4, which are sensitive to light, are covered with the colored resin 2, which blocks light, so that the characteristics of both parts can be fully brought out. can be made, and the whole is made of transparent resin 1
Since it is trans-a-molded, the surface can be sufficiently protected.

〔発明の効果〕〔Effect of the invention〕

以上詳細に説明したように、本発明によれば、光デバイ
ス部品とその周辺回路部品とを同一配線基板上に搭載し
た混成集積回路部品を得ることができるので、この種集
積回路部品の小形化に大きな効果をあげることが可能で
ある。As explained in detail above, according to the present invention, it is possible to obtain a hybrid integrated circuit component in which an optical device component and its peripheral circuit components are mounted on the same wiring board, thereby reducing the size of this type of integrated circuit component. It is possible to have a great effect on

【図面の簡単な説明】[Brief explanation of the drawing]

第１図および第２図はそれぞれ本発明の一実施例の構造
を示す混成集積回路部品の斜視図およびそのＡ−Ａ’断
面図である。 １・・・透明トランスファーモールド樹脂、２・・・光
遮断用着色樹脂（黒色等）、３・・・光デバイス部品、
４・・・周辺回路部品、５・・・配線基板、６・・・外
部−リード端子、７・・・接続用ワイヤ。1 and 2 are a perspective view and a sectional view taken along line AA' of a hybrid integrated circuit component showing the structure of an embodiment of the present invention, respectively. 1... Transparent transfer mold resin, 2... Colored resin for light blocking (black etc.), 3... Optical device parts,
4... Peripheral circuit components, 5... Wiring board, 6... External lead terminal, 7... Connection wire.

Claims (1)

【特許請求の範囲】[Claims] 　光デバイス部品とその周辺回路部品を同一パッケージ
内に搭載し、前記周辺回路部を光遮断用の着色樹脂で封
止すると共に、全体を透明樹脂でトランスファーモール
ドすることを特徴とする混成集積回路部品。A hybrid integrated circuit component characterized in that an optical device component and its peripheral circuit components are mounted in the same package, the peripheral circuit part is sealed with a colored resin for blocking light, and the whole is transfer molded with a transparent resin. .
JP63042755A 1988-02-24 1988-02-24 Hybrid integrated circuit component Pending JPH01216562A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63042755A JPH01216562A (en) 1988-02-24 1988-02-24 Hybrid integrated circuit component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63042755A JPH01216562A (en) 1988-02-24 1988-02-24 Hybrid integrated circuit component

Publications (1)

Publication Number Publication Date
JPH01216562A true JPH01216562A (en) 1989-08-30

Family

ID=12644815

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63042755A Pending JPH01216562A (en) 1988-02-24 1988-02-24 Hybrid integrated circuit component

Country Status (1)

Country Link
JP (1) JPH01216562A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5296782A (en) * 1990-10-18 1994-03-22 Mitsubishi Denki Kabushiki Kaisha Front mask of display device and manufacturing method thereof
KR20000040355A (en) * 1998-12-18 2000-07-05 가나자와 요쿠 Ic package for control of game machine

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5296782A (en) * 1990-10-18 1994-03-22 Mitsubishi Denki Kabushiki Kaisha Front mask of display device and manufacturing method thereof
KR20000040355A (en) * 1998-12-18 2000-07-05 가나자와 요쿠 Ic package for control of game machine

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