JPH01209493A - Self-luminous type display device - Google Patents

Abstract

PURPOSE:To easily confirm variation in the quantity of light emission at the light emission point of the self-luminous type display device with the current display level of display data when the display level of the display data is high by receiving the display data and generating a specific light emission quantity control signal. CONSTITUTION:A control signal generating circuit 50 is provided to the pulse width modulating circuit of a driving circuit and a dot clock DCK from an input terminal 30 is supplied to and frequency-divided by a frequency divider 31. Here, the control signal generating circuit 50 receives the display data and generates such a light emission control signal that the relation between the display level and the brightness that human senses based upon the light emission at the light emission point of the self-luminous type display device is nearly linear. Consequently, the variation in the quantity of light emission at the light emission point of the self-luminous type display device with the display level when the display level of the display data is high is easily confirmed.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to plasma display devices, electroluminescent display devices, electrochemical display devices, fluorescent display tubes,
The present invention relates to self-luminous display devices such as light emitting diode display devices.

[Summary of the invention]

The present invention provides a self-luminous display device and N (however, N=3.4.
5,...) In a self-emissive display device comprising a drive circuit that drives the self-emissive display based on display data having a gradation display level, receiving the display data and determining the display level; A control signal generation circuit is provided in the drive circuit to generate a light emission amount control signal such that the relationship between the brightness that confuses the human eye based on the light emission from the light emitting point of the self-luminous display is linear. Thereby, when the display level of the display data is high, it is possible to easily visually recognize the change in the amount of light emitted from the light emitting point of the self-luminous display with respect to the change in the display level.

[Conventional technology]

A conventional plasma display device suitable for applying the present invention will be described below.

First, referring to FIG. 9, a plasma display panel used in a plasma display device will be explained.There are two types of plasma display panels: an AC type and a DC type.The plasma display panel shown in FIG. 9 is a DC type. be.

In Figure 9, FGP is a plain rectangular front glass plate;
RGP is a rectangular rear glass plate, each having a thickness of several mm, facing each other at a predetermined interval, and the periphery thereof is hermetically sealed. A mixed gas of Ne gas and Ar gas is sealed at a pressure of 450 Torr in an airtight space formed by the front glass plate 1FGP and the rear glass plate RGP.

On the front glass 1FGP, thin strip-shaped anodes (x electrodes) A are deposited in parallel at predetermined intervals, and barrier ribs BR are deposited between adjacent anodes A in parallel thereto. . This barrier rib BR has a thickness that is sufficiently larger than the thickness to the anode.

Further, on the rear glass plate RGP, several sheet-like trigger electrodes TG are attached, each corresponding to a predetermined number of cathodes, which will be described later. An insulating layer (dielectric layer) IL is deposited on the trigger electrode GT.

In this insulating layer IL, strip-shaped cathodes K are perpendicular to the anode A, facing each other with a predetermined interval (100 μm equal to the thickness of the barrier rib BR), and are parallel to each other with a predetermined interval. It is worn.

Trigger electrode TG is connected to this, cathode K and anode A.
A trigger discharge (a kind of AC type discharge) is caused between the anode A and the cathode, and this is used as a pilot flame to quickly start the discharge between the anode A and the cathode, thereby improving the contrast of the display.

Next, a conventional plasma display device (16-gradation type) using a plasma display panel as explained in FIG.
will be explained with reference to FIG. 1O. (1) is the 9th
The plasma display panel described in the figure is shown, and illustration of the trigger electrode is omitted here. This plasma display panel (1) has 400 cathodes K(1) to K(40
0) and 640 anodes A(1) to A(640) are arranged perpendicularly to each other, and a discharge cell (2) is formed at each intersection. Furthermore, the number of cathodes is 480.
In some cases.

Next, a drive circuit (20) for driving this plasma display panel (1) will be explained. First, a cathode example circuit will be described. (3) is a 400-bit serial-in/parallel-out shift register. This shift register (3) receives 60H from the input terminal (4).
z vertical synchronization signal is supplied as cathode shift data KSD, and from the input terminal (5), 25 kHz
A cathode shift clock KCK synchronized with the horizontal synchronizing signal (one period is 40 μsec) is supplied, and the cathode shift data KSD is shifted by this clock KCK. The 400 cathode scanning pulses per vertical period, which are sequentially shifted by a predetermined phase from the shift register (3), are used as switching control signals for the high voltage cathode driver (switch circuit) (6).
on/off switches. Then, this cathode driver (6) drives the cathodes K(1) to K(
400) is scanned at a frequency of 25 kHz and then cyclically connected to ground.

Next, the anode side circuit will be explained.

(7) is a 640-byte (-640x4 bits) serial-in/parallel-out shift register.

From the input terminal (8) to this shift register (7),
Display data DT having a display level of 4 bits, that is, 16 gradations is supplied, and 21
A data shift clock DSCK consisting of a MHz dot clock DCK is supplied, and the display data DT is shifted by this clock DSCK.

The 640x4 bit parallel data from the shift register (7) is supplied to the launch circuit (10) and input to the input terminal (
11) is latched every horizontal period by the launch clock (horizontal synchronization signal) LCK.

The 640x4 bit parallel data from this launch circuit (10) is processed by a pulse width modulation circuit (17) consisting of a pulse width counter, (15) and a pulse width comparison circuit (14).
) is supplied to its pulse width comparison circuit (14). This pulse width comparison circuit (14) includes 640 pulse generators. The pulse width counter (15) is supplied with the pulse width clock PWCK from the frequency divider (16). This pulse width clock P W CK is connected to the input terminal (1
, 6T) 21MHz dot clock DCK from
The pulse width clock P W CK is supplied to the frequency divider (16) and obtained by dividing the frequency by 1150, so the frequency of this pulse width clock P W CK is 42 kHz. In addition, a pulse width counter (15
) and the pulse width comparison circuit (14) have an input terminal (21
) to set pulse (signal synchronized with horizontal synchronization signal) S
P is supplied. Then, the pulse width counter (15) is cleared by this cent pulse SP. or,
This set pulse SP is supplied to the pulse generator of the pulse width comparison circuit (14).

Then, the 4-bit pulse width code signal (gray scale data) output from the pulse width counter (15) is supplied to the pulse width comparison circuit (14), and the 6401-specific 4-bit signal from the launch circuit (10) is supplied to the pulse width comparison circuit (14). is compared with the displayed data. And 64 of the pulse width comparison circuit (14)
Pulses are obtained from selected ones of the 0 pulse generators and are selectively supplied as switching control signals to the 640 on/off switches of the high voltage anode driver (12). And 64 within one horizontal period
The anode A (1
) to A (640) are selectively supplied with a voltage of 200 μ.

(18) is a trigger electrode drive circuit, which has an input terminal (
19), a vertical synchronization signal is supplied, and a trigger electrode control signal is generated here, and this trigger illumination control signal is
It is supplied to a trigger electrode TG (not shown).

[Problem to be solved by the invention]

By the way, in the conventional plasma display device described above, each cell (2) of the plasma display device (1) is connected to a shift register (
7), the discharge (
The discharge (light emission)
The cell (2) is made to emit light with an amount of light proportional to time.

By the way, according to the Wafer-Fechner law, the magnitude of sensation E has the following relationship with respect to (JR) of the applied stimulus.

E=KNogR・・・・・・・・・ (1) (However,
(K is a constant) Equation (1) has been criticized for its narrow scope of application and the derivation assumptions, so it has since been improved by using varnish and varnish.・The following formula was proposed by Stephen.

E=k(RRo)β... (2) (However,
(k and β are constants determined by the stimulus conditions; in particular, β is a value that changes depending on the type of sensation, and Ro is the stimulus threshold) According to the measurements of Niss, Niss, and Stephen, β in the case of vision The value of is 0.33 when the target is scotopic at 5°, and 0.5 when the target is a point light source. Also, depending on the wavelength of light, the formula (
Either k % RO or β of 2) is different [Page 40 of Television/Image Engineering Handbook (December 30, 1980, 1st edition, 2nd printing) (Published by Ohmsha Co., Ltd.) See page 23].

Therefore, according to the conventional plasma display device, the amount of light emitted from the cell (2) of the plasma display (1) was proportional to the display level of the display data. When the display level of the self-luminous display device (1) is high, there is a drawback that the change in the amount of light emitted from the light emitting point of the self-luminous display (1) cannot be easily recognized in response to a change in the display level.

In view of the above, the present invention provides a self-luminous display in which when the display level of display data is high, a change in the amount of light emitted from a light emitting point of a self-luminous display device can be easily recognized in response to a change in the display level. This is an attempt to propose a device.

[Means to solve the problem]

The present invention provides a self-luminous display (1) and N (where N=3
．． 4.5,...) In a self-emissive display device comprising a drive circuit (20) that drives a self-emissive display (1) based on display data having a gradation display level, display data is The display level and the self-luminous display (
The drive circuit (20) is provided with a control signal generation circuit (50) that generates a light emission amount control signal such that the relationship between the brightness perceived by the human eye based on the light emission of the light emission point in 1) is linear. It is something that

[Effect]

According to the present invention, the control signal generation circuit (50) of the drive circuit (20) receives the display data and generates the ( Generates a light emission control signal that has a linear relationship with the brightness perceived by the human eye, and thereby controls the self-luminous display to respond to changes in the display level when the display level of display data is high. The change in the amount of light emitted from the light emitting point (1) can be easily recognized visually.

〔Example〕

Below, an embodiment in which the present invention is applied to the plasma display device described with reference to FIGS. 9 and 10 will be described in detail.

Most of the configurations of each embodiment described below are the same as those shown in FIGS. 9 and 10, so illustration and explanation of those parts will be omitted, and only different parts will be explained.

First, the embodiment shown in FIG. 1 will be explained. (50) receives the display data and determines the display level and the self-luminous display (1
A control signal generating circuit for generating a light emission amount control signal such that the relationship between the brightness perceived by the human eye based on the light emission of the light emitting point of ) is linear, and will be described below. Note that this control signal generation circuit (50) is provided in the pulse width modulation circuit (17) of the drive circuit (20) in FIG. The 21 MHz dot clock DCK from the input terminal (30) is supplied to the frequency divider (31) with a frequency division ratio of 12.5, and the resulting frequency becomes 1.68 MHz.
The clock of z is supplied to the counter (32). Then, the count output of this counter (32) is sent to the decoder (33).
The output of the decoder (33) is supplied to the AND gate (35) through the OR gate (34). The AND gate (35) is also supplied with a clock from the frequency divider (31). Thus, AND gate (35)
As shown in FIG. 2, the time widths are sequentially W1, W2, and W3.
, . . . (However, Wl<W2 x W3, . . . ) A pulse width clock PWCK is generated, and this is supplied to the pulse width counter (15) in FIG.

Then, the 4-bit pulse width code signal (gray scale data) output from the pulse width counter (15) is supplied to the pulse 1 fault comparison circuit (14), and the 4-bit pulse width code signal (gray scale data) outputted from the pulse width counter (15) is supplied to the pulse 1 fault comparison circuit (14), and The bit display data is compared. Then, 6 of the pulse width comparison circuit (14)
Pulses are obtained from selected ones of the 40 pulse generators and are selectively supplied as switching control signals to the 640 on/off switches of the high voltage anode driver (12). And the decoder (33)
640 within one horizontal period by appropriately configuring
Display data D of 16 gradations (including 0) of pulses
For display level L of 16 gradations of T, anode A (1
) to A (640) are selectively supplied with a voltage of 200 cm. Figure 2 shows the anode driver (12)
Pulses selectively supplied to 640 on/off switches..., GS (n), GS (n+1), O3(
n+2),... is shown.

T=to (L-Lo)I/β' ・----(3)(
However, k and β' are constants, especially β is β'ζβ, and Lo
is a level threshold value, which is assumed to be Lo#0 here.) In equation (3), if Lo#O is set, then equation (3) is expressed as the following equation.

LI/β' for T=... (4) If the value of β' in equation (4) is, for example, 0.33, then 1/
β'#3, and the display level of the display data DT (gradation level 1.2.3,..., n, n+1,..., 15)
) L and the amount of light emitted from the cell (2) (the amount of light emitted is proportional to the pulse width T) as shown in FIG.

As shown in FIG. 4, a memory (ROM or RAM) is used instead of the decoder (33) in the embodiment of FIG.
(36) can be provided. In that case, counter (32) becomes an address counter for memory (36).

Next, another embodiment of the present invention will be described with reference to FIG. In FIG. 5, parts corresponding to those in FIGS. 1 and 4 are designated by the same reference numerals, and redundant explanation will be omitted.

In FIG. 5, (37) is a characteristic changing circuit. This is constructed by connecting a series circuit of a plurality of resistors (37R) and a plurality of corresponding on/off switches (37S) in parallel between a power source 1B and ground.

Then, n+m+1 bit address signals A n +m, . . . , A n + 2, which are supplied to the memory (36)
An+1, An, H', A2, A7, A (of 1,
Lower n+1 bit address signal An, ..., A2
, AI, AO are the remaining upper m-bit address signals An+m, . . . , An+2 from the counter (32).
, An+1 are supplied from the characteristic changing circuit (37) to the memory (36), respectively.

Then, store multiple types of appropriate data in the memory (36), and store 640 types of data within one horizontal period. [16 gradations (including 0) of the pulse of al, 16 of the display data DT
For the gradation display level L, the anode A (1
) to A (640) are selectively supplied with a voltage of 200 cm.

1 L 17β' ・・・・・・・・・ (4-1
) 2L 1/β' to T- (4-2
) 3L 1/β' to T- (4-2
) Here, the case is shown in which the constant in equation (4) is changed, but this constant β' may be changed, or both may be changed.

Next, another embodiment of the present invention will be described with reference to FIG. (40) is a voltage/frequency conversion circuit which varies the voltage by adjusting a potentiometer (41) connected between the power source 1B and ground, and generates a clock with a corresponding frequency. The clock from the voltage/frequency conversion circuit (40) is then supplied to the counter/decoder (42).

Further, the carry signal from this counter/decoder (42) is supplied as a clock to another counter/decoder (43). The decoded outputs from the counter/decoders (42) and (43) are supplied to a plurality of AND gates 1-(45), and the outputs are supplied to the OR gate (46). to pulse width clock P
WCK is obtained, which is calculated by the pulse width counter (
15). Here, multiple AND gates (4
5) and the OR gate (46), the logic circuit (44
) is configured. and a counter/decoder (42)
, (43) and the logic circuit (44), 16 of the 640-dot pulses within one horizontal period can be adjusted according to the adjustment of the potentiometer (41) of the voltage/frequency conversion circuit (40). For display level L of 16 gradations of display data DT of gradations (including 0), the anodes A(1) to A A voltage of 200 μ is selectively supplied to (640).

Incidentally, here, the case is shown in which the constant in equation (4) is changed, but this constant β' may be changed, or both may be changed.

Next, another embodiment of the present invention will be described with reference to FIG. This embodiment is a specific example of the characteristic changing circuit (37) shown in FIG. That is, this characteristic change circuit (37) includes a power save circuit (38), a brightness signal adjustment circuit (39), a contrast adjustment circuit (40), an external light sensor (41), and these circuits (38) to (41). The mixing circuit (42) is supplied with the output of the mixing circuit (42), and the A/D converter (43) is supplied with the output from the mixing circuit (42). Then, m-bit address signals An+m, . . . , An+2, An+1 from the A/D converter (43) are supplied to the memory (36). And power save circuit (3
When the display amount is larger than a predetermined amount according to the entire display amount of the plasma display device (1), a power save control signal is transmitted to the brightness adjustment circuit (39) from 8) to suppress the display amount according to the display amount. ), a brightness control signal based on brightness adjustment is sent from the contrast adjustment circuit (40), a contrast control signal based on contrast adjustment is sent from the contrast adjustment circuit (40), and a contrast control signal based on contrast adjustment is sent to the external light sensor (41).
When a brightness control signal corresponding to the brightness of external light is obtained from each of It will be selected.

FIG. 8 shows an embodiment in which the characteristic changing circuit (37) in the embodiment of FIG. 7 is added to the embodiment of FIG. 6, and its explanation will be omitted.

〔Effect of the invention〕

According to the present invention described above, the self-emissive display is based on the self-emissive display and display data having display levels of N (N=3.4.5, . . .) gradations. In a self-luminous display device including a drive circuit for driving, when the display level of display data is high, it is possible to easily visually recognize a change in the amount of light emitted from a light emitting point of the self-luminous display device in response to a change in the display level. can.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a timing chart for explaining the embodiment of FIG. 1,
FIG. 3 is a characteristic curve diagram for explaining the embodiment of FIG. 1, FIGS. 4 to 8 are block diagrams showing each embodiment of the present invention, and FIG. 9 shows a conventional plasma display. Perspective view, 1st
FIG. 0 is a block diagram showing a conventional plasma display device. (1) is a plasma display, (20) is a drive circuit, (37
) is a characteristic changing circuit, and (50) is a control signal generating circuit.

Claims (1)

[Claims] A self-luminous display device, and N (where N=3, 4, 5, . . .
) A self-emissive display device comprising: a drive circuit that drives the self-emissive display based on display data having a gradation display level; The driving circuit is provided with a control signal generating circuit that generates a light emission amount control signal such that the relationship between the brightness perceived by the human eye based on the light emitted from the light emitting point of the type display is linear. A self-luminous display device.