JPH0120916B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a stitch pattern command circuit for an electronic sewing machine that stores pattern data in a semiconductor memory element and sequentially reads out the data to sew a pattern.

A conventional circuit of this type is shown in FIG. In the figure, 1 is an 8-bit microcomputer, and 2 is a semiconductor memory element that stores pattern data, which are replaceable. 3
is composed of 16 bits, and is an address line for specifying the data storage location of semiconductor memory element 2. 4 is an 8-bit address line.
This data line is made up of bits and is used to output data stored in the storage location specified by the address line.

Next, the operation will be explained. From A ₀ when microcomputer 1 reads data
The address line _A15 is initially 0000 0000 0000 0000, and the first address of the semiconductor memory element 2 is addressed, and the data stored at this address is _D0 to _D7.
is output to the data line and read by the microcomputer 2. Thereafter, address signals are sequentially outputted to the address lines, and the data stored in the addresses addressed by the address signals are outputted to the data lines _D0 to _D7 and read by the microcomputer 2.

In this way, the data was stored in the semiconductor memory element 2. For example, the microcomputer 2 can read pattern data for sewing.

The semiconductor memory element 2 has a replaceable structure, and in order to sew different pattern data, it is sufficient to select the semiconductor memory element that has stored the pattern data.

The pattern data storage and data reading circuits of conventional electronic sewing machines are constructed as described above, and the semiconductor storage element 2 is replaced to accommodate various pattern data. However, there are currently many types of semiconductor memory elements, and although there is a trend toward the development of larger memory capacity and cheaper ones in the future, the conventional circuit described above is limited to the one type currently available. The drawback was that only semiconductor memory elements could be used.

This invention was made in order to eliminate the above-mentioned drawbacks of the conventional device, and includes storing a keyword for identifying the type of semiconductor memory element at a predetermined address of the semiconductor memory element that stores pattern data. The method is configured to read the stored pattern data after determining the keyword and determining the type of the semiconductor memory element before reading the pattern data, and after making a logical connection suitable for this type. Accordingly, it is an object of the present invention to provide a circuit that can automatically discriminate pattern data stored in different types of semiconductor memory elements and read out correct pattern data.

An embodiment of the present invention will be described below with reference to the drawings. In FIG. 2, numerals 1 to 4 indicate the same or equivalent parts as in FIG. 1. 21 is a logic circuit for changing connection of address signals according to the type of semiconductor memory element 2, 22 is a switching signal line for changing connection of logic circuit 21, and 23 is an address line after connection change. show.

FIG. 3 shows another specific embodiment of the present invention, in which 31 is a φR element, 32 is a switching signal line, and 33 is a switching signal line.
is the address line after switching has taken place.

Next, the operation will be explained based on FIG. 2.
The semiconductor memory element 2 stores a keyword for determining the type at its first address. It is now assumed that a keyword AA is stored in the first type of memory element, and a keyword BB is stored in the second type of memory element. The microcomputer 1 outputs a switching signal for addressing the first type of semiconductor memory element 2 to terminals C ₀ to _{C 2} and supplies it to the logic circuit 21 . The logic circuit 21 switches the connection of the address line 3 according to the switching signal, so that the first type of semiconductor memory element 2 is correctly addressed on the address line 23. Next, start address 0000 from microcomputer 1.
Address address 0000 0000 0000. At this time, if the keyword AA is output to the data lines _D0 to _D7 , the semiconductor memory element 2 is a first type of memory element,
The pattern data can be read out continuously.

At this time, if the second type of memory element is set in the semiconductor memory element 2, the data lines _D0 to _D7
The keyword AA is never output, and the keyword BB is also never output. This is because the logic circuit 21 is connected to address the first type of memory element, so the second type
This is because memory elements of this type cannot be addressed correctly. That is, if AA is output to the data lines D ₀ to D ₇ by the logic circuit 21 whose connection has been changed in order to address the first type of memory element, reading of the pattern data is executed as is, and AA is output. If not, the microcomputer 1 connects the second terminal to the terminals _C0 to _C2 .
A switching signal for addressing the second type of semiconductor memory element 2 is output and applied to the logic circuit 21, and an address signal for correctly addressing the second type of memory element is output to the address line 23. Then, as before, when the microcomputer 1 addresses the first address 0000 0000 0000 0000, the keyword BB is output to the data lines D ₀ to _{D 7} .
It can be determined that the second type of memory element is set in the semiconductor memory element 2.

FIG. 3 shows another more specific embodiment, and a case will be described in which memory elements i2716 and i2732 manufactured by Intel Corp., which are currently commonly used as the semiconductor memory element 2, are used.

The i2716 has a storage capacity of 2KB and the address line is A _0.
~ _A10 are valid, and A11 must be fixed at +5V, that is, logic "H". The i2732 has a storage capacity of 4KB, and address lines _A0 to _A11 are valid.

Now, store AA in address 0 of i2716, and store BB in address 0 of i2732. Now, when a logic "H" signal is supplied from the microcomputer 1 to the terminal _C0 through the switching signal line 32 to the φR element 31, A11 of the address line 33 becomes "H" all the time.
It will be in a state where i2716 is addressed.

At this time, when the microcomputer 1 outputs 0000 000000 to the address line 33, the start address of the semiconductor memory element 2 is set, and the i2716
If i2716 is set, AA is output to data lines _D0 to _D7 , and the microcomputer 1 determines that i2716 is set and continues to address pattern data. However, when AA is not output, the microcomputer 1 outputs a logic "L" to the terminal _C0 , and the output of the φR element 31 changes from the always "H" state to the state where the output 3 changes according to the state of the input terminal 2. That is, when the i2732 is set in the semiconductor memory element 2, it is brought into a state where it can be addressed. In this state, from the microcomputer 1 to the address line 33
Output 0000 0000 000 and connect BB to data lines D ₀ to _{D 7}
Read the output data of and send it to the semiconductor memory element 2.
It can be determined that i2732 is set.

As described above, the present invention is configured to automatically determine which type of semiconductor memory element is set in the device, so any semiconductor memory element currently on the market can be used. You can also do it.

In addition, elements that will be developed in the future can also be used.
A device with extremely high flexibility can be obtained.

Furthermore, as seen in the embodiments, the present invention can be realized with a simple circuit configuration, which has the effect of providing an inexpensive and highly reliable circuit.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a conventional example, FIG. 2 is a circuit diagram showing an embodiment of the present invention, and FIG. 3 is a circuit diagram showing another specific embodiment of the invention. In the figure, 1 is a microcomputer, 2 is a semiconductor memory element, 3 is an address line, 4 is a data line, 21 is a logic circuit, 22 is a switching signal line, 23
31 is an address line after switching, 31 is a φR element, 32 is a switching signal line, and 33 is an address line after switching.

Claims (1)

[Claims] 1. A replaceable storage element having a storage section for stitch pattern data and type identification data, means for first reading type identification data from this storage element and then reading stitch pattern data, and the type identification data outputted from this means. An electronic sewing machine stitch pattern command circuit comprising means for determining the type of a storage element based on a signal corresponding to the storage element and making a logical connection suitable for the storage element.