JPH01202986A - Picture synthesizer - Google Patents

Abstract

PURPOSE:To reduce the storage capacity of a picture memory means and to make the size of circuit scale small by providing a picture memory means and a synthesis means synthesizing an output picture signal of the picture memory means with an input picture signal and storing only the signal part required for the picture synthesis into the picture memory means. CONSTITUTION:A video signal outputted from a video camera 10 is inputted to a synthesizer 12. Let a picture signal corresponding to the period from the start of synthesis processing to the end at the end of a 1st pickup scene be P1 and let a picture signal corresponding to the period from the start of synthesis processing to the end at the head of a 2nd pickup scene be P2. Data in response to the special effect mode selected by an operation panel 14 is deleted from the picture signal inputted to the synthesizer 12 and the subtracted signal P1 is stored in a picture memory 16. Then the 2nd pickup is started to obtain the picture signal P2. Then the synthesizer 12 reads the storage signal P1 of the picture memory 16 and the signal P1 is synthesized to the signal P2. The synthesis signal outputted from the synthesizer 12 is fed to a picture recorder (VTR) 20 under the control of the timing controller 18.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to an image compositing device, and more specifically, it is suitable for performing special effects such as compositing multiple images in an image recording and reproducing device. The present invention relates to an image synthesis device.

[Conventional technology]

Conventionally, in order to synthesize two types of images, the two types of images are synchronously reproduced using separate reproduction devices, the two reproduced images are combined using a synthesizer, and the output of the synthesizer is recorded in another image record. The system adopted a configuration in which the device records data on a recording medium.

Then, the timing controller synchronizes the reproduction operations by the two reproduction devices, the synthesis processing by the synthesizer, and the recording operation by the image recording device without any trouble.

[Problem to be solved by the invention]

In recent years, VTRs and video cameras for VTRs have become widespread, and devices are becoming smaller and lighter at a rapid pace.Under these circumstances, cameras called camcorders, which integrate VTRs with video cameras, have become popular. With the advent of the all-in-one VTR, it has also become possible to take pictures with special effects using digital technology.

However, special effect photography by combining two or more moving images is not practical with a compact camcorder using conventional methods.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide an image compositing device that can realize the above special effects without increasing the size of the device.

[Means to solve the problem]

An image synthesizing device according to the present invention includes: an image memory means; a synthesizing means for synthesizing an output image signal of the image memory means with an input image signal; It is characterized by comprising a control means for controlling writing to and reading from the image memory means so as to write to the image memory means and read from the image memory means.

[Effect]

With the above means, only the signal portion necessary for image synthesis is stored in the image memory means, so that the storage capacity of the image memory means can be reduced, and the circuit scale can be reduced.

〔Example〕

Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 shows a configuration block diagram of an embodiment of the present invention.

The image signal output from video camera 10 is input to synthesizer 12. As shown in FIG. 2, at the end of the first shooting scene, the image signal corresponding to the period from the start to the end of the compositing process is Pl, and at the beginning of the second shooting scene, the compositing process starts. Let P2 be the image signal corresponding to the period from start to end. The image signal P1 input to the synthesizer 12 is subjected to data reduction according to the special effect mode selected by the operation panel 14 (the data-reduced signal is designated as Plo), and is stored in the image memory 16.

This completes the first photographing operation.

An example of the special effect mode is shown in FIG. In Fig. 3, the area occupied by the image signal P1 on the screen gradually decreases, and on the other hand,
This shows a special effect in which the image signal P2 gradually increases the screen occupation area from the top of the screen, and ('b) shows a special effect in which the image signal P1 gradually changes to the image signal P2 over the entire screen. It shows.

Next, the second photographing is started. As a result, image signal P2
is obtained from video camera 10. For the image signal P2, the synthesizer 12 reads out the stored signal P1' from the image memory 16 and synthesizes the signal P1' with the image signal P2 from the video camera 10. The synthesized signal output from the synthesizer 12 is sent to a video recording device (VTR) 2 under the control of a timing controller 18 that controls the timing of the entire system.
0 is applied and recorded on a recording medium such as a magnetic tape.

The timing of the combining process in the combiner 12 will be explained. The mode of compositing processing (for example, one of a=wipe, b: cross fade, and C: off) is specified from the operation panel 14 and instructed to the synthesizer 12. Next, an instruction to end the first scene is sent from the operation panel 14 to the timing controller 18. Incidentally, in the case of a camcorder (camera-integrated VTR device), a trigger switch generates a scene start/end instruction signal.

The timing controller 18 controls the VTR 20 at time T1 in FIG. 2 in accordance with the instruction signal to end the first scene.
A recording stop instruction signal is applied to the IH via the IC 4, and at the same time, the synthesizer 12 is instructed to start generating a synthesis processing signal (a multiplication coefficient or area signal to be described later). Based on this signal for synthesis processing, the amount of information is reduced. The timing controller 18 sends a write start instruction signal to a control line C3.
The reduced data is applied to the image memory 16 via the image memory 16, and the reduced data is stored in the memory 16. At time T when the image memory 16 starts storing data, the ratio of the screen configuration is PI:P2=100:O(χ) in terms of information amount. As this ratio moves from T1 to T2, it gradually reverses until T.

At the midpoint between and T2, Pi: P2=50:50(χ),
At time T2, Pl;P2=O:100(χ). In this way, screen switching is performed.

Between T + "h, the amount of information necessary for screen synthesis of the image signal P1 is only 1/2 of the total. Therefore, the portion of the image signal P1 that is not necessary for screen synthesis is reduced, and the amount of information necessary for screen synthesis is By storing in the image memory 16 only the signal portion P1° necessary for The memory capacity is sequentially reduced from T1 to T2.The timing controller 18
At time T2, an image data writing end instruction signal is applied to the image memory 16 via the control line C3. As a result, writing to the image memory 16 is completed, and the photographing operation of the first scene is completed.

Next, the process moves to the shooting operation for the second scene. Operation panel 14 (
In the case of a camcorder, a trigger button) sends a photographing restart instruction signal to the timing controller 18.

In response, the timing controller 18 instructs the VTR 20 to start recording via the control line C4. The VTR 20 sends a loading completion signal to the timing controller 18 via the control line C5. Timing controller 18 also controls V
An instruction signal for causing the synthesizer 12 to output a composite signal in synchronization with the start of recording of the TR 20 is sent onto the control lines C1, C2, and C3.

Image data is output from the image memory I6 to the synthesizer 12 in accordance with the read start signal on the control line C3.

The synthesizer 12 generates a signal for synthesis processing according to the signal on the control line C2. Along with this, 10 video cameras
From there, an image signal obtained by photographing the second scene is sent to the synthesizer 12. The synthesizer 12 combines the image signal P1° from the memory 16 and the image signal P from the video camera 10.
2 are combined in a combination mode specified in advance on the operation panel 14. The synthesized image information is recorded on a magnetic tape (not shown) by the VTR 20, using the screen at time T as a seam.

After recording on the recording medium for the period from T1 to T2 and completing the compositing processing sequence, the synthesizer 12 passes the image signal output from the video camera 10 through without performing any processing. Send it to the VTR 20 in this state. Thereafter, recording is performed in this state until the second scene is photographed.

The detailed configuration and operation of the synthesizer 12 will be explained with reference to FIGS. 4 and 5. The counter 30 receives an input clock signal.
The window pulse generator 32 sequentially outputs specific values for each field (or frame) according to the pulse, and generates a pattern of wipe coefficient k (=0 or l) according to the output value of the counter 30. , the coefficient generator 34 generates an overlap coefficient k (
continuous values between 0 and l). In practice, the coefficients generated by the coefficient generator 34 are often integer multiples of two. The coefficients generated by window pulse generator 32 and coefficient generator 34 are selected by mode selection switch 36. In accordance with the coefficient k selected in this way, input image signals are calculated, stored, and synthesized.

(Calculation) The coefficient inversion circuit 38 inverts the coefficient k from the selection switch 36 and outputs (1-k). The coefficient changeover switch 40 is connected to the b contact side during the T to T2 period at the end of the first scene, and is connected to the a contact side during the T to T2 period at the second scene beginning portion. Therefore, the output of the switch 40 is T at the end of the first scene.

It is k in the ~T2 period, T at the beginning of the second scene, and (1-k) in the ~T2 period. Multiplier 42 multiplies the input image signal by the output of switch 40 . The output of multiplier 42 is stored in image memory 44 as follows.

(Storage) The address generation circuit 46 generates an address signal necessary for data input/output of the image memory 44 (image memory 16 in FIG. 1) in synchronization with the output of the counter 30. however,
Address generation is controlled so that the memory capacity per screen is reduced in accordance with changes in special effects. T, ~'
Figure 5 shows how the memory space is allocated when it is assumed that 10 screens are included between r2''A.The memory capacity allocated to the first screen #1 is 100'1.
Then, the second screen #2 is 90χ, and the third screen is 80χ.
, -..., so that the 10th sheet has a data amount of 10χ,
Cut out the address space. For example, the 7th screen #7
A memory capacity of 402 minutes is prepared for this, but in the compositing operation described later, it is synthesized with 60χ of the input image to create one screen with a data amount of 10 oz. In this way, only the memory capacity necessary for a predetermined sequence is secured by the address generation circuit 46.

The data reduction circuit 48 stores the image data in the allocated memory space either spatially (cello level pixel data) or levelly (digits that continue from zero when viewed from the top of the quantized data). ) to remove zero data.

The data addition circuit 50 is a circuit that performs processing opposite to that of the data reduction circuit 48 on image data read from the image memory 44.

(Synthesis) At the start of the second scene, set the coefficient changeover switch 40 to a.
Connected to the contact side, the multiplier 42 adds (1-
k). That is, a multiplication process opposite to that at the end of the first scene is performed. The data stored in the image memory 44 is read out, a data addition circuit 50 adds the data, and an adder 52 adds the multiplication outputs of the multiplier 42 . The output of the adder 52 is a composite signal, and this composite signal is output by connecting the switch 56 to the a contact point. The switch 56 is connected to the a contact side when special effects are used, and connected to the b contact side when special effects are not used. Note that a human image signal is applied to the b contact of the switch 56, and the b
When the contact is connected, it becomes a through output.

〔Effect of the invention〕

As can be easily understood from the above description, according to the present invention, the memory capacity of the image memory for storing the first scene is approximately 1
72 is enough. Further, only one circuit is required for the multiplier with complicated operation, and manufacturing costs can be reduced.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of the configuration of an embodiment of the present invention, FIG. 2 is a timing diagram of compositing processing, FIG. 3 is an example of screen changes for special effects, and FIG. 4 is a detailed diagram of the synthesizer 12 in FIG. 1. The configuration block diagram in FIG. 5 is an example of how screen data is stored. 10-Video camera 12-Synthesizer 14-Operation panel 16--Image memory 18-Timing controller 20-VTR precision (%) (b) figure

Claims (1)

[Claims] an image memory means; a synthesis means for synthesizing an output image signal of the image memory means with an input image signal; An image synthesizing apparatus comprising: control means for controlling writing to and reading from the image memory means so as to read from the image memory means.