JPH01199252A - Memory device - Google Patents

Abstract

PURPOSE:To permanently inhibit the rewrite of the data on a PROM which are once written by applying the negative voltage to a write power supply terminal and cutting a fuse in a program terminal to invalidate the signals applied to the program terminal. CONSTITUTION:In a normal write mode the positive voltage is applied to a write power supply terminal VPP with a write program applied to a program terminal PRG respectively. Thus the data are written into a PROM. When the inhibition of the data write is desired in the PROM after said write of data is through, the negative voltage is applied to the terminal VPP. As a result, the fuse is cut and the terminal PRG is always kept at '0' in a chip. Thus the subsequent writing actions are inhibited for ever.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a memory device used in important equipment, etc., in which the contents of a FROM after writing must not be changed accidentally or intentionally.

BACKGROUND OF THE INVENTION FIG. 2 shows a conventional memory device, and shows an outline of a write process of an MO8 type FROM. FIG. 2 indicates the writing of 8-pit data, where 1 indicates the bit state before data is written, and 2 indicates the bit state after hexadecimal 9B1@ is written as data. Here, “1
” to rOJ to write F ROM
Let's take this as an example.

Problems to be Solved by the Invention However, in the PROM writing method using the conventional memory device described above, there is a problem that data is rewritten by writing "0" to a bit that has not been changed from "1" to rOJ. there were.

FIG. 3 shows how the 8-bit data 9Bn written in the PROM in FIG. 1 is rewritten to 121. In FIG. 3, 1 is before rewriting, and 2 is after rewriting.

The present invention is intended to solve such conventional problems, and it is an object of the present invention to provide an excellent memory device in which data once written to FROM is permanently unrewritable. be.

Means for Solving the Problems In order to achieve the above object, the present invention makes the program terminal of the F ROM fuse-type so that it can be disconnected by an external signal, and after disconnection, the signal to the program terminal becomes invalid and the data is not stored. This makes rewriting impossible. The fuse cutting signal is given by applying a negative voltage to the write power supply terminal, and in the case of a positive voltage, the fuse disconnection signal conventionally functions as a write power supply.

Therefore, according to the present invention, when a negative voltage is applied to the write power supply terminal, the fuse in the program terminal is cut by the thermal energy, the signal to the program terminal becomes invalid, and writing to FROM is prohibited. be able to.

Embodiment FIG. 1 shows the configuration of an embodiment of the present invention. In FIG. 1, Vcc is a power supply, PRG is a program (write), vpp is a write power supply, 0E is an output enable, OF is a chip enable, A is an address, 0 is input/output data, and GND is a ground. In the case of normal writing, a positive voltage is applied to VpI) and used as a writing power supply.

When writing is completed and it is desired to prohibit rewriting of data in the PROM, a negative voltage is applied to vpp.

As a result, the fuse is cut, and PRG is always set to "0" within the chip, making further writing permanently impossible.

Moreover, it can be manufactured with the same pin arrangement as a conventional FROM without a write-protection mechanism, and
It can be used in exactly the same way as LOM.

Effects of the Invention As is clear from the above embodiments, the present invention
It has a write inhibit mechanism added to it, and after data is written, rewriting of that data can be permanently prohibited by an external signal.

Furthermore, since it is possible to use the same bin arrangement as the conventional FROM, it has the advantage that it can be used in exactly the same manner as the conventional FROM.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a memory device according to an embodiment of the present invention, FIG. 2 is an explanatory diagram of write processing, and FIG. 3 is an explanatory diagram of malfunction in a conventional example. 1... Conventional P OM% Vcc... Power supply terminal, PR
G...program terminal, Vpp...power supply terminal for writing, OR...output enable terminal, cE...chip enable terminal, A...P address terminal, 0...
Input/output data terminal, GND...ground terminal. Name of agent: Patent attorney Satoshi Nakao, 1st man, engineering drawing S, Sagomi Nikoto, Purchasing village ξ Pro gate

Claims (1)

[Claims] A write terminal that is housed in the writable ROM and inputs a write signal, a fuse that can be cut off by electric heating to the write terminal, and a first diode that is housed in the writable ROM and connected in a forward direction toward the power source. and a write power supply terminal to which a second diode is connected in the opposite direction toward the fuse, and a positive voltage is applied to this write power supply terminal during writing, and a negative voltage is applied after writing is completed. A memory device characterized in that the fuse is cut off when the fuse is turned off.