JPH01194351A - Thin film semiconductor device - Google Patents

Thin film semiconductor device

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Publication number
JPH01194351A
JPH01194351A JP63016917A JP1691788A JPH01194351A JP H01194351 A JPH01194351 A JP H01194351A JP 63016917 A JP63016917 A JP 63016917A JP 1691788 A JP1691788 A JP 1691788A JP H01194351 A JPH01194351 A JP H01194351A
Authority
JP
Japan
Prior art keywords
thin film
tpt
film
switching
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63016917A
Other languages
Japanese (ja)
Inventor
Saburo Oikawa
及川 三郎
Akio Mimura
三村 秋男
Kikuo Ono
記久雄 小野
Nobutake Konishi
信武 小西
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP63016917A priority Critical patent/JPH01194351A/en
Publication of JPH01194351A publication Critical patent/JPH01194351A/en
Pending legal-status Critical Current

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  • Thin Film Transistor (AREA)

Abstract

PURPOSE:To make an operation speed of a driving TFT faster than that of a switching TFT without generating a ununiformity of a thin film and reducing the image quality, by making a second semiconductor thin film thicker than a first one which is formed on the same substrate where the second semiconductor thin film is formed. CONSTITUTION:About 30,000 pieces of switching TFTs (thin film transistors) 20 are arranged in the form of a matrix in an area 2 on a glass substrate 1 and about 3,000 pieces driving TFT's 30 are arranged in an area 3. Each of the TFTs 20 is a multi-crystal silicon film 200 formed on the substrate 1, having a gate electrode 5 on it with a gate film 4 put between. In a like manner, each of the TFTs 30 is a multi-crystal silicon film 300 formed on the substrate 1, having a gate electrode 5 on it with a gate film 4 put between. Each TFT 20 and 30 also have source areas 21 and 31, drain areas 22 and 32 and channel areas 23 and 33 respectively. By making the film 300 thicker than the film 200, the operation speed of the TFT 30 can be faster than that of the TFT 20 without injuring the uniformity of the characteristics of the TFTs 30 and without increasing the reverse leak current of the TFTs 20.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、薄膜半導体装置に係り、特に、各画素に対応
してマトリックス状に形成され、各画素のスイッチング
を行うための半導体装置、あるいはマトリックス状に形
成され、光センサとして機能する半導体装置と、該半導
体装置を駆動するための半導体装置とを同一基板上に有
する薄膜半導体装置に関する。
Detailed Description of the Invention (Field of Industrial Application) The present invention relates to a thin film semiconductor device, and particularly to a semiconductor device formed in a matrix corresponding to each pixel and for switching each pixel, or The present invention relates to a thin film semiconductor device that is formed in a matrix and has a semiconductor device functioning as a photosensor and a semiconductor device for driving the semiconductor device on the same substrate.

(従来の技術) 近年、ガラスなどの透明絶縁性基板上に、比較的低温で
形成した多結晶シリコンなどの半導体薄膜を用いて薄膜
トランジスタ(以下、TPT)を形成し、このTPTで
回路を構成する液晶表示装置等の薄膜半導体装置の開発
が活発に行われている。
(Prior art) In recent years, thin film transistors (hereinafter referred to as TPTs) have been formed using semiconductor thin films such as polycrystalline silicon formed at relatively low temperatures on transparent insulating substrates such as glass, and circuits are constructed using these TPTs. 2. Description of the Related Art Thin film semiconductor devices such as liquid crystal display devices are being actively developed.

液晶表示装置においては、透明ガラス基板の表面に非晶
質シリコン、あるいは多結晶シリコンを用いたTPTを
マトリックス状に形成し、このTPTを各画素のスイッ
チング素子として用いて液晶表示装置用アクティブマト
リック基板を形成する。
In liquid crystal display devices, TPTs using amorphous silicon or polycrystalline silicon are formed in a matrix on the surface of a transparent glass substrate, and these TPTs are used as switching elements for each pixel to create an active matrix substrate for liquid crystal display devices. form.

しかし、非晶質シリコンあるいは多結晶シリコンを用い
たTPTは、単結晶シリコンを用いたトランジスタに比
べて電界効果移動度が小さく、動作速度が遅いという欠
点を有する。
However, TPTs using amorphous silicon or polycrystalline silicon have the drawbacks of lower field effect mobility and lower operating speed than transistors using single crystal silicon.

すなわち、単結晶シリコンの電界効果移動度と比較する
と、非晶質シリコンの電界効果移動度は約1桁小さく、
多結晶シリコンの電界効果移動度は約3桁小さくなる。
That is, compared to the field effect mobility of single crystal silicon, the field effect mobility of amorphous silicon is about one order of magnitude smaller.
The field effect mobility of polycrystalline silicon is reduced by about three orders of magnitude.

ところが、表示面積の大型化、高画質化にともなって走
査線の本数が増えると、TPTに従来以上の動作速度が
要求される。
However, as the number of scanning lines increases as the display area becomes larger and the image quality becomes higher, the TPT is required to operate at a higher operating speed than before.

一方、表示装置の小型化、省エネルギー化、複合化に伴
い、各画素のスイッチングを行うためのTPT (以下
、スイッチング用TPT)と、該スイッチング用TPT
を駆動するためのTPT (以下、駆動用TPT)とを
同一基板上に有する駆動回路内蔵型TPTアクティブマ
トリックス基板の研究も盛んに行われている。
On the other hand, as display devices become smaller, more energy efficient, and more complex, TPTs for switching each pixel (hereinafter referred to as switching TPTs) and TPTs for switching
Research is also being actively conducted on a TPT active matrix substrate with a built-in drive circuit, which has a TPT for driving a TPT (hereinafter referred to as a driving TPT) on the same substrate.

液晶表示装置用のTPT基板において、高画質、高精細
化を達成するためには、駆動用TPTの半導体薄膜内で
の電界効果移動度を向上させなければならない。しかし
、前述したように、多結晶シリコンの電界効果移動度は
、単結晶シリコンの電界効果移動度よりも小さく、膜厚
が1000Å以下の場合には、さらに小さくなることが
確認されている。
In order to achieve high image quality and high definition in TPT substrates for liquid crystal display devices, it is necessary to improve the field effect mobility within the semiconductor thin film of the driving TPT. However, as described above, it has been confirmed that the field effect mobility of polycrystalline silicon is smaller than that of single crystal silicon, and becomes even smaller when the film thickness is 1000 Å or less.

したがって、高画質、高精細化を多結晶シリコンで達成
するためには、駆動用TPTの多結晶シリコン膜の膜厚
を約800Å以上にすることが要求される。
Therefore, in order to achieve high image quality and high definition using polycrystalline silicon, it is required that the thickness of the polycrystalline silicon film of the driving TPT be approximately 800 Å or more.

ところが、液晶表示装置において、液晶の各画素のスイ
ッチングを行うためのスイッチング用TPTでは、その
半導体薄膜の膜厚を厚くすると、逆方向リーク電流が増
大して画質が低下するという問題が発生する。このため
、スイッチング用TPTにおいては、半導体薄膜の膜厚
を約800Å以下にしなければならない。
However, in the switching TPT for switching each pixel of the liquid crystal in a liquid crystal display device, when the thickness of the semiconductor thin film is increased, a problem arises in that reverse leakage current increases and image quality deteriorates. Therefore, in the switching TPT, the thickness of the semiconductor thin film must be approximately 800 Å or less.

また、液晶表示装置においては、回路の動作タイミング
を正確に保つ意味から、スイッチング用TPTの動作速
度は駆動用TPTの動作速度よりも遅いことが望ましい
Furthermore, in a liquid crystal display device, in order to maintain accurate circuit operation timing, it is desirable that the operating speed of the switching TPT be slower than the operating speed of the driving TPT.

したがって、スイッチング用TPTと、駆動用TPTと
が同一基板上に形成される液晶表示装置等の薄膜半導体
装置においては、駆動用TPTを構成する半導体薄膜の
膜厚のみを厚くして、駆動用TPTの動作速度のみを高
速化することが望ましい。
Therefore, in a thin film semiconductor device such as a liquid crystal display device in which a switching TPT and a driving TPT are formed on the same substrate, only the thickness of the semiconductor thin film constituting the driving TPT is increased, and the driving TPT is It is desirable to increase only the operating speed of.

上記したような電界効果移動度の低下に対する手段とし
ては、特願昭62−143136号の明細書に記載され
ているように、電界効果移動度を向上させたい領域の半
導体薄膜を加熱して、該半導体薄膜の再結晶化を図る技
術が提案されている。
As a means for reducing the field effect mobility as described above, as described in the specification of Japanese Patent Application No. 62-143136, the semiconductor thin film in the region where the field effect mobility is desired to be improved is heated. Techniques for recrystallizing the semiconductor thin film have been proposed.

(発明が解決しようとする課題) 上記した従来技術は、次のような問題点を有していた。(Problem to be solved by the invention) The above-mentioned conventional technology had the following problems.

すなわち、動作速度を高速化したい領域に、局所的にレ
ーザ光などのビーム照射を行って加熱すると、半導体薄
膜の表面が融解し、その部分が再結晶化するが、この際
、ビーム走行時の横方向エピタキシャル成長作用が生じ
ないため均一な膜質が得られず、’r F Tとしての
特性にばらつきが生じるという問題があった。
In other words, when the area where you want to increase the operating speed is locally irradiated with a beam such as a laser beam and heated, the surface of the semiconductor thin film melts and the area recrystallizes. Since the lateral epitaxial growth effect does not occur, a uniform film quality cannot be obtained, and there is a problem in that the characteristics of 'rF T vary.

また、ビーム走査調整により、基板表面の全面にビーム
を均一に走査し、基板表面の全面を再結晶化する技術も
提案されているが、上記した従来技術同様、基板表面の
全面を均一に再結晶化することは難しく、生産性の点か
らみても問題があった。
In addition, a technique has been proposed in which the entire substrate surface is recrystallized by scanning the beam uniformly over the entire surface of the substrate using beam scanning adjustment. It is difficult to crystallize, and there are also problems from the viewpoint of productivity.

本発明の目的は、以上に述べた問題点を解決し、半導体
薄膜の均一性を損なうこと無く、さらには、スイッチン
グ用TPTの逆方向リーク電流を増加させること無く、
駆動用TPTの動作速度を高速化することが可能な薄膜
半導体装置を提供することにある。
The purpose of the present invention is to solve the above-mentioned problems, without impairing the uniformity of the semiconductor thin film, and further without increasing the reverse leakage current of the switching TPT.
An object of the present invention is to provide a thin film semiconductor device that can increase the operating speed of a driving TPT.

(課題を解決するための手段) 上記した問題点を解決するために、本発明は、絶縁性基
板の表面上に形成された第1および第2の半導体薄膜と
、前記第]の半導体薄膜の部分に形成されたスイッチン
グ用TPTと、前記第2の半導体薄膜の部分に形成され
、前記スイッチング用TPTを駆動する駆動用TPTと
を具備した薄膜半導体装置において、前記第2の半導体
薄膜の膜厚を、前記第1の半導体薄膜の膜厚よりも厚く
した点に特徴がある。
(Means for Solving the Problems) In order to solve the above problems, the present invention provides first and second semiconductor thin films formed on the surface of an insulating substrate; In a thin film semiconductor device comprising a switching TPT formed in a portion of the second semiconductor thin film and a driving TPT formed in a portion of the second semiconductor thin film for driving the switching TPT, the thickness of the second semiconductor thin film is is characterized in that it is made thicker than the first semiconductor thin film.

(作用) 半導体薄膜の膜厚を厚くすると電界効果移動度が大きく
なるので、その半導体薄膜を用いて薄膜半導体素子を形
成すると、半導体薄膜の膜厚が薄いときに比べてその動
作速度が向上する。
(Function) As the thickness of the semiconductor thin film increases, the field effect mobility increases, so when a thin film semiconductor element is formed using the semiconductor thin film, its operation speed improves compared to when the semiconductor thin film is thin. .

したがって、上記したように、第2の半導体薄膜の膜厚
を、第1の半導体薄膜の膜厚よりも厚くすると、駆動用
TPTの特性の均一性を損なうこと無く、さらには、ス
イッチング用TPTの逆方向リーク電流を増加させるこ
と無く、駆動用TPTの動作速度をスイッチング用TP
Tの動作速度よりも速くすることができる。
Therefore, as described above, by making the second semiconductor thin film thicker than the first semiconductor thin film, the uniformity of the characteristics of the driving TPT is not impaired, and furthermore, the switching TPT can be made thicker than the first semiconductor thin film. The operating speed of the driving TPT can be increased to the switching TP without increasing reverse leakage current.
The operating speed can be faster than that of T.

(実施例) 以下に、図面を参照して、本発明の詳細な説明する。(Example) The present invention will be described in detail below with reference to the drawings.

第1図は本発明の一実施例の駆動回路を内蔵した液晶表
示装置用TPT基板の平面図である。
FIG. 1 is a plan view of a TPT substrate for a liquid crystal display device incorporating a driving circuit according to an embodiment of the present invention.

1は透明な絶縁性基板であり、本実施例ではガラス基板
を用いている。2は各画素のスイッチングを行うための
TPTがマトリックス状に形成された領域を示し、約3
万個のTPTが配置されている。3は該スイッチング用
TPTを駆動するためのTPTが形成された領域を示し
、約3千個のTPTが配置されている。
1 is a transparent insulating substrate, and in this embodiment, a glass substrate is used. 2 indicates an area in which TPTs for switching each pixel are formed in a matrix, and approximately 3
Tens of thousands of TPTs are arranged. 3 indicates a region where TPTs for driving the switching TPTs are formed, and about 3,000 TPTs are arranged.

第2図は、第1図のA−A断面図であり、特に、同図(
a)は駆動用TFT30の拡大断面図であり、同図(b
)はスイッチング用TFT20の拡大断面図である。
FIG. 2 is a sectional view taken along line A-A in FIG.
(a) is an enlarged sectional view of the driving TFT 30, and (b) is an enlarged sectional view of the driving TFT 30.
) is an enlarged sectional view of the switching TFT 20.

同図において、ガラス基板1の表面には、膜厚500人
の多結晶シリコン膜200、および膜厚1000人の多
結晶シリコン膜300が形成されており、さらに、その
表面にはゲート絶縁膜4を介してゲート電極5が形成さ
れている。
In the figure, a polycrystalline silicon film 200 with a thickness of 500 and a polycrystalline silicon film 300 with a thickness of 1000 are formed on the surface of a glass substrate 1, and a gate insulating film 4 is further formed on the surface. A gate electrode 5 is formed through the gate electrode 5.

21.31はソース領域、22.32はドレイン領域、
23.33はチャネル領域を表している。
21.31 is the source region, 22.32 is the drain region,
23.33 represents the channel region.

本発明の特徴は、第2図に示されるように、駆動用TP
Tとスイッチング用TPTとが同一基板上に形成される
薄膜半導体装置において、駆動用TFT30の多結晶シ
リコン膜300の膜厚を、スイッチング用TPT20の
多結晶シリコン膜200の膜厚よりも厚くした点である
The feature of the present invention is as shown in FIG.
In a thin film semiconductor device in which a TFT and a switching TPT are formed on the same substrate, the thickness of the polycrystalline silicon film 300 of the driving TFT 30 is made thicker than the thickness of the polycrystalline silicon film 200 of the switching TPT 20. It is.

第3図は、本発明の一実施例の駆動回路を内蔵した液晶
表示装置用TPT基板の製造方法を示した図であり、特
に、右半分はスイッチング用TPTの製造方法を示し、
左半分は駆動用TPTの製造方法を示している。
FIG. 3 is a diagram showing a method of manufacturing a TPT substrate for a liquid crystal display device incorporating a driving circuit according to an embodiment of the present invention. In particular, the right half shows a method of manufacturing a TPT for switching;
The left half shows a method of manufacturing the driving TPT.

同図において、第1図および第2図と同一の符号は、同
一または同等部分を表している。
In this figure, the same reference numerals as in FIGS. 1 and 2 represent the same or equivalent parts.

はじめに、ガラスU板1の表面に、CVD法により膜厚
1000人の多結晶シリコン膜300を形成する[同図
(a)]。このときの加熱温度は600℃である。
First, a polycrystalline silicon film 300 having a thickness of 1,000 wafers is formed on the surface of the glass U plate 1 by the CVD method [FIG. 4(a)]. The heating temperature at this time is 600°C.

□  つづいて、駆動用TPTが形成される領域の多結
晶シリコン膜(左半分)をレジストを用いてマスクし、
スイッチング用TPTの多結晶シリコン膜のみをエツチ
ングして、膜厚500人の多結晶シリコン膜200を得
る[同図(b)]。
□ Next, use a resist to mask the polycrystalline silicon film (left half) in the area where the driving TPT will be formed.
Only the polycrystalline silicon film of the switching TPT is etched to obtain a polycrystalline silicon film 200 with a thickness of 500 mm [FIG. 4(b)].

つづいて、多結晶シリコン膜200.300の表面に、
ゲート絶縁膜4、ゲート電極5を同時に形成する。
Next, on the surface of the polycrystalline silicon film 200.300,
Gate insulating film 4 and gate electrode 5 are formed at the same time.

つづいて、前記ゲート電極5をマスクとして不純物をド
ープし、ソース領域21,31、およびドレイン領域2
2.32を形成する。
Next, impurities are doped using the gate electrode 5 as a mask, and the source regions 21 and 31 and the drain region 2 are doped with impurities.
2.32 is formed.

このとき、同時にゲート電極5にも不純物がドープされ
る[同図(C)]。
At this time, the gate electrode 5 is also doped with impurities [FIG. 4(C)].

つづいて、パッシベーション膜7を形成後、コンタクト
用の窓を開け、A!電極6を蒸着する[同図(d)]。
Next, after forming the passivation film 7, a contact window is opened and A! Electrode 6 is deposited [FIG. 6(d)].

第4図は、本発明のその他の実施例の、駆動回路を内蔵
した液晶表示装置用TPT基板の製造方法を示した図で
あり、第3図同様、右半分はスイッチング用TPTの製
造方法を示し、左半分は駆動用TPTの製造方法を示し
て”いる。
FIG. 4 is a diagram showing a method for manufacturing a TPT substrate for a liquid crystal display device with a built-in driving circuit according to another embodiment of the present invention. Similar to FIG. 3, the right half shows a method for manufacturing a TPT for switching. The left half shows the manufacturing method of the driving TPT.

本実施例においては、初めにガラス基板1の表面に、膜
厚500人の多結晶シリコン膜200を形成する[同図
(a)]。
In this example, first, a polycrystalline silicon film 200 with a thickness of 500 wafers is formed on the surface of a glass substrate 1 [FIG. 2(a)].

つづいて、駆動用TPTが形成される領域の多結晶シリ
コン膜をレジストを用いてをマスクし、スイッチング用
TPTの多結晶シリコン膜のみをエツチングによって除
去する[同図(b)]。
Subsequently, the polycrystalline silicon film in the area where the driving TPT is to be formed is masked using a resist, and only the polycrystalline silicon film of the switching TPT is removed by etching [FIG. 4(b)].

ここで、再度多結晶シリコン膜を、CVD法により全面
にわたって500人の膜厚に形成すると、駆動用TPT
が形成される領域には膜厚1000人の多結晶シリコン
膜300が形成され、スイッチング用TFTには膜厚5
00人の多結晶シリコン膜200が形成される[同図(
C)]。
Here, when a polycrystalline silicon film is again formed to a thickness of 500 mm over the entire surface by the CVD method, the driving TPT
A polycrystalline silicon film 300 with a thickness of 1000 is formed in the region where the switching TFT is formed, and a polycrystalline silicon film 300 with a thickness of 5 is formed on the switching TFT.
A polycrystalline silicon film 200 of 0.000 mm is formed [see the same figure (
C)].

本実施例では、同図(b)で説明した工程において、ス
イッチング用TPTの多結晶シリコン膜をガラス基板1
が露出するまで除去するので、第3図に示した実施例の
場合に比較して、多結晶シリコン膜の膜厚を正確に調整
することができる。
In this example, in the process explained in FIG.
Since the polycrystalline silicon film is removed until it is exposed, the thickness of the polycrystalline silicon film can be adjusted more accurately than in the embodiment shown in FIG.

これ以後の工程は、第3図で説明した実施例の場合と同
様であるので、その説明は省略する。
The subsequent steps are the same as those in the embodiment described in FIG. 3, so their explanation will be omitted.

第5図は、本発明の、さらにその他の実施例の駆動回路
を内蔵した液晶表示装置用TPT基板の製造方法を示し
た図であり、前記同様、右半分はスイッチング用TPT
の製造方法を示し、左半分は駆動用TPTの製造方法を
示している。
FIG. 5 is a diagram illustrating a method of manufacturing a TPT substrate for a liquid crystal display device incorporating a driving circuit according to still another embodiment of the present invention, in which the right half is a switching TPT substrate as described above.
The left half shows the manufacturing method of the driving TPT.

同図において、第1図ないし第4図と同一の符号は、同
一または同等部分を表している。
In this figure, the same reference numerals as in FIGS. 1 to 4 represent the same or equivalent parts.

本実施例においては、初めにガラス基板1の表面に、膜
厚500人の多結晶シリコン膜200を形成する[同図
(a)]。
In this example, first, a polycrystalline silicon film 200 with a thickness of 500 wafers is formed on the surface of a glass substrate 1 [FIG. 2(a)].

つづいて、駆動用TPTが形成される領域、スイッチン
グ用TPTのソース領域となる部分、およびドレイン領
域となる部分をレジストを用いてマスクし、スイッチン
グ用TPTの多結晶シリコン膜200のうち、チャネル
領域となる部分のみをエツチングによって除去する[同
図(b)]。
Next, the region where the driving TPT is formed, the source region of the switching TPT, and the drain region are masked using resist, and the channel region of the polycrystalline silicon film 200 of the switching TPT is masked. Only the portion that becomes , is removed by etching [Figure (b)].

ここで、再度多結晶シリコン膜を、CVD法により全面
にわたって500人の膜厚に形成すると、駆動用TPT
が形成される領域、スイッチング用TPTのソース領域
となる部分、およびドレイン領域となる部分には膜厚1
000人の多結晶シリコン膜300が形成され、スイッ
チング用TPTのチャネル領域となる部分には膜厚50
0人の多結晶シリコン膜200が形成される[同図(C
)]。
Here, when a polycrystalline silicon film is again formed to a thickness of 500 mm over the entire surface by the CVD method, the driving TPT
A film thickness of 1 is applied to the region where TPT is formed, the source region of the switching TPT, and the drain region.
A polycrystalline silicon film 300 with a thickness of 500 mm is formed, and a film thickness of 50 mm is formed in the portion that will become the channel region of the switching TPT.
0 polycrystalline silicon film 200 is formed [FIG.
)].

つづいて、第3図で説明した実施例の場合と同様に、ゲ
ート電極5、パッシベーションPIk7等を形成し、A
!電極6を蒸着するC同図(d)]。
Subsequently, as in the case of the embodiment described in FIG. 3, the gate electrode 5, passivation PIk7, etc. are formed.
! (d) of the same figure] in which the electrode 6 is deposited.

本実施例では、スイッチング用TPTにおいても、その
ソース領域、ドレイン領域となる部分の多結晶シリコン
膜が厚く形成され、チャネル領域となる部分の多結晶シ
リコン膜は薄く形成されるため、逆方向リーク電流を増
加させること無く、プロセス欠陥の発生しにくいスイッ
チング用TPTを得ることができる。
In this example, even in the switching TPT, the polycrystalline silicon film in the source region and the drain region is formed thickly, and the polycrystalline silicon film in the channel region is thinly formed, so that reverse leakage occurs. A switching TPT that is less prone to process defects can be obtained without increasing the current.

以上の説明においては、絶縁性基板をガラス基板として
説明したが、透明な絶縁性基板であれば石英基板であっ
ても良い。
In the above description, the insulating substrate was explained as a glass substrate, but a quartz substrate may be used as long as it is a transparent insulating substrate.

また、以上の説明においては、本発明を液晶表示装置に
適用して説明したが、本発明はこれのみに限定されるも
のでは無く、液晶プリンタ用の液晶スイッチアレイある
いは画像読取り装置のラインセンサのように、スイッチ
ング素子として機能するTPTと、それを駆動するため
の駆動用TPTとが同一基板上に形成される薄膜半導体
装置であれば、どのような薄膜半導体装置にも適用でき
る。
Further, in the above description, the present invention has been explained by applying it to a liquid crystal display device, but the present invention is not limited to this, and is applied to a liquid crystal switch array for a liquid crystal printer or a line sensor for an image reading device. Thus, the present invention can be applied to any thin film semiconductor device as long as the TPT functioning as a switching element and the driving TPT for driving the switching element are formed on the same substrate.

なお、上記のように、本発明をラインセンサに適用する
場合は、絶縁性基板は透明でなくても良い。
Note that, as described above, when the present invention is applied to a line sensor, the insulating substrate does not need to be transparent.

(発明の効果) 以上の説明から明らかなように、本発明によれば次のよ
うな効果が達成できる。
(Effects of the Invention) As is clear from the above description, according to the present invention, the following effects can be achieved.

スイッチング用半導体装置と、駆動用半導体装置とを同
一基板上に有する駆動回路内蔵型TPTアクティブマト
リックス基板において、スイッチング用半導体装置の逆
方向リーク電流を増加させること無く、さらには、駆動
用半導体装置の半導体薄膜の表面の均一性を損なうこと
無く、駆動用半導体装置の動作速度を、スイッチング用
半導体装置の動作速度よりも速くすることができる。
In a TPT active matrix substrate with a built-in driving circuit that has a switching semiconductor device and a driving semiconductor device on the same substrate, the reverse leakage current of the switching semiconductor device is not increased, and the driving semiconductor device is The operating speed of the driving semiconductor device can be made faster than the operating speed of the switching semiconductor device without impairing the uniformity of the surface of the semiconductor thin film.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の液晶表示装置の平面図であ
る。 第2図は本発明の一実施例の液晶表示装置の部分断面図
である。 第3図は本発明の一実施例の製造方法を示した断面図で
ある。 第4図は本発明のその他の実施例の製造方法を示した断
面図である。 第5図は本発明のさらにその他の実施例の製造方法を示
した断面図である。
FIG. 1 is a plan view of a liquid crystal display device according to an embodiment of the present invention. FIG. 2 is a partial sectional view of a liquid crystal display device according to an embodiment of the present invention. FIG. 3 is a sectional view showing a manufacturing method according to an embodiment of the present invention. FIG. 4 is a sectional view showing a manufacturing method of another embodiment of the present invention. FIG. 5 is a sectional view showing a manufacturing method of still another embodiment of the present invention.

Claims (5)

【特許請求の範囲】[Claims] (1)絶縁性基板と、絶縁性基板の表面上に形成された
第1および第2の半導体薄膜と、前記第1の半導体薄膜
の部分に形成された第1の薄膜半導体素子と、前記第2
の半導体薄膜の部分に形成された第2の薄膜半導体素子
とを具備し、前記第2の薄膜半導体素子は前記第1の薄
膜半導体素子を駆動する薄膜半導体装置において、 前記第2の半導体薄膜の膜厚が、前記第1の半導体薄膜
の膜厚よりも厚いことを特徴とする薄膜半導体装置。
(1) an insulating substrate, first and second semiconductor thin films formed on the surface of the insulating substrate, a first thin film semiconductor element formed in a portion of the first semiconductor thin film, and a first thin film semiconductor element formed on a portion of the first semiconductor thin film; 2
a second thin film semiconductor element formed in a portion of a semiconductor thin film, the second thin film semiconductor element driving the first thin film semiconductor element, A thin film semiconductor device, wherein the film thickness is greater than that of the first semiconductor thin film.
(2)前記第1の薄膜半導体素子は、前記絶縁性基板の
表面上にマトリックス状に配置して形成されたことを特
徴とする特許請求の範囲第1項記載の薄膜半導体装置。
(2) The thin film semiconductor device according to claim 1, wherein the first thin film semiconductor elements are arranged in a matrix on the surface of the insulating substrate.
(3)前記絶縁性基板は、透明ガラス基板または石英基
板であることを特徴とする特許請求の範囲第1項または
第2項記載の薄膜半導体装置。
(3) The thin film semiconductor device according to claim 1 or 2, wherein the insulating substrate is a transparent glass substrate or a quartz substrate.
(4)前記第1の薄膜半導体素子は、スイッチング素子
であることを特徴とする特許請求の範囲第1項ないし第
3項のいづれかに記載の薄膜半導体装置。
(4) The thin film semiconductor device according to any one of claims 1 to 3, wherein the first thin film semiconductor element is a switching element.
(5)前記第1の薄膜半導体素子は、光センサであるこ
とを特徴とする特許請求の範囲第1項ないし第3項のい
づれかに記載の薄膜半導体装置。
(5) The thin film semiconductor device according to any one of claims 1 to 3, wherein the first thin film semiconductor element is an optical sensor.
JP63016917A 1988-01-29 1988-01-29 Thin film semiconductor device Pending JPH01194351A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63016917A JPH01194351A (en) 1988-01-29 1988-01-29 Thin film semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63016917A JPH01194351A (en) 1988-01-29 1988-01-29 Thin film semiconductor device

Publications (1)

Publication Number Publication Date
JPH01194351A true JPH01194351A (en) 1989-08-04

Family

ID=11929485

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63016917A Pending JPH01194351A (en) 1988-01-29 1988-01-29 Thin film semiconductor device

Country Status (1)

Country Link
JP (1) JPH01194351A (en)

Cited By (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04279064A (en) * 1991-03-07 1992-10-05 Sharp Corp Display device
US5530266A (en) * 1991-08-02 1996-06-25 Canon Kabushiki Kaisha Liquid crystal image display unit and method for fabricating semiconductor optical member
US5633176A (en) * 1992-08-19 1997-05-27 Seiko Instruments Inc. Method of producing a semiconductor device for a light valve
US5656825A (en) * 1994-06-14 1997-08-12 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor having crystalline semiconductor layer obtained by irradiation
US5696388A (en) * 1993-08-10 1997-12-09 Semiconductor Energy Laboratory Co., Ltd. Thin film transistors for the peripheral circuit portion and the pixel portion
US6147375A (en) * 1992-02-05 2000-11-14 Semiconductor Energy Laboratory Co., Ltd. Active matrix display device
US6337232B1 (en) 1995-06-07 2002-01-08 Semiconductor Energy Laboratory Co., Ltd. Method of fabrication of a crystalline silicon thin film semiconductor with a thin channel region
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JP2002334994A (en) * 2001-03-07 2002-11-22 Seiko Epson Corp Electro-optical device and manufacturing method therefor, substrate for electro-optical device, projection-type display unit, and electronic equipment
US6613613B2 (en) 1994-08-31 2003-09-02 Semiconductor Energy Laboratory Co., Ltd. Thin film type monolithic semiconductor device
WO2003105236A1 (en) * 2002-06-07 2003-12-18 ソニー株式会社 Display unit and production method therefor, and projection type display unit
US6797550B2 (en) 2001-12-21 2004-09-28 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method therefor
US6911358B2 (en) 2001-12-28 2005-06-28 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
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Cited By (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04279064A (en) * 1991-03-07 1992-10-05 Sharp Corp Display device
US5530266A (en) * 1991-08-02 1996-06-25 Canon Kabushiki Kaisha Liquid crystal image display unit and method for fabricating semiconductor optical member
US5827755A (en) * 1991-08-02 1998-10-27 Canon Kabushiki Kaisha Liquid crystal image display unit and method for fabricating semiconductor optical member
US6147375A (en) * 1992-02-05 2000-11-14 Semiconductor Energy Laboratory Co., Ltd. Active matrix display device
US6476447B1 (en) 1992-02-05 2002-11-05 Semiconductor Energy Laboratory Co., Ltd. Active matrix display device including a transistor
US5633176A (en) * 1992-08-19 1997-05-27 Seiko Instruments Inc. Method of producing a semiconductor device for a light valve
US5696388A (en) * 1993-08-10 1997-12-09 Semiconductor Energy Laboratory Co., Ltd. Thin film transistors for the peripheral circuit portion and the pixel portion
US5940690A (en) * 1994-06-14 1999-08-17 Kusumoto; Naoto Production method for a thin film semiconductor device with an alignment marker made out of the same layer as the active region
US5656825A (en) * 1994-06-14 1997-08-12 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor having crystalline semiconductor layer obtained by irradiation
US6541795B2 (en) 1994-06-14 2003-04-01 Semiconductor Energy Laboratory Co., Ltd. Thin film semiconductor device and production method for the same
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US6613613B2 (en) 1994-08-31 2003-09-02 Semiconductor Energy Laboratory Co., Ltd. Thin film type monolithic semiconductor device
US6337232B1 (en) 1995-06-07 2002-01-08 Semiconductor Energy Laboratory Co., Ltd. Method of fabrication of a crystalline silicon thin film semiconductor with a thin channel region
JP2002334994A (en) * 2001-03-07 2002-11-22 Seiko Epson Corp Electro-optical device and manufacturing method therefor, substrate for electro-optical device, projection-type display unit, and electronic equipment
US7319055B2 (en) 2001-12-21 2008-01-15 Semiconductor Energy Laboratory Co., Ltd. Method of fabricating a semiconductor device utilizing crystallization of semiconductor region with laser beam
US6797550B2 (en) 2001-12-21 2004-09-28 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method therefor
US7129121B2 (en) 2001-12-28 2006-10-31 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
US6911358B2 (en) 2001-12-28 2005-06-28 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
WO2003105236A1 (en) * 2002-06-07 2003-12-18 ソニー株式会社 Display unit and production method therefor, and projection type display unit
JPWO2003105236A1 (en) * 2002-06-07 2005-10-13 ソニー株式会社 Display device, manufacturing method thereof, and projection display device
US7189993B2 (en) 2002-06-07 2007-03-13 Sony Corporation Display device, method of production of the same, and projection type display device
US7407840B2 (en) 2002-06-07 2008-08-05 Sony Corporation Display device, method of production of the same, and projection type display device
US7588976B2 (en) 2002-06-07 2009-09-15 Sony Corporation Display device, method of production of the same, and projection type display device
JP4631437B2 (en) * 2002-06-07 2011-02-16 ソニー株式会社 Display device, manufacturing method thereof, and projection display device
US7632725B2 (en) 2003-04-25 2009-12-15 Tpo Displays Corp. Method of forming ESD protection device with thick poly film
JP2005223027A (en) * 2004-02-04 2005-08-18 Sony Corp Display device and manufacturing method therefor
JP2008182124A (en) * 2007-01-25 2008-08-07 Semiconductor Energy Lab Co Ltd Display
JP2017046007A (en) * 2009-09-16 2017-03-02 株式会社半導体エネルギー研究所 Semiconductor device manufacturing method

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