JPH01189101A - Manufacture of resistor - Google Patents

Manufacture of resistor

Info

Publication number
JPH01189101A
JPH01189101A JP63014311A JP1431188A JPH01189101A JP H01189101 A JPH01189101 A JP H01189101A JP 63014311 A JP63014311 A JP 63014311A JP 1431188 A JP1431188 A JP 1431188A JP H01189101 A JPH01189101 A JP H01189101A
Authority
JP
Japan
Prior art keywords
layer
resistor
electrode
layers
connecting conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP63014311A
Other languages
Japanese (ja)
Other versions
JP2654655B2 (en
Inventor
Yasunobu Oikawa
泰伸 及川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Corp
Original Assignee
TDK Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TDK Corp filed Critical TDK Corp
Priority to JP63014311A priority Critical patent/JP2654655B2/en
Publication of JPH01189101A publication Critical patent/JPH01189101A/en
Application granted granted Critical
Publication of JP2654655B2 publication Critical patent/JP2654655B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Apparatuses And Processes For Manufacturing Resistors (AREA)

Abstract

PURPOSE:To obtain a resistor having large adhering strength of an electrode section and a stable resistance value by laminating a resistor layer and an electrode layer on a substrate, covering a part except the necessary region of the electrode layer with a resist layer, plating a connecting conductor layer only on the necessary region, providing a protective film on the conductor layer, and then removing the resist layer which becomes unnecessary. CONSTITUTION:A resistor layer 3 made of Ni-Cr alloy is sputter deposited in a predetermined thickness on one face of a flat substrate 2 of alumina, and a Cu electrode layer 4 is laminated thereon by means of a similar method. Then, the layer 4 except electrode sections 7a, 7b forming region is covered with a resist layer 5 by means of a photolithography, and with the layer 5 as a mask the layers 4a, 4b of the layer 4 to become the sections 7a, 7b are covered with Cu connecting conductor layers 8a, 8b by means of a wet plating method. Thereafter, protective layers 9a, 9b made of Ni are laminated thereon by a similar method, the layer 5 is removed by isolating, and the layer 4 becoming unnecessary except the layers 4a, 4b is removed by etching.

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 本発明は抵抗器の製造方法に関し、ざらに詳しくは基板
集合体処理で製造され各種電子、電気機器の回路要素と
して用いられるチップ型等の抵抗器の製造方法に関する
[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to a method for manufacturing a resistor, and more specifically, it relates to a method for manufacturing a resistor, and more specifically, it is manufactured by a substrate assembly process and used as a circuit element of various electronic and electrical devices. The present invention relates to a method of manufacturing a chip type resistor.

(従来の技術) 従来におけるこの種の抵抗器20の製造方法の概要を、
第7図を参照して説明する。
(Prior Art) An overview of the conventional manufacturing method of this type of resistor 20 is as follows.
This will be explained with reference to FIG.

この製造方法は、まず例えばアルミナ基板21上にNi
Cr合金等を用いた抵抗体層22を形成した後、この抵
抗体層22上の所定の領域に所定寸法の電極層23a、
23bをスパッタリング。
In this manufacturing method, first, for example, Ni is deposited on an alumina substrate 21.
After forming the resistor layer 22 using a Cr alloy or the like, an electrode layer 23a having a predetermined size is formed on a predetermined region on the resistor layer 22.
Sputtering 23b.

蒸着等の方法により形成するか又は、抵抗体膜全域に電
極層(Cu及び又はCu合金等)を形成した後電極層の
うち必要領域に、レジスト層24a。
A resist layer 24a is formed by a method such as vapor deposition, or after an electrode layer (Cu and/or Cu alloy, etc.) is formed over the entire resistor film, a resist layer 24a is formed in a necessary region of the electrode layer.

24bを形成し、不必要領域の電極層を除去することに
より、電極パターンを形成する。さらに抵抗体@22を
フォトリソグラフィー等で抵抗パターンを形成して抵抗
器20を得るものである。
24b is formed and the electrode layer in unnecessary areas is removed to form an electrode pattern. Furthermore, the resistor 20 is obtained by forming a resistor pattern on the resistor @22 by photolithography or the like.

しかしながら、上述した従来方法では、電極層23a、
23bをスパッタリングや蒸着等の方法で形成するもの
であるため、これら各層形成時に大きな問題点が生じる
However, in the conventional method described above, the electrode layer 23a,
Since the layer 23b is formed by a method such as sputtering or vapor deposition, a big problem arises when forming each of these layers.

すなわち例えば、電極層23a、23bの膜圧をある程
度厚くすると、抵抗体層22との密着強度が悪化し、か
つスパッタリングや蒸着の時間が長いことによる製造コ
ストの高騰を招いてしまう。
That is, for example, if the film thickness of the electrode layers 23a and 23b is increased to a certain extent, the adhesion strength with the resistor layer 22 deteriorates, and the manufacturing cost increases due to the long sputtering and vapor deposition times.

また、接続用導体層24a、24bについては、その膜
厚が薄すぎるとこれら自体の抵抗値が大きくなり、特に
抵抗体層22が低抵抗値である抵抗器20の場合には、
抵抗体層22に対するトリミング時と完成した抵抗器2
0とにおける抵抗値の差が大きくなって、製品としての
抵抗器20にあける抵抗値が大幅に異なってしまう。
In addition, if the connection conductor layers 24a and 24b are too thin, their own resistance value will increase, especially in the case of the resistor 20 in which the resistor layer 22 has a low resistance value.
Trimming of resistor layer 22 and completed resistor 2
0 and the resistance value becomes large, and the resistance value of the resistor 20 as a product differs significantly.

(発明が解決しようとする課題) 上述したように従来の抵抗器の製造方法においては、そ
の製造方法に起因して各層の密着強度の悪化や製造コス
トの高騰を招いたり、抵抗値の安定した製品を得ること
ができないという問題がおる。
(Problems to be Solved by the Invention) As mentioned above, in the conventional manufacturing method of resistors, due to the manufacturing method, the adhesion strength of each layer deteriorates, the manufacturing cost increases, and the resistance value becomes stable. There is a problem of not being able to obtain the product.

そこで、本発明は電極部を構成する各層の密着強度が良
く、製造コストも低減できると共に、安定した抵抗値を
有する製品を提供することができる抵抗器の製造方法を
提供することを目的とするものである。
SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a method for manufacturing a resistor that can provide a product that has good adhesion strength between each layer constituting an electrode part, can reduce manufacturing costs, and has a stable resistance value. It is something.

[発明の構成] (課題を解決するための手段) 本発明の抵抗器の製造方法は、基板上に抵抗体層を形成
する工程と、この抵抗体層上の全域に電極層を形成する
工程と、この電極層のうち必要領域以外の領域にレジス
ト層を形成する工程と、前記電極層の必要領域にメッキ
法により接続用導体層を形成する工程と、この接続用導
体層上にメッキ法による導体層の保護層を形成する工程
と、前記レジスト層及びこのレジスト層に対応する領域
の電極層を除去する工程とを有するものである。
[Structure of the Invention] (Means for Solving the Problems) The method for manufacturing a resistor of the present invention includes a step of forming a resistor layer on a substrate, and a step of forming an electrode layer over the entire area on the resistor layer. a step of forming a resist layer on a region other than the required region of the electrode layer; a step of forming a connecting conductor layer on the required region of the electrode layer by a plating method; and a plating method on the connecting conductor layer. and a step of removing the resist layer and the electrode layer in a region corresponding to the resist layer.

(作 用) 上述した構成からなる抵抗器の製造方法によれば、基板
上に抵抗体層、電極層を形成すると共に、この電極層の
必要領域以外の領域をレジスト層で被覆し必要領域のみ
にメッキ法による接続導体層を、ざらにこの接続導体層
上にメッキ法による導体層の保護層を形成した後、前記
レジスト層及びこのレジスト層に対応する領域の電極層
を除去して抵抗器を得るものであるから、所望の厚さを
有し、密着強度が大きく、しかも抵抗値の低い電極部分
を有する抵抗器を低コストで製造することができる。
(Function) According to the method for manufacturing a resistor having the above-described configuration, a resistor layer and an electrode layer are formed on a substrate, and areas other than the necessary areas of the electrode layer are covered with a resist layer, so that only the necessary areas are covered. After roughly forming a protective layer for the conductor layer by plating on the connecting conductor layer, the resist layer and the electrode layer in the area corresponding to this resist layer are removed to form a resistor. Therefore, a resistor having an electrode portion having a desired thickness, high adhesion strength, and low resistance value can be manufactured at low cost.

(実施例) 以下に本発明の実施例を詳細に説明する。(Example) Examples of the present invention will be described in detail below.

第1図は、本実施例方法により得られるチップ型の抵抗
器1を示すものである。
FIG. 1 shows a chip-type resistor 1 obtained by the method of this embodiment.

この抵抗器1は、アルミナ類の基板2と、この基板2の
一方の面に形成したNiCr合金製の抵抗体層3と、こ
の抵抗体層3上の必要領域、すなわち、電極部分を形成
する領域に形成された2ケ所の電極層4a、4bと、画
電極層4a、4b上にそれぞれ形成したCu製の接続用
導体層5a。
This resistor 1 includes a substrate 2 made of alumina, a resistor layer 3 made of a NiCr alloy formed on one surface of the substrate 2, and a necessary area on this resistor layer 3, that is, an electrode portion is formed. Two electrode layers 4a and 4b formed in the area and a connecting conductor layer 5a made of Cu formed on the picture electrode layers 4a and 4b, respectively.

5bと、両接続用導体層5a、5b上にそれぞれ形成し
た保護層6a、6bとを有し、前記一方の電極層4a、
接続用導体層5a及び保護層6aにより一方の電極部7
aを、他方の電極層4b、接続用導体層5b及び保護層
6bにより他方の電極部7bをそれぞれ構成している。
5b, and protective layers 6a and 6b formed on both connection conductor layers 5a and 5b, respectively, the one electrode layer 4a,
One electrode portion 7 is formed by the connecting conductor layer 5a and the protective layer 6a.
a, the other electrode layer 4b, the connecting conductor layer 5b, and the protective layer 6b constitute the other electrode portion 7b, respectively.

次に、上記構成の抵抗器1の製造工程について第2図乃
至第6図をも参照して説明する。
Next, the manufacturing process of the resistor 1 having the above structure will be explained with reference to FIGS. 2 to 6.

まず、アルミナ類の平坦な基板2を用意し、この基板2
の一方の面全体にNiCr合金からなる抵抗体層3を所
定の厚さ(約250A>にスパッタリングの方法で形成
する。ざらに、この抵抗体層3の上面全体に第2図に示
すようにスパッタリング、によりCu製の電極層4を所
定の厚さ(約2000A>に形成した。
First, prepare a flat substrate 2 made of alumina, and
A resistor layer 3 made of NiCr alloy is formed on the entire surface of the resistor layer 3 to a predetermined thickness (approximately 250 Å) by sputtering. Roughly, as shown in FIG. An electrode layer 4 made of Cu was formed to a predetermined thickness (approximately 2000 Å>) by sputtering.

次に、第3図に示すようにフォトリソグラフィーの方法
により、前記電極部7a、7bを形成すべき領域を除く
電極層4の上面に所定厚ざ(約2.5μm)のレジスト
層5を形成する。ざらに、電極層4上の電極部7a、7
bを形成すべき領域に対し、第4図に示すように湿式メ
ッキの方法によりCu製の接続用導体層aa、abをそ
れぞれ所定の厚ざ(約5μm)に形成した。
Next, as shown in FIG. 3, a resist layer 5 having a predetermined thickness (approximately 2.5 μm) is formed on the upper surface of the electrode layer 4 except for the regions where the electrode portions 7a and 7b are to be formed by a photolithography method. do. Roughly, the electrode parts 7a, 7 on the electrode layer 4
As shown in FIG. 4, connection conductor layers aa and ab made of Cu were formed to a predetermined thickness (approximately 5 μm) in the area where b was to be formed by wet plating, respectively.

この接続用導体層Ba、Bbは湿式メッキの方法で形成
するものであるから、その厚さを任意に設定でき、例え
ば′L!A造すべき抵抗器1が低抵抗値のものであれば
、その厚さを通常の場合よりも厚くしてこの接続用導電
体層8a、3b自体の抵抗値を低くする。
Since the connection conductor layers Ba and Bb are formed by wet plating, their thickness can be set arbitrarily, for example, 'L! If the resistor 1 to be manufactured has a low resistance value, its thickness is made thicker than usual to lower the resistance value of the connecting conductor layers 8a, 3b themselves.

また、この接続用導体層8a、8bは上述したように湿
式メッキの方法で形成するものであるから、電極層4に
対する密着強度も大きく、しかも、スパッタリング等で
形成する場合に比較し製造コストが大幅に低減する。
Furthermore, since the connection conductor layers 8a and 8b are formed by the wet plating method as described above, the adhesion strength to the electrode layer 4 is high, and the manufacturing cost is lower than when they are formed by sputtering or the like. significantly reduced.

次に、上述した接続用導体層8a、 8bの上面に第5
図に示すように再度湿式メッキの手法によりNi等の材
質からなる導体層の保護層9a。
Next, a fifth
As shown in the figure, a protective layer 9a of the conductor layer made of a material such as Ni is formed by wet plating again.

9bを所定の厚さ(本実施例ではNiを約1μm)に形
成する。この保護層9a、9bの材質としては、半田付
性が有り、かつ後述するエツチング処理の際のエッチャ
ントにおかされない上述したNiやAg、Au、Sn等
のような金属を用いる。
9b is formed to a predetermined thickness (in this embodiment, Ni is approximately 1 μm thick). The protective layers 9a and 9b are made of a metal such as Ni, Ag, Au, or Sn, which has solderability and is not affected by the etchant used in the etching process described later.

この保護層9a、9bも湿式メッキの方法で形成するの
で、接続用導体層8a、 8bとの密着強度が大きく、
しかも、製造コスト低減に奇与する。
Since the protective layers 9a and 9b are also formed by wet plating, the adhesion strength with the connecting conductor layers 8a and 8b is high.
Moreover, it has a miraculous effect on reducing manufacturing costs.

次に、第6図に示す前記レジスト層5の剥離処理と、前
記電極部7a、7b以外の領域の電極層4に対するエツ
チング処理からなる不要部分の除去処理を行うことによ
り、電極パッドが形成できる。ざらにこの後、フォトリ
ソグラフィーにより抵抗パターンの形成、トリミング等
を行い、第1図に示す抵抗器1を得ることができる。
Next, an electrode pad can be formed by performing a process for removing unnecessary portions, which includes peeling off the resist layer 5 and etching the electrode layer 4 in areas other than the electrode portions 7a and 7b, as shown in FIG. . After this, a resistor pattern is formed and trimmed by photolithography, and the resistor 1 shown in FIG. 1 can be obtained.

このような抵抗器1の製造方法によれば、電極部7a、
7bの厚さを容易に厚くすることができるので、これら
自体の抵抗値が小さくなり、低抵抗値の抵抗器1の場合
にも、抵抗体層3に対するトリミング等の影響を受ける
ことがない安定した抵抗値を有する製品を参画り良く製
造できる。これに付随して、抵抗器1の抵抗値の下限範
囲を広げることも可能となる。
According to this method of manufacturing the resistor 1, the electrode portion 7a,
Since the thickness of 7b can be easily increased, the resistance value of these elements themselves becomes small, and even in the case of the resistor 1 with a low resistance value, it is stable and is not affected by trimming etc. of the resistor layer 3. It is possible to easily manufacture products with a certain resistance value. Along with this, it is also possible to widen the lower limit range of the resistance value of the resistor 1.

また、電極部7a、7bを構成する接続用導体層3a、
8b及び保護層ga、gbを湿式メッキの方法で形成す
るので、これらの密着強度が大きくなるとともに、製造
コストの低減をも図ることができる。
Further, a connecting conductor layer 3a constituting the electrode parts 7a and 7b,
Since the protective layers 8b and the protective layers ga and gb are formed by a wet plating method, their adhesion strength is increased and manufacturing costs can also be reduced.

ざらに、接続用導体層8a、8bは必要とする領域のみ
厚くすれば良いので、材料ロスが無くなり、この点から
も製造コストの低減に奇与する。
Roughly speaking, since the connection conductor layers 8a and 8b need only be made thicker in the necessary regions, there is no loss of material, which also contributes to a reduction in manufacturing costs.

本発明は上述した実施例に限定されるものではなく、そ
の要旨の範囲内で種々の変形が可能である。例えば接続
用導体層8a、8bと保護層9a。
The present invention is not limited to the embodiments described above, and various modifications can be made within the scope of the invention. For example, connection conductor layers 8a, 8b and protective layer 9a.

9bの材料を適当に選べば両者の機能を満すことも可能
となる。
If the material of 9b is appropriately selected, it is possible to satisfy both functions.

[発明の効果] 以上詳述した発明によれば、電極部の密着強度が大きく
、安定した抵抗値を有する製品をローコストに製造する
ことができる抵抗器の製造方法を提供することができる
[Effects of the Invention] According to the invention described in detail above, it is possible to provide a method for manufacturing a resistor that can manufacture a product having a high adhesion strength of the electrode portion and a stable resistance value at low cost.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例方法により製造される抵抗器を
示す断面図、第2図乃至第6図はそれぞれ実施例方法の
製造工程を示す断面図、第7図は従来方法で製造される
抵抗器を示す断面図である。 1・・・抵抗器、2・・・基板、3・・・抵抗体層、4
a、4b・・・電極層、 5a、5b・・・接続用導体層、 6a、5b・・・保護層。
FIG. 1 is a sectional view showing a resistor manufactured by an embodiment method of the present invention, FIGS. 2 to 6 are sectional views each showing the manufacturing process of the embodiment method, and FIG. 7 is a sectional view showing a resistor manufactured by a conventional method. FIG. DESCRIPTION OF SYMBOLS 1...Resistor, 2...Substrate, 3...Resistor layer, 4
a, 4b...electrode layer, 5a, 5b...connecting conductor layer, 6a, 5b...protective layer.

Claims (1)

【特許請求の範囲】[Claims] 基板上に抵抗体層を形成する工程と、この抵抗体層上の
全域に電極層を形成する工程と、この電極層のうち必要
領域以外の領域にレジスト層を形成する工程と、前記電
極層の必要領域にメッキ法により接続用導体層を形成す
る工程と、この接続用導体層上にメッキ法による導体製
の保護層を形成する工程と、前記レジスト層及びこのレ
ジスト層に対応する領域の電極層を除去する工程とを有
することを特徴とする抵抗器の製造方法。
A step of forming a resistor layer on a substrate, a step of forming an electrode layer over the entire area on this resistor layer, a step of forming a resist layer in an area other than the required area of this electrode layer, and a step of forming the resist layer on the electrode layer. a step of forming a connecting conductor layer by plating in the required area of the connecting conductor layer, a step of forming a protective layer made of a conductor by plating on the connecting conductor layer, and a step of forming the resist layer and the area corresponding to the resist layer. A method for manufacturing a resistor, comprising the step of removing an electrode layer.
JP63014311A 1988-01-25 1988-01-25 Manufacturing method of resistor Expired - Lifetime JP2654655B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63014311A JP2654655B2 (en) 1988-01-25 1988-01-25 Manufacturing method of resistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63014311A JP2654655B2 (en) 1988-01-25 1988-01-25 Manufacturing method of resistor

Publications (2)

Publication Number Publication Date
JPH01189101A true JPH01189101A (en) 1989-07-28
JP2654655B2 JP2654655B2 (en) 1997-09-17

Family

ID=11857551

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63014311A Expired - Lifetime JP2654655B2 (en) 1988-01-25 1988-01-25 Manufacturing method of resistor

Country Status (1)

Country Link
JP (1) JP2654655B2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6242858A (en) * 1985-08-20 1987-02-24 Oki Electric Ind Co Ltd Preparation of thermal head

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6242858A (en) * 1985-08-20 1987-02-24 Oki Electric Ind Co Ltd Preparation of thermal head

Also Published As

Publication number Publication date
JP2654655B2 (en) 1997-09-17

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