JPH01187916A - Grain boundary insulation type semiconductor porcelain composition - Google Patents

Abstract

PURPOSE:To obtain a capacitor in which high dielectric constant is obtained with small grain size, thickness can be reduced, stability and reliability of insulation resistance are not deteriorated by reduced thickness, large mechanical strength and large product of the dielectric constant and breakdown strength voltage are provided by employing the capacitor made of a specific composition. CONSTITUTION:A main ingredient is represented by a general formula of (Sr1-x-yBaxMy) (Ti1-zM'z)alphaO3 (where M is at least one selected from rare earth elements, M' is at least one kind selected from Nb, Ta and W, and at least one type of M, M' is contained), x, y+z, alpha are respectively 0.40<x<=0.60, 0.0005<=y+z<=0.03, and 1.001<=alpha<=1.010, its crystal grain boundaries are insulated by the oxide of Mn and at least one kind of oxide of one selected from Bi, Pb, B and Si, and its maximum grain size is 50mum or less. Or, one or more kinds of SiO2 and Al2O3 may be added by 0-0.1wt.% as sub ingredient to 99.9-100wt.% of the main ingredient.

Description

Detailed Description of the Invention (Industrial Application Field) The present invention relates to a grain boundary insulated semiconductor ceramic composition, and particularly to a grain boundary insulated semiconductor ceramic composition used as a material for a grain boundary insulated semiconductor ceramic capacitor, for example. Regarding.

(Prior Art) Examples of conventional grain boundary insulated semiconductor ceramic compositions that form the background of this invention are disclosed in Japanese Patent Laid-Open No. 56-54024 and Japanese Patent Laid-Open No. 54024-1989
It is disclosed in Japanese Patent Application Laid-open No. 6-54025 and Japanese Patent Application Laid-open No. 56-54026. In this grain boundary insulated semiconductor ceramic composition, the Kt ratio is increased by setting the maximum grain size to 100 μm or more. By using this grain boundary insulated semiconductor ceramic composition as a material for a capacitor, the capacitance of the capacitor can be increased.

(Problems to be Solved by the Invention) However, when making a capacitor using such a grain boundary insulated semiconductor ceramic composition, the maximum grain size is as large as 100 μm or more. The number of particles in the thickness direction of the porcelain plate is reduced. Therefore,
The thickness of the insulating layer per unit thickness, that is, the thickness of the grain boundary phase becomes smaller. Therefore, the dielectric breakdown voltage per unit thickness of the ceramic plate is small, and therefore the product of dielectric constant and dielectric breakdown voltage becomes small. In addition, a porcelain plate with a thickness of 200 μm
When the thickness is reduced to a certain degree, the stability and reliability of insulation resistance deteriorate. Furthermore, the mechanical strength of the porcelain plate is reduced, and capacitors using this porcelain plate are more likely to be damaged. Therefore, when such a grain boundary insulated semiconductor ceramic composition is used, it is difficult to make a capacitor chip or thin.

Therefore, the main purpose of this invention is to ensure a high dielectric constant with small grain size, to make a porcelain plate thinner using the same, and to maintain insulation resistance stability and reliability even if the porcelain plate is made thinner. An object of the present invention is to provide a grain boundary insulated semiconductor porcelain composition capable of producing a capacitor in which the properties of the ceramic plate are not deteriorated, the mechanical strength of the porcelain plate is high, and the product of dielectric constant and dielectric breakdown voltage is large.

(Means for Solving the Problems) In this invention, the main component is (Sr+□-y Ba X M
y) (Ti+--M'-)tx03. (However, M is at least one kind selected from rare earth elements, and M' is N
At least one type selected from b, Ta and W,
However, at least one of M and M' is included)
It is expressed by the general formula, where X, )'+Z, α are respectively 0
．． 40<x≦0.60, O, ooos≦y+z≦0.0
3, and 1.001≦α≦1.010, and the grain boundaries are insulated by an oxide of Mn and at least one oxide selected from Bi, Pb, B, and Si. This is a grain boundary insulated semiconductor ceramic composition having a maximum grain size of 50 μm or less.

(Function) If a porcelain plate for making a capacitor is formed using this grain-boundary insulated semiconductor porcelain composition, the number of particles aligned in the thickness direction of the porcelain plate will be larger than that of conventional ones with large grain sizes. Become. Therefore, the thickness of the insulating layer per unit thickness, that is, the thickness of the grain boundary phase increases. Therefore, the number of equivalent capacitors and equivalent resistors connected in series in the thickness direction of the ceramic plate increases.

(Effects of the Invention) According to the present invention, it is possible to make a porcelain plate thin using the same, the mechanical strength of this porcelain plate is high, and even if the porcelain plate is made thin, the insulation resistance is stable and reliable. It is possible to obtain a grain-boundary insulated semiconductor ceramic composition that does not deteriorate and can produce a capacitor with a large product of dielectric constant and dielectric breakdown voltage.

The above objects, other objects, features and advantages of the present invention will become more apparent from the detailed description of the following embodiments.

(Example) First, as starting materials, 5rCO,, BaCO°, Ti0
z , Yz Oz , Ndz 03 , Nbz
05, Ce0z, Lag O3, WO3, S i
oz and Al2O3 were prepared. Then, these raw materials were blended at the blending ratio shown in Table 1 to obtain blended raw materials. These mixed raw materials were calcined at 1150°C for 2 hours. Next, 10% by weight of a vinyl acetate resin was added to the calcined blended raw materials, which were wet-pulverized and sized using a 50-mesh sieve to obtain a sized product. Then, this sized product was molded into a disk shape with a diameter of IQ mm and a thickness of 0° and 3 mm under a pressure of 2 tons/cfA to obtain a molded product.

Next, this disc-shaped molded product was placed in air at 1200°C.
98% nitrogen by volume and 2% hydrogen by volume
Semiconductor porcelain was obtained by firing at 1400° C. for 2 to 4 hours in a reducing atmosphere consisting of:

As shown in Table 1, one of the following metal oxide bases A, B, and C as an insulating agent was applied to the surface of the obtained semiconductor ceramic.

MnO□・・・・・・7 weight% Bi2O3・・・43 weight% Resin face・・・50 weight% B MnO2・・・・・・4 weight% Pb30a・・・40 Weight% CuO...
...6% by weight Resin face...50% by weight M n Oz...5% by weight H3BO□
...45% by weight Resin face ...50% by weight Then, the semiconductor porcelain coated with metal oxide was heat-treated at 1150°C for 2 hours in the air to make the grain boundaries insulators. .

Next, silver paste was printed and coated on both sides of the semiconductor porcelain whose grain boundaries were made into insulators. This was baked at 800° C. for 30 minutes to form electrodes, thereby creating samples 1 to 24 (capacitors).

Then, the dielectric constant (ε) and dielectric loss (ta
nδ), insulation resistance (IR), capacitance temperature characteristics (ΔTC
) and dielectric breakdown voltage (B D V) were measured and shown in Table 2.

Note that the dielectric constant (ε) and dielectric loss (tan δ) are 1
It was measured under the conditions of kHz, 0.2V, ..., 20°C.

Furthermore, the insulation resistance (IR) was determined by applying a DC voltage of 16 V per thickness 11 of the sample at a temperature of 20°C.
Measured after seconds.

Further, the capacitance temperature characteristic (ΔTC) is a value indicating the maximum capacitance change rate in the temperature range of -25°C to 85°C, based on the capacitance at 20°C. In addition, Table 2
In the column of capacitance temperature characteristics (ΔTC), the maximum capacity increase rate is shown in the upper row, and the maximum capacity decrease rate is shown in the lower row.

Next, the reason for limiting the numerical values of the components of the grain boundary insulated semiconductor ceramic composition according to the present invention will be explained.

When X is 0.40 or less, the dielectric constant decreases. Also, X is 0
．． When it exceeds 60, capacitance temperature characteristics deteriorate.

y+z is less than 0.0005 or y+2 is 0.
If it exceeds 0.03, it will not be possible to obtain semiconductor porcelain having the desired resistivity even if fired in a neutral or reducing atmosphere. Specifically, when used as a capacitor, 0.00
If it is less than 0.05, the dielectric constant will be small and the dielectric loss will be bad.
．． If it exceeds 03, the insulation resistance will decrease. In this example, a metal oxide was used as a raw material, but the same effect can be obtained even if a metal compound or an elemental metal other than an oxide is used as a raw material.

When α is less than i, ooi, the maximum crystal grain size exceeds 50 μm. If the maximum crystal grain size exceeds 50 μm, problems occur in the stability and reliability of insulation resistance when the thickness of the sample is reduced to about 200 μm. Also, α is 1.010
If it exceeds , the crystal grain size becomes small and a sufficient dielectric constant cannot be obtained.

Sin, and Aj! By containing at least one type of zoz, the firing temperature can be lowered, the dielectric breakdown voltage can be increased, and the stability of the molar ratio of the main components can be increased. When it exceeds 1% by weight, the dielectric constant decreases.

Patent applicant Murata Manufacturing Co., Ltd. Agent: Patent Attorney Oka 1) Zenhiro

Claims (2)

[Claims] (1) The principal component is (Sr_1_−_x_−_yBa_xM
_y) (Ti_1_-_zM'_z)_αO_3 (M is at least one type selected from rare earth elements, M' is at least one type selected from Nb, Ta, and W, provided that M, M' x, y+z, and α are 0.40<x≦0.60, 0.0005≦y+z≦0.03, and 1.001≦α, respectively. ≦1.010, the grain boundaries are made into an insulator by an oxide of Mn and at least one oxide selected from Bi, Pb, B, and Si, and the maximum grain size is within the range of A grain boundary insulated semiconductor ceramic composition in which the particle diameter is 50 μm or less. (2) The grain boundary according to claim 1, wherein 0 to 0.1% by weight of at least one of SiO_2 or Al_2O_3 is added as a subcomponent to 99.9 to 100% by weight of the main component. Insulated semiconductor porcelain composition.