JPH01172897A - Matrix type display device - Google Patents

Abstract

PURPOSE:To increase the display capacity by a simple circuit constitution by bringing alternately odd and even display lines of a display panel to refresh driving at every one screen. CONSTITUTION:The device is provided with a means 2 for detecting the switching of a display screen, a means 3 for selecting the data of only the odd data or the even data among the display data of one screen, and a driving means 4 for driving successively one piece each of odd scanning electrodes or even scanning electrode of the display panel in accordance with the odd display data or the even display data is selected. In this state,odd and even display lines of a display panel 1 are brought alternately to refresh driving at every one screen. That is, only the odd data or only the even data of the display data of every one screen inputted from a CRT interface is selected, and also, in accordance therewith, a control for driving successively only the odd one and only the even one of the scanning electrodes of a matrix display panel is executed. In such a way, a display of a large display capacity can be realized by the CRT interface.

Description

[Detailed Description of the Invention] [Summary] Regarding a display device using a matrix type display panel such as a liquid crystal panel, it is possible to realize a flat display with a large display capacity using a CRT interface by simply adding a simple circuit configuration. With the aim of
Display data for one screen from the outside from the top to the bottom of the screen
In a device that sequentially receives display lines of a book and drives the display, the device includes means for detecting switching of display screens, means for selecting only odd-numbered data or only even-numbered data from among the display data of one screen, and drive means for sequentially driving odd-numbered scan electrodes or even-numbered scan electrodes of the display panel one by one in response to odd-numbered display data or even-numbered display data;
For each screen, odd and even display lines of the display panel are alternately driven to refresh.

[Industrial application field]

The present invention relates to a display device using a matrix type display panel such as a liquid crystal panel.

Such matrix type display panels are used as flat displays for office automation equipment, computer terminals, etc., taking advantage of their thinness and compactness. Currently, the mainstream display capacity for this type of display is approximately 640 x 400 pixels (cells), but in the future it will be even larger than 1024 x 1024.
A large capacity device such as 768 cells is required.

[Conventional technology]

By the way, as the display capacity of many of these flat displays increases, so-called CRT interfaces are adopted so that they can be used with the same input signals as conventional CRTs. Upon receiving this signal, many flat displays are driven using a driving method called "refresh." This receives the display data for one screen from the outside one by one in the horizontal direction from the top of the screen, writes the horizontal electrodes of the matrix display panel in order from the top, and writes this data one by one in the horizontal direction from the top of the screen.
By repeating this 60 times per second, flicker-free display is achieved.

[Problem that the invention seeks to solve]

However, in this conventional driving method, as the number of display electrodes (the number of display lines) increases, the time during which the l electrode can be driven becomes shorter.
) is incorporated as a switching element for pixel drive (active matrix liquid crystal display device (TPT-LCD))
In this case, there is a problem that charging and discharging to sufficiently turn on and off the liquid crystal cell cannot be performed during this time. In short, there has been a problem in that it is difficult to realize a display with a large display capacity using a CRT interface.

Therefore, it is an object of the present invention to make it possible to realize a flat display using a matrix type display panel with a large display capacity using a CRT interface by simply adding a simple circuit configuration.

[Means for solving problems]

In order to achieve the above object, the present invention has a matrix type display panel 1 in which a plurality of data electrodes and a plurality of scan electrodes are arranged orthogonally, as shown in the configuration diagram for explaining the principle in FIG. means 2 for detecting a switching of the display screen in a device for driving the display by sequentially receiving display data for each display line from the top to the bottom of the screen;
Means 3 for selecting only odd-numbered data or only even-numbered data among the display data of one screen; and means 3 for selecting only odd-numbered or even-numbered data of the display data of one screen, and odd-numbered scanning electrodes or A driving means 4 is provided for sequentially driving an even number of scanning electrodes one by one.
A configuration is adopted in which odd-numbered and even-numbered display lines of the display panel are alternately refreshed for each screen.

[Effect]

In addition to selecting only odd-numbered or even-numbered display data for each screen input from the CRT interface, correspondingly select only odd-numbered or even-numbered display data of the scanning electrodes of the matrix display panel. If control is performed to sequentially drive only the electrodes, the driveable time per electrode will be doubled, so a display with a large display capacity can be realized using a CRT interface.

〔Example〕

Hereinafter, an active matrix liquid crystal display device (TPT-LCD) to which the present invention is applied will be explained with reference to the drawings.

FIG. 2 shows a circuit block of this embodiment. In this figure, the liquid crystal display panel 1 has a screen configuration of, for example, 1024×768 cells, so there are 1024 data electrodes in the horizontal direction and 768 scanning electrodes in the vertical direction. are arranged respectively, and a thin film transistor (TPT) is connected to a liquid crystal cell defined by each intersection of these electrodes. The scanning electrodes are divided into odd-numbered and even-numbered sets, with the terminal group of odd-numbered electrodes being led out to the left side of the panel, and the terminal group of even-numbered electrodes being led out to the right side of the panel.

A data driver 40 is connected to the data electrode of this liquid crystal panel 1.
, individual scan drivers 41 and 42 are connected to the odd and even scan electrodes, respectively.

The odd and even scanning drivers 41 and 42 constitute the aforementioned odd-even line driving means 4, and take in the signal 5-DATA for scanning the odd and even lines for each screen. Consists of shift registers, etc.

Further, the data driver 40 is composed of a shift register and a temporary storage latch circuit, etc., which sequentially takes in display data of odd lines or even lines one line at a time for each frame. Configure.

In addition, this display unit has a CRT interface, and externally receives a vertical synchronization signal VS that indicates the division of each screen.
YNC, horizontal synchronization signal H5YN indicating the break for each scan
C, display data signal DATA and data clock D
- Receive CLK. The above-mentioned screen switching detection means 2, however, uses the inverters 21 and 2 connected as shown in the figure.
2 flip-flop circuits (hereinafter referred to as FF circuits)
2.23 and an AND gate 24. The odd-even line data selection means 3 includes the data driver 40, two OFF circuits 30, 31, five AND gates 32 to 36, two inverters 37, 38, and 1.
It is composed of two or gates 39.

In FIG. 2, vCC is an operating power supply, C is a capacitor, and R is a resistance.

Next, an example of display driving of the TPT-LCD configured as described above will be explained with reference to the signal waveforms shown in FIG.

The vertical synchronization signal VSYNC and the horizontal synchronization signal HSYNC input from the outside are input to the FF circuit 30 and the FF circuit, respectively.
It enters circuit 31, where it is divided into 172 and becomes 1/2vSC.
and 1/2) ISC signals are generated. The output (1/2) of this FF circuit 31 (including the ISO signal) is input to two AND gates 35 and 36 gate-controlled by the AND signal (output of the AND gate 32) of the resynchronization signal, respectively, It is divided into an odd data selection signal HSCOD and an even data selection signal HSCEV. These data selection signals are input to two AND gates 33 and 34 whose gates are alternately opened by the output of the FF circuit 30 (including the 1/2vSC signal). Therefore, the AND gates 33 and 34 alternately output the odd data selection signal HSCOD and the even data selection signal H3CEV for each frame.

These data selection signals are input to the OR gate 39,
The OR output D-LATC)I is input to the latch control terminal (LATCH) of the data driver 41. Furthermore, a display data signal DATA and a data clock D-CLK input from the outside are input to a data input terminal (DATA) and a clock terminal (CLK) of a shift register in this data driver 40. Therefore, from this data driver, the display data D of the set of odd lines or the set of even lines is sent for each frame by the signal D-LATCH.
-OUT is sequentially output to the data electrode group of the liquid crystal panel 1 line by line. Note that the display data signal DAT in FIG.
A, numbers 1 to 1 on each waveform of display data D-OUT
8 indicates a display line number of the liquid crystal panel 1.

On the other hand, each reset terminal (R5T) of the FF circuits 22 and 23
A vertical synchronizing signal VSYNC is applied via an inverter 51 to the vertical synchronizing signal VSYNC.

A horizontal synchronization signal HSYNC is input to the clock terminal (T). One output of the FF circuit 22 and the other output of the FF circuit 23 are inputted to the AND gate 24, and from the AND gate, the first cycle of IsYNc (after the high state of VSYNC ends) is inputted to the AND gate 24. A signal indicating (a signal indicating screen switching) S-DATA is output.

This signal 5-DATA is input as a scanning signal to the shift register data input terminals of the scanning drivers 41 and 42 for odd numbers and even numbers, respectively.

The clock terminals (CLK
) are the outputs (1/2
HSC) is input, thereby causing the signal 5-DA to
TA is shifted in the shift register by one bit for every two lines of input display data. At this time, the above-mentioned FF is connected to the enable terminal (EB) of these scan drivers.
Since the output of the circuit 30 (1/2 VS and its polarity inverted signal (output of the inverter 38) are input separately, the scan driver 4 for odd numbers is used in frames displaying odd data.
1. In a frame displaying even number data, scan pulses are sequentially output from only the even number scan driver 42 to the scan electrodes from the top of the screen of the liquid crystal panel 1 downward.

In the display data thus input through the CRT interface, only odd or even data is sequentially displayed line by line on the screen of the liquid crystal panel 1 for each frame. In short, each screen has an odd number of LCD panels,
Even numbered display lines are refreshed alternately. Therefore, in the case of this liquid crystal panel, the number of display lines is slightly less than twice that of the current general-purpose liquid crystal panel (640 x 400 pixels),
The driving time per line is about the same or longer, and there is no problem in charging and discharging the liquid crystal cell for turning it on and off.

In addition, in the above embodiment, in order to simplify the explanation, the data clock D-CLK was obtained from an external source.
- In boat fishing, a PLL is often used to generate a vertical synchronization signal VSYNC and a horizontal synchronization signal H3YNC, and it is also highly versatile.

〔Effect of the invention〕

As described above, according to the present invention, a flat display having a CRT-compatible interface and a large display capacity can be realized by adding a simple circuit.

[Brief explanation of the drawing]

FIG. 1 is a block diagram illustrating the principle of a matrix type display device according to the present invention, FIG. 2 is a block diagram of an active matrix type liquid crystal display device to which the present invention is applied, and FIG. 3 is a block diagram of the structure shown in FIG. FIG. 3 is a diagram showing signal waveforms of each circuit. In each time, 1 is a matrix type display panel, 2 is a screen switching detection means, 3 is an odd-even line data selection means, 4 is an odd-even line driving means, 21, 37, 38 and 51 are inverters, 22 .23
．． 30 and 31 are flip-flop circuits, 24, 32
~36 is an AND gate, 39 is an OR gate, 40 is a data driver, 41 and 42 are scan drivers for odd numbers and even numbers, VS
YNC is a vertical synchronization signal, 5YNC is a horizontal synchronization signal, DATA is a display data signal, D-CLK is a data clock, and D-OllT is display data. , 1-Sumi J Tsuki no Mari! Snake the other day nbu Ch4 figure 1

Claims (1)

[Claims] A matrix type display panel (1) in which a plurality of data electrodes and scanning electrodes are arranged orthogonally, respectively, is configured such that one screen of display data is transmitted from the outside along one display line from the top to the bottom of the screen. means (2) for detecting switching of display screens; means (3) for selecting only odd-numbered data or only even-numbered data from one screen of display data; Driving means (4) is provided for sequentially driving the odd-numbered scan electrodes or the even-numbered scan electrodes of the display panel one by one in response to selected odd-numbered display data or even-numbered display data, and one screen. 1. A matrix display device characterized in that odd-numbered and even-numbered display lines of the display panel are refresh-driven alternately.