JPH01167731U - - Google Patents
Info
- Publication number
- JPH01167731U JPH01167731U JP6426888U JP6426888U JPH01167731U JP H01167731 U JPH01167731 U JP H01167731U JP 6426888 U JP6426888 U JP 6426888U JP 6426888 U JP6426888 U JP 6426888U JP H01167731 U JPH01167731 U JP H01167731U
- Authority
- JP
- Japan
- Prior art keywords
- output
- controlled oscillator
- voltage
- frequency
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6426888U JPH075703Y2 (ja) | 1988-05-16 | 1988-05-16 | 信号発生回路 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6426888U JPH075703Y2 (ja) | 1988-05-16 | 1988-05-16 | 信号発生回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH01167731U true JPH01167731U (el) | 1989-11-27 |
JPH075703Y2 JPH075703Y2 (ja) | 1995-02-08 |
Family
ID=31289742
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6426888U Expired - Lifetime JPH075703Y2 (ja) | 1988-05-16 | 1988-05-16 | 信号発生回路 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH075703Y2 (el) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02226913A (ja) * | 1989-02-28 | 1990-09-10 | Fujitsu Ltd | ディジタルミキサを含むpllのデッドロック現象防止回路 |
JP2006174303A (ja) * | 2004-12-17 | 2006-06-29 | Seiko Npc Corp | 周波数シンセサイザ及びその基準信号位相設定方法 |
-
1988
- 1988-05-16 JP JP6426888U patent/JPH075703Y2/ja not_active Expired - Lifetime
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02226913A (ja) * | 1989-02-28 | 1990-09-10 | Fujitsu Ltd | ディジタルミキサを含むpllのデッドロック現象防止回路 |
JP2006174303A (ja) * | 2004-12-17 | 2006-06-29 | Seiko Npc Corp | 周波数シンセサイザ及びその基準信号位相設定方法 |
JP4593261B2 (ja) * | 2004-12-17 | 2010-12-08 | セイコーNpc株式会社 | 周波数シンセサイザ及びその基準信号位相設定方法 |
Also Published As
Publication number | Publication date |
---|---|
JPH075703Y2 (ja) | 1995-02-08 |
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