JPH01167055U - - Google Patents
Info
- Publication number
- JPH01167055U JPH01167055U JP1988064570U JP6457088U JPH01167055U JP H01167055 U JPH01167055 U JP H01167055U JP 1988064570 U JP1988064570 U JP 1988064570U JP 6457088 U JP6457088 U JP 6457088U JP H01167055 U JPH01167055 U JP H01167055U
- Authority
- JP
- Japan
- Prior art keywords
- board
- adhesive
- adhered
- water
- chip component
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Die Bonding (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988064570U JPH01167055U (enExample) | 1988-05-16 | 1988-05-16 | |
| US07/895,260 US5253010A (en) | 1988-05-13 | 1992-06-08 | Printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988064570U JPH01167055U (enExample) | 1988-05-16 | 1988-05-16 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01167055U true JPH01167055U (enExample) | 1989-11-22 |
Family
ID=31290036
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1988064570U Pending JPH01167055U (enExample) | 1988-05-13 | 1988-05-16 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01167055U (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2024132736A (ja) * | 2023-03-17 | 2024-10-01 | 株式会社東芝 | 半導体装置 |
-
1988
- 1988-05-16 JP JP1988064570U patent/JPH01167055U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2024132736A (ja) * | 2023-03-17 | 2024-10-01 | 株式会社東芝 | 半導体装置 |
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