JPH01165247U - - Google Patents
Info
- Publication number
- JPH01165247U JPH01165247U JP1988061387U JP6138788U JPH01165247U JP H01165247 U JPH01165247 U JP H01165247U JP 1988061387 U JP1988061387 U JP 1988061387U JP 6138788 U JP6138788 U JP 6138788U JP H01165247 U JPH01165247 U JP H01165247U
- Authority
- JP
- Japan
- Prior art keywords
- chip
- printing elements
- connection pad
- insulating substrate
- measurement
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 claims description 4
- 238000005259 measurement Methods 0.000 claims 3
- 238000007651 thermal printing Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 1
Classifications
- 
        - H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
 
- 
        - H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
 
- 
        - H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/494—Connecting portions
- H01L2224/4943—Connecting portions the connecting portions being staggered
- H01L2224/49433—Connecting portions the connecting portions being staggered outside the semiconductor or solid-state body
 
Landscapes
- Electronic Switches (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title | 
|---|---|---|---|
| JP1988061387U JPH0711984Y2 (ja) | 1988-05-10 | 1988-05-10 | 印字ヘッド | 
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title | 
|---|---|---|---|
| JP1988061387U JPH0711984Y2 (ja) | 1988-05-10 | 1988-05-10 | 印字ヘッド | 
Publications (2)
| Publication Number | Publication Date | 
|---|---|
| JPH01165247U true JPH01165247U (cs) | 1989-11-17 | 
| JPH0711984Y2 JPH0711984Y2 (ja) | 1995-03-22 | 
Family
ID=31287059
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date | 
|---|---|---|---|
| JP1988061387U Expired - Lifetime JPH0711984Y2 (ja) | 1988-05-10 | 1988-05-10 | 印字ヘッド | 
Country Status (1)
| Country | Link | 
|---|---|
| JP (1) | JPH0711984Y2 (cs) | 
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title | 
|---|---|---|---|---|
| JPH048556A (ja) * | 1990-04-26 | 1992-01-13 | Matsushita Electric Ind Co Ltd | サーマルヘッドおよびその抵抗値トリミング法 | 
| JP2001301219A (ja) * | 2000-04-19 | 2001-10-30 | Rohm Co Ltd | サーマルプリントヘッド | 
- 
        1988
        - 1988-05-10 JP JP1988061387U patent/JPH0711984Y2/ja not_active Expired - Lifetime
 
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title | 
|---|---|---|---|---|
| JPH048556A (ja) * | 1990-04-26 | 1992-01-13 | Matsushita Electric Ind Co Ltd | サーマルヘッドおよびその抵抗値トリミング法 | 
| JP2001301219A (ja) * | 2000-04-19 | 2001-10-30 | Rohm Co Ltd | サーマルプリントヘッド | 
Also Published As
| Publication number | Publication date | 
|---|---|
| JPH0711984Y2 (ja) | 1995-03-22 | 
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