JPH01155630A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH01155630A
JPH01155630A JP31399587A JP31399587A JPH01155630A JP H01155630 A JPH01155630 A JP H01155630A JP 31399587 A JP31399587 A JP 31399587A JP 31399587 A JP31399587 A JP 31399587A JP H01155630 A JPH01155630 A JP H01155630A
Authority
JP
Japan
Prior art keywords
silicon substrate
plasma
gan
ecr
temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP31399587A
Other languages
Japanese (ja)
Inventor
Masahiko Toki
雅彦 土岐
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP31399587A priority Critical patent/JPH01155630A/en
Publication of JPH01155630A publication Critical patent/JPH01155630A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To form a large GaN film of quality on a silicon substrate at low temperature by vapor phase epitaxy with H2+N2 in an ECR plasma producing chamber and TEG or TMG in a plasma reaction chamber. CONSTITUTION:The surface of (111)4 deg. off or (100)4 deg. off silicon substrate is cleaned up with H2 gas at 800 deg.C using an electron cyclotron resonance(ECR) plasma vapor depositing device. Next, while keeping the temperature of the silicon substrate at 400-500 deg.C, a spontaneous oxide film on the silicon substrate is removed by H2ECR plasma and then H2+N2 is led in the ECR plasma producing chamber 11 at the same temperature while triethylgallium(TEG) or trimethylgallium(TMG) is led in a plasma reaction chamber 12 to epitaxially deposit gallium nitride(GaN) on the silicon substrate. Through these procedures, GaN is vapor-deposited on the silicon substrate at low temperature to form an excellent GaN film in large space.

Description

【発明の詳細な説明】 〔概要〕 400〜500℃の低温でガリウム・ナイトライド(G
aN)をシリコン基板上にエピタキシャル成長する方法
に関し、 シリコン基板(シリコンウェハ)上にGaNを低温で気
相成長し、大面積の良質なGaN膜を形成する方法を提
供することを目的とし、電子サイクロトロン共鳴(EC
R)プラズマ気相成長装置を用い、(111) 4 ’
オフまたは(100) 4 ’オフシリコン基板の表面
を800℃にてHzガスでクリーニングし、次いでシリ
コン基板温度を400〜500℃に保ち、82ECRプ
ラズマでシリコン基板上の自然酸化膜を除去し、同じ温
度で、H2+N2をECRプラズマ生成室、トリエチル
ガリウム(TEG)またはトリメチルガリウム(TMG
)をプラズマ反応室に導入してシリコン基板上にガリウ
ム・ナイトライド(GaN)をエピタキシャル成長する
ことを特徴とする半導体装置の製造方法を含み構成する
[Detailed description of the invention] [Summary] Gallium nitride (G
Regarding a method for epitaxially growing GaN on a silicon substrate (silicon wafer), the purpose of this study is to provide a method for forming a large-area, high-quality GaN film on a silicon substrate (silicon wafer) by vapor phase growth at low temperatures. Resonance (EC
R) Using a plasma vapor phase epitaxy device, (111) 4'
Clean the surface of the silicon substrate with Hz gas at 800°C, then keep the silicon substrate temperature at 400-500°C, remove the native oxide film on the silicon substrate with 82ECR plasma, and clean the surface of the silicon substrate with Hz gas at 800°C. Temperature H2+N2 in an ECR plasma generation chamber, triethyl gallium (TEG) or trimethyl gallium (TMG)
) is introduced into a plasma reaction chamber to epitaxially grow gallium nitride (GaN) on a silicon substrate.

〔産業上の利用分野〕[Industrial application field]

本発明は、400〜500℃の低温でガリウム・ナイト
ライド(GaN)をシリコン基板上にエピタキシャル成
長する方法に関する。
The present invention relates to a method for epitaxially growing gallium nitride (GaN) on a silicon substrate at a low temperature of 400-500°C.

〔従来の技術〕[Conventional technology]

従来、緑色〜青色の発光ダイオードは、サファイア基板
上に可視光に対するバンドギャップ(EG)の大なるG
aNを液相成長することによって形成されてきた。Ga
Nは490nmの青色に最大の強度をもち、青色LED
として幅広い用途の拡大が期待されているが、気相成長
しようとすると、1000℃以上の高温が必要であり、
シリコンの融点は1360℃であるから、シリコン基板
上にGaNをすることは試みられなかった。
Conventionally, green to blue light emitting diodes have been produced using a sapphire substrate with a large bandgap (EG) for visible light.
It has been formed by liquid phase growth of aN. Ga
N has maximum intensity in the blue wavelength of 490 nm, and blue LED
However, vapor phase growth requires high temperatures of over 1000°C.
Since the melting point of silicon is 1360° C., no attempt has been made to deposit GaN on a silicon substrate.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

前述したように、GaNは1000℃以上の温度でしか
エピタキシャル層を得ることができず、それが可能とし
ても、基板とエピタキシャル層の熱膨張係数の差により
、大面積で良質のGaNエピタキシャル層を形成するこ
とができないので、サファイア上にGaNを成長してい
る現状であるが、安価に入手可能な4インチ(約10c
m)径のシリコン基板上にGaNを気相成長することの
できる技術が期待されている。
As mentioned above, an epitaxial layer of GaN can only be obtained at a temperature of 1000°C or higher, and even if it were possible, it would be difficult to obtain a high-quality GaN epitaxial layer over a large area due to the difference in thermal expansion coefficient between the substrate and the epitaxial layer. Currently, GaN is grown on sapphire because GaN cannot be formed on sapphire.
There are expectations for a technology that can vapor phase grow GaN on a silicon substrate with a diameter of m).

そこで本発明は、シリコン基板(シリコンウェハ)上に
GaNを低温で気相成長し、大面積の良質なGaN膜を
形成する方法を提供することを目的とする。
Therefore, an object of the present invention is to provide a method for forming a large-area, high-quality GaN film by vapor-phase growing GaN on a silicon substrate (silicon wafer) at a low temperature.

〔問題点を解決するだめの手段〕[Failure to solve the problem]

上記問題点は、電子サイクロトロン共鳴(ECR)プラ
ズマ気相成長装置を用い、(111) 4°オフまたは
(100) 4 ’オフシリコン基板の表面を800℃
にてN2ガスでクリーニングし、次いでシリコン基板温
度を400〜500℃に保ち、H2ECRプラズマでシ
リコン基板上の自然酸化膜を除去し、同じ温度で、H,
+NZをECRプラズマ生成室、トリエチルガリウム(
TEG)またはトリメチルガリウム(TMG)をプラズ
マ反応室に導入してシリコン基板上にガリウム・ナイト
ライド(GaN)をエピタキシャル成長することを特徴
とする半導体装置の製造方決によって解決される。
The above problem can be solved by using an electron cyclotron resonance (ECR) plasma vapor phase epitaxy apparatus to grow the surface of a (111) 4° off or (100) 4' off silicon substrate at 800°C.
After cleaning with N2 gas at the same temperature, the silicon substrate temperature was maintained at 400 to 500°C, the natural oxide film on the silicon substrate was removed using H2ECR plasma, and at the same temperature, H,
+NZ to ECR plasma generation chamber, triethyl gallium (
The problem is solved by a semiconductor device manufacturing method characterized in that gallium nitride (GaN) is epitaxially grown on a silicon substrate by introducing TEG or trimethyl gallium (TMG) into a plasma reaction chamber.

〔作用〕[Effect]

本発明においては、プロセス温度の低温化とGaNエピ
タキシャル層の良質化を達成するために、次の手段を採
用した。
In the present invention, the following measures were adopted in order to lower the process temperature and improve the quality of the GaN epitaxial layer.

発散磁場型ECR(電子サイクロトロン共鳴)プラズマ
気相成長(CDV)法を用いて、結晶格子の不整合(m
is−match)を防ぐためシリコン(111) 4
゜オフ(OFF) 基板上にGaNを成長する。
The crystal lattice mismatch (m
Silicon (111) 4 to prevent is-match)
°OFF GaN is grown on the substrate.

成長時の基板温度は400〜500℃とし、成長のため
のソースガスとしてトリエチルガリウム(TEG)また
はトリメチルガリウム(TMG)とN2を用いる。
The substrate temperature during growth is 400 to 500° C., and triethyl gallium (TEG) or trimethyl gallium (TMG) and N 2 are used as source gases for growth.

プラズマ生成室にN2ガスを導入し、ECRプラズマN
2を生成し、反応室にTEGまたはTMGをN2または
Heのキャリアを用いバブリングして導入する。
Introducing N2 gas into the plasma generation chamber, ECR plasma N
2 is generated, and TEG or TMG is introduced into the reaction chamber by bubbling with a carrier of N2 or He.

〔実施例] 以下、本発明を図示の実施例により具体的に説明する。〔Example] Hereinafter, the present invention will be specifically explained with reference to illustrated embodiments.

本発明の方法を実施する発散磁場型ECR−CVD装置
は、第1図に示される如く、プラズマ生成室11および
プラズマ反応室12から構成されている。マイクロ波発
振器13が発生された周波数2.45GHzのマイクロ
波を矩形導波管14よりECRプラズマ生成室11に導
入する。プラズマ生成室110周りには磁気コイル15
を配置し、プラズマ生成室11内でECR条件を満たす
ようにしている。また、排気構成はプラズマ生成室11
およびプラズマ反応室12をターボ分子複合ポンプ(T
、M、 P) 16 (排気量:18001 /5ec
) 、メカニカルブースターポンプ(M、B。
A divergent magnetic field type ECR-CVD apparatus for carrying out the method of the present invention is comprised of a plasma generation chamber 11 and a plasma reaction chamber 12, as shown in FIG. A microwave with a frequency of 2.45 GHz generated by a microwave oscillator 13 is introduced into the ECR plasma generation chamber 11 through a rectangular waveguide 14 . A magnetic coil 15 is installed around the plasma generation chamber 110.
are arranged to satisfy ECR conditions within the plasma generation chamber 11. In addition, the exhaust configuration is the plasma generation chamber 11
and plasma reaction chamber 12 with a turbomolecular compound pump (T
, M, P) 16 (displacement: 18001 /5ec
), mechanical booster pump (M, B.

p、)17(ルーツポンプ)でそれぞれ排気するシステ
ムとなっている。なお第1図において、18はプラズマ
シャッタ、19は試料、20はヒータ、21はロークリ
ポンプ(R,P、)、22はマツチング・ボックスを示
す。
p, ) 17 (roots pump) is used to exhaust the air. In FIG. 1, 18 is a plasma shutter, 19 is a sample, 20 is a heater, 21 is a rotary pump (R, P,), and 22 is a matching box.

プロセスシーケンスは第2図の線図に示され、同図で横
軸に反応時間を分(min)で、縦軸に温度を〔℃〕で
とる。成長に用いる基板(第1図の試料19)は、シリ
コン(111) 4 @OFFか(100) 4 @O
FFの基板を用い、結晶格子の不整合が発生しないよう
にする。ウェット処理でシリコン基板表面の自然酸化膜
を除去し、次いで、基板温度を800℃に昇温してN2
ガスでシリコン基板表面をクリーニングする(10〜2
0m1n)。
The process sequence is shown in the diagram of FIG. 2, in which the horizontal axis shows the reaction time in minutes (min) and the vertical axis shows the temperature in [° C.]. The substrate used for growth (sample 19 in Figure 1) is either silicon (111) 4 @OFF or (100) 4 @O
A FF substrate is used to avoid crystal lattice mismatch. The natural oxide film on the silicon substrate surface is removed by wet processing, and then the substrate temperature is raised to 800°C and N2
Clean the silicon substrate surface with gas (10-2
0m1n).

次に、H2ECRプラズマを照射しく1〜2m1n)、
次いでプラズマ反応室12内にHeまたはN2をキャリ
アとしたTEMまたはTMGを導入する。シリコン基板
はMO上ヒータ真空封じ込め輻射加熱型)のもので40
0〜500 ”Cに加熱する。なお、この400〜50
0℃の温度範囲は実験により最適と確認されたものであ
る。反応時間は成長するGaN膜に対応して決定する。
Next, irradiate H2ECR plasma (1-2 m1n),
Next, a TEM or TMG using He or N2 as a carrier is introduced into the plasma reaction chamber 12. The silicon substrate is of the MO heater vacuum confinement radiation heating type) and is 40
Heat to 0~500''C.
The temperature range of 0° C. was confirmed to be optimal through experiments. The reaction time is determined depending on the GaN film to be grown.

上記の如くに成膜したGaNのホトルミネセンスに関す
るデータは第3図の線図に示すとおりである。同図にお
いては、N2レーザ(337nm)を用いたときの本発
明にかかるGaNの発光強度を任意単位(A、U、)で
示すが、横軸にエネルギーを(eV)でとっである。同
図から理解される如く、本発明のGaN膜はエネルギー
3.5eVの近くで最大の発光強度を示した。
Data regarding the photoluminescence of the GaN film formed as described above is as shown in the diagram of FIG. In the figure, the emission intensity of GaN according to the present invention when using a N2 laser (337 nm) is shown in arbitrary units (A, U,), and the horizontal axis shows energy in (eV). As understood from the figure, the GaN film of the present invention exhibited maximum emission intensity near an energy of 3.5 eV.

GaNは本来N型導電形をとるので、P型にすることが
できない。かくして、MIS構造にすることにより、駆
動電圧が7〜8■と他のLEDよりも高(なる。しかし
、人間の視感が高い緑色〜青色領域にも伸びているので
、眼には明るく惑しられる。
Since GaN originally has an N-type conductivity type, it cannot be made into a P-type conductivity type. In this way, by using the MIS structure, the driving voltage is 7 to 8 cm, which is higher than other LEDs. Known.

〔発明の効果〕〔Effect of the invention〕

以上のように本発明によれば、400〜500″Cの低
温で、大面積(直径10cm )のシリコン基板上にG
aNを成膜することができ、従来シリコン基板上に形成
することができなかった青色発光ダイオードとして実用
化することができるようになった。
As described above, according to the present invention, G
It has become possible to form aN film and to put it into practical use as a blue light emitting diode, which could not be formed on a silicon substrate in the past.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明方法の実施に用いる発散磁場型ECRプ
ラズマ装置の概略図、 第2図は本発明のプロセスシーケンスの線図、第3図は
本発明にがかるGaNの発光強度を示φに す図である。 へ 第1図において、 11はプラズマ生成室、 12はプラズマ反応室、 13はマイクロ波発振器、 14は矩形導波管、 15は磁気コイル、 16はT、M、P、、 17は!1.B、P、、 18はプラズマシャッタ、 19は試料、 20はヒータ、 21はR,P、、 22はマツチング・ボックス を示す。 第1図
Fig. 1 is a schematic diagram of a divergent magnetic field type ECR plasma device used to carry out the method of the present invention, Fig. 2 is a diagram of the process sequence of the present invention, and Fig. 3 shows the emission intensity of GaN according to the present invention. This is a diagram. In Fig. 1, 11 is a plasma generation chamber, 12 is a plasma reaction chamber, 13 is a microwave oscillator, 14 is a rectangular waveguide, 15 is a magnetic coil, 16 is T, M, P, and 17 is! 1. B, P, 18 is a plasma shutter, 19 is a sample, 20 is a heater, 21 is R, P, 22 is a matching box. Figure 1

Claims (1)

【特許請求の範囲】  電子サイクロトロン共鳴(ECR)プラズマ気相成長
装置を用い、 (111)4゜オフまたは(100)4゜オフシリコン
基板(19)の表面を800℃にてH_2ガスでクリー
ニングし、 次いでシリコン基板温度を400〜500℃に保ち、H
_2ECRプラズマでシリコン基板上の自然酸化膜を除
去し、同じ温度で、H_2+N_2をECRプラズマ生
成室、トリエチルガリウム(TEG)またはトリメチル
ガリウム(TMG)をプラズマ反応室(12)に導入し
てシリコン基板上にガリウム・ナイトライド(GaN)
をエピタキシャル成長することを特徴とする半導体装置
の製造方法。
[Claims] Using an electron cyclotron resonance (ECR) plasma vapor phase growth apparatus, the surface of a (111) 4° off or (100) 4° off silicon substrate (19) is cleaned with H_2 gas at 800°C. , Next, the silicon substrate temperature was kept at 400 to 500°C, and H
_2 The natural oxide film on the silicon substrate is removed using ECR plasma, and at the same temperature, H_2 + N_2 is introduced into the ECR plasma generation chamber and triethyl gallium (TEG) or trimethyl gallium (TMG) is introduced into the plasma reaction chamber (12) to form a layer on the silicon substrate. Gallium nitride (GaN)
A method for manufacturing a semiconductor device, comprising epitaxially growing a semiconductor device.
JP31399587A 1987-12-14 1987-12-14 Manufacture of semiconductor device Pending JPH01155630A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP31399587A JPH01155630A (en) 1987-12-14 1987-12-14 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31399587A JPH01155630A (en) 1987-12-14 1987-12-14 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH01155630A true JPH01155630A (en) 1989-06-19

Family

ID=18047958

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31399587A Pending JPH01155630A (en) 1987-12-14 1987-12-14 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH01155630A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6362494B1 (en) * 1998-04-24 2002-03-26 Fuji Xerox Co., Ltd. Semiconductor device and method and apparatus for manufacturing semiconductor device
KR100381742B1 (en) * 1999-06-30 2003-04-26 스미토모덴키고교가부시키가이샤 Growing method of III-V group nitride semiconductor and vapor phase growing apparatus
US7825432B2 (en) 2007-03-09 2010-11-02 Cree, Inc. Nitride semiconductor structures with interlayer structures
CN102632055A (en) * 2012-03-31 2012-08-15 江苏鑫和泰光电科技有限公司 Method for cleaning sapphire substrate
US8362503B2 (en) 2007-03-09 2013-01-29 Cree, Inc. Thick nitride semiconductor structures with interlayer structures

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6362494B1 (en) * 1998-04-24 2002-03-26 Fuji Xerox Co., Ltd. Semiconductor device and method and apparatus for manufacturing semiconductor device
US6562702B2 (en) 1998-04-24 2003-05-13 Fuji Xerox Co., Ltd. Semiconductor device and method and apparatus for manufacturing semiconductor device
KR100381742B1 (en) * 1999-06-30 2003-04-26 스미토모덴키고교가부시키가이샤 Growing method of III-V group nitride semiconductor and vapor phase growing apparatus
US7825432B2 (en) 2007-03-09 2010-11-02 Cree, Inc. Nitride semiconductor structures with interlayer structures
US8324005B2 (en) 2007-03-09 2012-12-04 Cree, Inc. Methods of fabricating nitride semiconductor structures with interlayer structures
US8362503B2 (en) 2007-03-09 2013-01-29 Cree, Inc. Thick nitride semiconductor structures with interlayer structures
US9054017B2 (en) 2007-03-09 2015-06-09 Cree, Inc. Thick nitride semiconductor structures with interlayer structures and methods of fabricating thick nitride semiconductor structures
CN102632055A (en) * 2012-03-31 2012-08-15 江苏鑫和泰光电科技有限公司 Method for cleaning sapphire substrate

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