JPH01149462A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent short-circuiting between an impurity region near a semiconductor substrate surface and the semiconductor substrate by a method wherein a first and second wiring layers are brought into contact with said impurity region in one and the same contact hole. CONSTITUTION:Ion implantation or diffusion of such an N-type dopant as P<+>, As<+>, Sb<+>, or the like or such a P-type dopant as B+ or the like is applied to a P-type or N-type substrate 1 for the formation of a high-concentration impurity region 5, with a first wiring layer 4 and an element isolating region 2 patterned on a first insulating film 8. A second insulating film 6 is formed on the first insulating film 8 and on the first wiring layer 4. The second insulating film 6 is then removed by selective etching, which results in a contact hole section 10. A process follows wherein a second wiring layer 7 is formed, to contact the high-concentration impurity region 5 and the first wiring layer 4 in the contact hole 10 and to extend over the second wiring layer 7. Etching is accomplished for the selective removal of the second wiring layer 7, after which the entire surface is covered by an insulating film for the completion of a device of this design.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a semiconductor device.

[Summary of the invention]

According to the present invention, the second wiring layer of the semiconductor device is formed so as to be in contact with a part of the terminal part of the first wiring layer and a part of the surface part of the semiconductor substrate within the contact hole part. To enable contact between a wiring layer and an impurity region near the surface of a semiconductor substrate in the same contact hole, and to form a low concentration impurity region around a high concentration impurity region in an active region near the surface of the semiconductor substrate of a semiconductor device. This prevents short circuits between the impurity region and the semiconductor substrate.

[Conventional technology]

Conventionally, when forming a contact between an impurity region 9 formed in an active region near the surface of a semiconductor substrate and a first wiring layer 4, as shown in FIG. A contact is formed with the second wiring layer 7, and the second wiring layer N
A contact between the second wiring layer 7 and the impurity region 9 in the surface area of the semiconductor substrate is formed in the active region through the conductive layer 7 to connect the first wiring layer 4 and the impurity region 9 in the active region near the surface of the semiconductor substrate. Was. Further, the impurity region of the active region was formed with a single concentration.

[Problem that the invention seeks to solve]

However, in the conventional technology, when forming a contact between the first wiring layer and the impurity region near the surface of the semiconductor substrate, at least two or more contacts are required, which poses a problem in terms of miniaturization. . Further, in the conventional technology, there is a possibility of short-circuiting between the semiconductor substrate and a high concentration impurity region formed in the active region near the surface of the semiconductor substrate.

[Means for solving problems]

In order to solve the above-mentioned problems, in the present invention, the second wiring layer of the semiconductor device is connected to a part of the terminal part of the first wiring layer and a part of the impurity region added on the surface of the semiconductor substrate within the same contact hole part. Further, a low concentration impurity region was formed around the high concentration impurity region in the active region near the surface of the semiconductor substrate of the semiconductor device.

[Effect]

In the semiconductor device formed as described above, contact can be made between the first wiring layer, the second wiring layer, and the impurity region near the surface of the semiconductor substrate within the same contact hole, and furthermore, the contact between the impurity region near the surface of the semiconductor substrate and the semiconductor substrate can be made. can prevent short circuits.

〔Example〕

Embodiments of the present invention will be described based on the drawings. 1 to 4 show the manufacturing process of one embodiment of an MO3 type semiconductor device. In the process shown in FIG. 1, P-type or N-type semiconductor substrate is
", As", n-type dopant such as Sb+ or B+
A low concentration impurity region 3 is formed by ion implantation and diffusion of an n-type dopant such as. Next, as shown in FIG. 2, using the first wiring layer 4 and element isolation region 2 patterned on the first insulating film 8 as masks, As'', A high concentration impurity region 5 is formed by ion implantation and diffusion of an n-type dopant such as Sb'' or an n-type dopant such as B''.

Here, to give an example of the process, when forming an n-type impurity region, the dopant used in the step shown in FIG. 1 is P, which has a high diffusion rate, and the dopant used in the process shown in FIG. There is also a method of forming the low-concentration impurity region in the process shown in FIG. In the process shown in the figure, a second bag edge film 6 is formed on the first insulating film 8 and the first wiring N4, and then the second insulating film 6 is selectively etched away to form a contact hole portion 10. do.

Next, in a step shown in FIG. 4, a second wiring layer 7 is formed which contacts the high concentration impurity region 5 and the first wiring layer 4 in the contact hole portion 10 and extends over the second insulating film. After this, although not shown, the second wiring layer 7 is selectively etched away and the entire surface is covered with an insulating film to complete the process.

〔Effect of the invention〕

As is clear from the above description, in a semiconductor device, the present invention forms a contact between a first wiring layer and an impurity region near the surface of a semiconductor substrate with one contact, and further forms a contact between a first wiring layer and an impurity region near the surface of a semiconductor substrate, and Since the low-concentration impurity region is formed, the area required for the contact of the semiconductor device is small (and it also has the effect of preventing short-circuits between the impurity region of the active region and the semiconductor substrate. Therefore,
The present invention facilitates miniaturization of semiconductor devices.

[Brief explanation of the drawing]

1 to 4 are cross-sectional views showing the order of manufacturing steps of the semiconductor device of the present invention, in which FIG. 1 is a process diagram for forming a low concentration impurity region, FIG. 2 is a process diagram for forming a high concentration impurity region, and FIG. 3 is a process diagram for forming a contact hole portion, and FIG. 4 is a process diagram for forming a second wiring layer. Further, FIG. 5 is a sectional view of a conventional semiconductor device. 1... Semiconductor substrate 2... Element isolation region 3... Low concentration impurity region 4... First wiring layer 5... High concentration impurity region 6... Second insulating film 7... 2 Wiring layer 8...First insulating film 9...Impurity region 10...Contact hole portion Above Applicant: Seiko Electronics Co., Ltd. 1 Mr. Iya Impurity tilting formation process High 5th grade farmhouse 1,000 IT area type process and home side map Figure 2 Con77 TO\-R area type group process and Akane side map 3

Claims (1)

[Claims] an element isolation region for isolating an active region near the surface of the semiconductor substrate; a low concentration impurity region formed near the surface of the semiconductor substrate using the element isolation region as a mask; a first insulating film covering the surface of the semiconductor substrate; a first wiring layer formed on the first insulating film by selective patterning; a high concentration impurity region formed near the surface of the semiconductor substrate using the element isolation region and the first wiring layer as a mask; a second insulating film formed on the first wiring layer and the first wiring layer for interlayer insulation;
A contact hole portion is formed in the insulating film in the same active region so that a portion of the terminal portion of the surface of the first wiring layer and a portion of the surface of the high concentration impurity region are exposed; A semiconductor device comprising a contact region made of a second wiring layer that is in contact with a portion of the exposed first wiring layer and the high concentration impurity region and extends over the second insulating film.