JPH01146375A - Method of evaluating semiconductor photodetector - Google Patents

Method of evaluating semiconductor photodetector

Info

Publication number
JPH01146375A
JPH01146375A JP62306609A JP30660987A JPH01146375A JP H01146375 A JPH01146375 A JP H01146375A JP 62306609 A JP62306609 A JP 62306609A JP 30660987 A JP30660987 A JP 30660987A JP H01146375 A JPH01146375 A JP H01146375A
Authority
JP
Japan
Prior art keywords
linearity
capacitance
bias voltage
photodetector
dependency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62306609A
Other languages
Japanese (ja)
Other versions
JP2596023B2 (en
Inventor
Shuzo Kagawa
修三 香川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62306609A priority Critical patent/JP2596023B2/en
Publication of JPH01146375A publication Critical patent/JPH01146375A/en
Application granted granted Critical
Publication of JP2596023B2 publication Critical patent/JP2596023B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To evaluate linearity of output characteristics of a semiconductor photodetector in the form of a wafer or chip for decreasing manufacturing cost, by obtaining output characteristics of photoelectric current in relation to intensity of incident light to the photodetector from dependency of capacitance on bias voltages and dependency of series resistance on bias voltages and then evaluating linearity thereof. CONSTITUTION:Output characteristics of photoelectric current in relation to intensity of incident light to a semiconductor photodetector are obtained from dependency of capacitance on bias voltage and dependency of series resistance on bias voltage, and linearity of the output characteristics of the semiconductor photodetector thus obtained is evaluated. More particularly, a prober 26 is brought into contact with a p-electrode of one chip in a wafer 21, and a bias voltage is applied between the prober 26 and a substrate stage 22, so that dependency of capacitance on the bias voltage is measured by adding signal current modulated at a frequency of 1MHz and an amplitude voltage of 10mV. The dependency thus obtained is processed by a computer 24 and recorded in a plotter 25. A photodetector presenting little capacitance at a reverse voltage of 1V is found to have good linearity. A photodetector presenting large capacitance is found to have poor linearity.

Description

【発明の詳細な説明】 〔概 要〕 半導体受光素子の出力特性の評価方法に関し、ウェハー
またはチップの状態で出力特性のりニアリテイを評価し
て、製造コストを低減させることを目的とし、 半導体受光素子の入射光強度に対する光電流の出力特性
を、キャパシタンスのバイアス電圧依存性、または、シ
リーズ抵抗のバイアス電圧依存性から求めて、前記半導
体受光素子の出力特性の直線性を評価するようにしたこ
とを特徴とする。
[Detailed Description of the Invention] [Summary] Regarding a method for evaluating the output characteristics of a semiconductor photodetector, the purpose is to evaluate the linearity of the output characteristics in a wafer or chip state and reduce manufacturing costs. The linearity of the output characteristic of the semiconductor photodetector is evaluated by determining the output characteristic of the photocurrent with respect to the incident light intensity from the bias voltage dependence of the capacitance or the bias voltage dependence of the series resistance. Features.

〔産業上の利用分野〕[Industrial application field]

本発明は半導体受光素子の出力特性の評価方法に関する
The present invention relates to a method for evaluating the output characteristics of a semiconductor light receiving element.

最近、光フアイバ通信が実用化され、その光フアイバ通
信に用いられる半導体受光素子(フォトダイオード)の
−層の品質向上・コストダウンが期待されている。
Recently, optical fiber communication has been put into practical use, and it is expected to improve the quality and reduce the cost of the -layer of semiconductor light-receiving elements (photodiodes) used in optical fiber communication.

〔従来の技術〕[Conventional technology]

シリコン、ゲルマニウムや化合物半導体等からなる多数
の半導体受光素子(フォトダイオード)が使用されてお
り、例えば、1.3μm帯の光波長に対して受光効率の
良い半導体受光素子としてInGaAs系受光素子が知
られている。第4図はそのPTN形InGaAs受光素
子の断面図を示し、図中のlはn−InP基板、2はn
−InPバッファ層、3はn −1nGaAs光吸収層
、4はn−1nPキ’Faツブ層。
Many semiconductor light-receiving elements (photodiodes) made of silicon, germanium, compound semiconductors, etc. are used, and for example, an InGaAs-based light-receiving element is known as a semiconductor light-receiving element with high light reception efficiency for light wavelengths in the 1.3 μm band. It is being FIG. 4 shows a cross-sectional view of the PTN type InGaAs photodetector, where l in the figure is an n-InP substrate and 2 is an n-InP substrate.
-InP buffer layer, 3 is n-1nGaAs light absorption layer, 4 is n-1nP chip Fa layer.

5はp−受光領域、6はp−電極、7はn−電極で、電
極間に逆バイアス電圧を印加してp−受光層5に光が入
射すると、n −rnGaAs光吸収層3中に電子と正
孔が励起されてpn接合部に光電流が流れ、その出力が
検出される構造である。
5 is a p-light receiving region, 6 is a p-electrode, and 7 is an n-electrode. When a reverse bias voltage is applied between the electrodes and light is incident on the p-light receiving layer 5, light is generated in the n-rnGaAs light absorption layer 3. This structure is such that electrons and holes are excited, a photocurrent flows through the pn junction, and its output is detected.

さて、上記のような受光素子の重要な特性の一つに、入
射した光強度の強弱に応じて比例した光電流の出力が得
られるかどうかの光出力の直線性(リニアリティ; 1
inearity)がある。第5図はそ、の従来のりニ
アリティの測定方法を示す図で、図中の11は受光素子
、12は温度制御器、13は発光素子、14はアッテネ
ータ、15は光ファイバ、16は出力計である。例えば
、受光素子が低温度で使用される場合を想定して、温度
制御器12の温度を一40℃に設定し、発光素子13か
らの光をアッテネータ14を介して光ファイバ15を通
して受光素子11に光を入射させる。そうすると、発光
素子13からの光エネルギーに対する受光素子11の電
流出力が得られる。なお、一般に、電流出力は光電流と
バイアス電圧の積として電力で表わされる。
Now, one of the important characteristics of the above-mentioned light receiving element is the linearity of the optical output (linearity; 1
There is a FIG. 5 is a diagram showing the conventional linearity measurement method. In the figure, 11 is a light receiving element, 12 is a temperature controller, 13 is a light emitting element, 14 is an attenuator, 15 is an optical fiber, and 16 is an output meter. It is. For example, assuming that the light receiving element is used at a low temperature, the temperature of the temperature controller 12 is set to -40°C, and the light from the light emitting element 13 is passed through the attenuator 14 and the optical fiber 15 to the light receiving element 11. Let light enter. Then, the current output of the light receiving element 11 with respect to the light energy from the light emitting element 13 can be obtained. Note that current output is generally expressed in power as the product of photocurrent and bias voltage.

このような発光素子13の光エネルギーをアッテネータ
14で切り換えて受光素子11に入射する光量を変化さ
せ、入射光パワー(ワット)に対する受光素子11の電
流出力(ワット)をプロットした出力特性を第6図に示
している。この第6図において、入射光パワーに比例し
て電流出力が増加する場合に、リニアりティが良いと云
うことになり、実線で示す曲線Iはリニアリティの良い
受光素子(良品)、点線で示す曲線■は低い入射光パワ
ーで直線性が崩れているからりニアリテイの悪い受光素
子(不良品)である。なお、従来、第6図に示すような
曲線を検出するのは工数がかかるため、通常、曲線上の
定めた3点を測定する方式が採られている。且つ、受光
素子11の温度によってもリニアりティは変化し、高温
になるほどリニアリティが良くなるために、温度制御器
12に受光素子11を収納しているわ・けである。
The light energy of the light emitting element 13 is switched by the attenuator 14 to change the amount of light incident on the light receiving element 11, and the output characteristics obtained by plotting the current output (watts) of the light receiving element 11 against the incident light power (watts) are shown in the sixth graph. Shown in the figure. In Fig. 6, when the current output increases in proportion to the incident light power, it is said that the linearity is good, and the curve I shown by the solid line indicates a light receiving element (good product) with good linearity, and the dotted line shows it. The curve ■ is a light-receiving element (defective product) with poor linearity due to low incident light power. It should be noted that conventionally, since it takes a lot of man-hours to detect a curve as shown in FIG. 6, a method of measuring three predetermined points on the curve is usually adopted. In addition, the linearity also changes depending on the temperature of the light receiving element 11, and the higher the temperature, the better the linearity becomes, which is why the light receiving element 11 is housed in the temperature controller 12.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

ところで、第4図に示した従来の測定方法は被測定用の
受光素子11がパッケージに組み込んだ完成品であるか
ら、リニアリティを測定して不良品であると、組立完成
品を廃棄することになり、そうすると組立工数が無駄に
なり、それだけ製造コストがアップすることになる。
By the way, in the conventional measurement method shown in FIG. 4, the light-receiving element 11 to be measured is a completed product assembled into a package, so if the linearity is measured and the product is found to be defective, the assembled completed product must be discarded. If this happens, assembly man-hours will be wasted, and manufacturing costs will increase accordingly.

従って、本発明はこのような問題点を解消させ、ウェハ
ーまたはチップの状態でリニアりティを評価して、製造
コストを低下させることを目的とした評価方法を提案す
るものである。
Therefore, the present invention proposes an evaluation method aimed at solving these problems, evaluating linearity in a wafer or chip state, and reducing manufacturing costs.

〔問題点を解決するための手段〕[Means for solving problems]

その目的は、半導体受光素子の入射光強度に対する光電
流の出力特性を、キャパシタンスのバイアス電圧依存性
、または、シリーズ抵抗のバイアス電圧依存性から求め
て、前記半導体受光素子の出力特性の直線性を評価する
ようにした半導体受光素子の評価方法によって達成され
る。
The purpose is to obtain the output characteristics of the photocurrent with respect to the incident light intensity of the semiconductor photodetector from the bias voltage dependence of the capacitance or the bias voltage dependence of the series resistance, and to evaluate the linearity of the output characteristics of the semiconductor photodetector. This is achieved by the method for evaluating semiconductor light receiving elements.

〔作 用〕[For production]

即ち、本発明は、キャパシタンスとバイアス電圧の関係
、または、シリーズ抵抗とバイアス電圧の関係を測定し
て、半導体受光素子の出力特性のりニャリテイ(直線性
)を評価する。半導体受光素子のキャパシタンスやシリ
ーズ抵抗はへテロバリヤにおける空乏層の拡がりに関わ
りがあり、それは出力特性の直線性(リニアリティ)に
も関係すると推考し、これらの検出により出力特性の直
線性を評価するものである。
That is, in the present invention, the relationship between capacitance and bias voltage or the relationship between series resistance and bias voltage is measured to evaluate the output characteristic linearity of a semiconductor light receiving element. The capacitance and series resistance of the semiconductor photodetector are related to the expansion of the depletion layer in the heterobarrier, and it is assumed that this is also related to the linearity of the output characteristics, and the linearity of the output characteristics is evaluated by detecting these. It is.

〔実施例〕〔Example〕

以下、図面を参照して実施例によって詳細に説明する。 Hereinafter, embodiments will be described in detail with reference to the drawings.

第1図は本発明にかかるキャパシタンスのバイアス電圧
依存性、または、シリーズ抵抗のバイアス電圧依存性の
測定方法を示す図で、21はウニA−122は基板ステ
ージ、23はLCRメータ、24はコンピュータ、25
はブロックである。そうして、ウェハー25内の1つの
チップ(素子)のp −電Wにプローバ26を接触させ
、そのプローバ26と基板ステージ22(ウェハー裏面
のn−電極に接触している)との間にバイアス電圧を印
加する。
FIG. 1 is a diagram showing a method for measuring the bias voltage dependence of capacitance or the bias voltage dependence of series resistance according to the present invention, in which 21 is a UUNI A-122 substrate stage, 23 is an LCR meter, and 24 is a computer. , 25
is a block. Then, the prober 26 is brought into contact with the p-electrode W of one chip (element) within the wafer 25, and between the prober 26 and the substrate stage 22 (which is in contact with the n-electrode on the back surface of the wafer). Apply bias voltage.

そうして、周波数IMH2,振幅電圧10mVにて変調
した信号電流を加えて測定したキャパシタンスのバイア
ス電圧依存性をコンピュータ24で処理してプロッタ2
5に記録する。第2図(a)、 (b)はそのキャパシ
タンスのバイアス電圧依存性の測定結果を例示しており
、第2図(a)はリニアリティの悪い受光素子、第2図
(b)はリニアリティの良い受光素子の例である。第2
図より、逆バイアス電圧1vにおけるキャパシタンス(
PF)の値を列記すると、第2図(a)におけるリニア
リティの悪い受光素子のキャパシタンスは 101.89PF、 105.06PF、 118.?
!6PF、 115.09PF。
Then, the bias voltage dependence of the capacitance measured by adding a signal current modulated at a frequency IMH2 and an amplitude voltage of 10 mV is processed by the computer 24, and the plotter 2
Record in 5. Figures 2(a) and 2(b) illustrate the measurement results of the bias voltage dependence of the capacitance. Figure 2(a) shows a photodetector with poor linearity, and Figure 2(b) shows a photodetector with good linearity. This is an example of a light receiving element. Second
From the figure, the capacitance (
PF), the capacitance of the light receiving element with poor linearity in FIG. 2(a) is 101.89PF, 105.06PF, 118. ?
! 6PF, 115.09PF.

97.78PF になり、一方の第2図(blにおけるリニアリティの良
い受光素子のキャパシタンスは 42.15PF、 44.12PF、 41.74PF
、 44.62PF、 44.66PFとなっている。
The capacitance of the photodetector with good linearity in Fig. 2 (bl) is 42.15PF, 44.12PF, 41.74PF.
, 44.62PF, 44.66PF.

従って、上記の実施例では、1■の逆バイアス電圧にお
けるキャパシタンスを検出すれば、キャパシタンスの小
さい受光素子がリニアリティが良く、キャパシタンスの
大きい受光素子がリニアリティが悪くて、出力特性のり
ニアりティ (直線性)を評価することが可能である。
Therefore, in the above example, if the capacitance at a reverse bias voltage of 1■ is detected, the light receiving element with small capacitance has good linearity, the light receiving element with large capacitance has poor linearity, and the output characteristic has linearity (linearity). It is possible to evaluate the

なお、このリニアリティの良・不良は上記の測定後、組
立完成品について従来の測定方法によって検出したもの
である。
Note that whether the linearity is good or bad is detected by a conventional measuring method on the assembled finished product after the above-mentioned measurement.

次に、同様の測定条件によって測定したシリーズ抵抗の
バイアス電圧依存性を説明すると、第3図(a)、 (
b)はそのシリーズ抵抗のバイアス電圧依存性の測定結
果を示しており、第3図(a)はリニアリティの良い受
光素子、第3図(b)はリニアリティの悪い受光素子の
例である。第3図より、その順バイアス電圧(V)にお
けるシリーズ抵抗(Ω)の値を表記すると、リニアリテ
ィの良い受光素子の場合は 一方、リニアリティの悪い受光素子の場合はとなって、
明らかに有意差が見られ、シリーズ抵抗の大きい受光素
子はリニアりティが悪く、シリーズ抵抗の小さい受光素
子はリニアりティが良い結果となっている。
Next, to explain the bias voltage dependence of series resistance measured under similar measurement conditions, Figure 3 (a), (
3(b) shows the measurement results of the bias voltage dependence of the series resistance, FIG. 3(a) shows an example of a light receiving element with good linearity, and FIG. 3(b) shows an example of a light receiving element with poor linearity. From Fig. 3, the value of the series resistance (Ω) at the forward bias voltage (V) is expressed as , for a photodetector with good linearity, and , for a photodetector with poor linearity.
There is clearly a significant difference, with light receiving elements with large series resistance having poor linearity, and light receiving elements having low series resistance having good linearity.

従って、本発明によれば温度制御器を用いずに常温にお
いて、ウェハーの状態で出力特性のリニアリティを評価
することができ、そうすれば、リニアりティの不良品を
組み立てることなく、リニアリティの良品のみ完成品に
組み立てて、製造コストを低下させることができる。
Therefore, according to the present invention, it is possible to evaluate the linearity of output characteristics in the state of a wafer at room temperature without using a temperature controller. It can only be assembled into a finished product, reducing manufacturing costs.

なお、上記はウェハーの状態で評価する実施例であるが
、チップに切断した後でも同様に評価できることは云う
までもない。
Note that although the above is an example in which evaluation is performed in the state of a wafer, it goes without saying that evaluation can be performed in the same manner even after cutting into chips.

〔発明の効果〕〔Effect of the invention〕

以上の説明から明らかなように、本発明によれば出力特
性のリニアりティをウェハーまたはチップの状態で評価
でき、製造コストの低減に顕著な効果があるものである
As is clear from the above description, according to the present invention, the linearity of output characteristics can be evaluated in the state of a wafer or chip, which has a significant effect on reducing manufacturing costs.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明にかかる測定方法を示す図、第2 図(
al、 (blはキャパシタンスのバイアス電圧依存性
を示す図、 第3図(al、 (blはシリーズ抵抗のバイアス電圧
依存性を示す図、 第4図はInGaAs受光素子の断面図、第5図は従来
の測定方法を示す図、 第6図は受光素子の出力特性を示す図である。 図において、 21はウェハー、 22は基板ステージ、 23はLCRメータ、 24はコンピュータ、 25はプロッタ、 26はプローバ を示している。 バ°イ了スに氏 (v) へイ了スを斤(V) シリースオ医才九めノぐイ了スIIIFイ昏dう、at
t:rz図第3図 1nGαハ5fjl克I J /1111 +’m V
IJ第4図 を東ヒたJヒ、、;ξす足方任9よ)fじり第5図
Figure 1 is a diagram showing the measurement method according to the present invention, Figure 2 (
al, (bl is a diagram showing the bias voltage dependence of capacitance, Figure 3 (al, (bl is a diagram showing the bias voltage dependency of series resistance), Figure 4 is a cross-sectional view of an InGaAs photodetector, and Figure 5 is Figure 6 is a diagram showing the conventional measurement method, and Figure 6 is a diagram showing the output characteristics of the light receiving element. In the figure, 21 is a wafer, 22 is a substrate stage, 23 is an LCR meter, 24 is a computer, 25 is a plotter, and 26 is a Showing the prober.
t: rz diagram Figure 3 1nGαc5fjlK I J /1111 +'m V
IJ figure 4 is shown in the image 5.

Claims (1)

【特許請求の範囲】[Claims]  半導体受光素子の入射光強度に対する光電流の出力特
性を、キャパシタンスのバイアス電圧依存性、または、
シリーズ抵抗のバイアス電圧依存性から求めて、前記半
導体受光素子の出力特性の直線性を評価するようにした
ことを特徴とする半導体受光素子の評価方法。
The output characteristics of the photocurrent with respect to the incident light intensity of the semiconductor photodetector are expressed as the bias voltage dependence of the capacitance, or
A method for evaluating a semiconductor light-receiving device, characterized in that the linearity of the output characteristic of the semiconductor light-receiving device is evaluated based on the bias voltage dependence of the series resistance.
JP62306609A 1987-12-02 1987-12-02 Evaluation method of semiconductor photo detector Expired - Lifetime JP2596023B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62306609A JP2596023B2 (en) 1987-12-02 1987-12-02 Evaluation method of semiconductor photo detector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62306609A JP2596023B2 (en) 1987-12-02 1987-12-02 Evaluation method of semiconductor photo detector

Publications (2)

Publication Number Publication Date
JPH01146375A true JPH01146375A (en) 1989-06-08
JP2596023B2 JP2596023B2 (en) 1997-04-02

Family

ID=17959136

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62306609A Expired - Lifetime JP2596023B2 (en) 1987-12-02 1987-12-02 Evaluation method of semiconductor photo detector

Country Status (1)

Country Link
JP (1) JP2596023B2 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50126182A (en) * 1974-03-22 1975-10-03
JPS5459890A (en) * 1977-10-20 1979-05-14 Nec Corp Discriminating method of spectral sensitivity characteristics of photo diodes
JPS5754379A (en) * 1980-09-19 1982-03-31 Toshiba Corp Selecting method for light-emitting element

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50126182A (en) * 1974-03-22 1975-10-03
JPS5459890A (en) * 1977-10-20 1979-05-14 Nec Corp Discriminating method of spectral sensitivity characteristics of photo diodes
JPS5754379A (en) * 1980-09-19 1982-03-31 Toshiba Corp Selecting method for light-emitting element

Also Published As

Publication number Publication date
JP2596023B2 (en) 1997-04-02

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