JP2672887B2 - Photodetector with built-in circuit - Google Patents

Description

The present invention relates to a light receiving element with a built-in circuit, and more particularly to a light receiving element with a built-in circuit provided with a test device for removing an abnormal characteristic product.

<Conventional Technology> A conventional technology will be described with reference to FIG. Third
FIG. 1 is a sectional view of a conventional light receiving element with a built-in circuit.

In the figure, a photodiode A which is a light receiving element and a signal processing circuit element such as an NPN transistor B are formed on one semiconductor substrate 1. The photodiode A includes an N-type buried diffusion layer 2 embedded in a P-type semiconductor substrate 1, an N-type epitaxial layer 3 grown thereon, and a P on the surface thereof.
The diffusion layer 4 (anode of the photodiode), the collector compensation diffusion layer 5 (cathode of the photodiode), and the like. On the other hand, the NPN transistor B includes an N-type buried diffusion layer 6 embedded in a P-type semiconductor substrate 1, an N-type epitaxial layer 7 grown on the N-type diffusion layer 6, and a P on the surface thereof.
It is composed of a type diffusion layer 8 (base), an N type diffusion layer 9 (emitter) and a collector compensation diffusion layer 10 therein.
Between the photodiode section A and the signal processing circuit element such as the NPN transistor B, element isolation P-type diffusion layers 11, 11 are provided.
Separated by ...

In the photodiode A and the NPN transistor B portion, the epitaxial layers 4 and 7, the P type diffusion layers 4 (anode) and 8 (base), and the collector compensation diffusion layers 5 and 10 are used.
Are formed at the same time.

<Problems to be Solved by the Invention> By the way, in the photodetector with a built-in circuit as shown in FIG. 3, there are important characteristics such as photosensitivity and response speed. In that case, the abnormal product must be removed. Conventionally, since it is difficult to measure these characteristics in a wafer state, a test in a final product state after assembly (hereinafter referred to as a final test) is usually performed. However, the final test has a problem that the cost is higher than the measurement in the wafer state (hereinafter referred to as the wafer test).

Therefore, it is an object of the present invention to remove, in a wafer test, defective photosensitivity products and abnormal response speed products of circuit-embedded light receiving elements.

<Means for Solving the Problems> In order to achieve the above object, the present invention is to grow a second conductivity type epitaxial layer on a first conductivity type semiconductor substrate, and to receive a light receiving element in the second conductivity type epitaxial layer. In a light receiving element with a built-in circuit in which a signal processing circuit is formed, a part of the light receiving element with a circuit has a first conductivity type semiconductor layer formed on a surface of the second conductivity type epitaxial layer,
By applying a reverse bias between any one of the first conductivity type semiconductor layer and the first conductivity type semiconductor substrate and the second conductivity type epitaxial layer, the first conductivity type semiconductor layer and the first conductivity type are provided. It is characterized in that a test device unit for measuring punch-through breakdown voltage between semiconductor substrates is provided.

The test device unit is electrically separated in the device by a first conductivity type separation diffusion layer that reaches the first conductivity type semiconductor substrate from the surface of the second conductivity type epitaxial layer, and the second conductivity type epitaxial layer is formed. A second conductivity type diffusion layer is formed on a surface of the layer where the first conductivity type semiconductor layer is not formed, and the second conductivity type diffusion layer and the first conductivity type separation diffusion layer are electrically connected. The connection portion is a reverse bias application portion for the first conductivity type semiconductor layer.

<Operation> A test device for measuring punch-through breakdown voltage between the first-conductivity-type semiconductor layer formed on the surface of the second-conductivity-type epitaxial layer and the first-conductivity-type semiconductor substrate is provided in part of the light-receiving element with a built-in circuit. ing. Here, the punch-through breakdown voltage is obtained by increasing the reverse bias voltage value applied between one of the first conductive type semiconductor layer and the first conductive type semiconductor substrate and the second conductive type epitaxial layer.
This punch-through breakdown voltage is measured because the depletion layer that gradually extends from any one of the junction surfaces into the second-conductivity-type epitaxial layer is the applied voltage value when it reaches the first-conductivity-type semiconductor layer or the first-conductivity-type semiconductor substrate. By doing so, the layer thickness of the second conductivity type epitaxial layer can be indirectly measured.

Therefore, the thickness of the second conductivity type epitaxial layer, that is, the characteristics of the light receiving element with a built-in circuit can be tested in a wafer state, so that the cost can be significantly reduced compared to the conventional final test.

Further, the second conductivity type diffusion layer formed on the surface of the second conductivity type epitaxial layer and the first conductivity type dispersion diffusion layer are electrically connected, and the connection portion is a reverse bias applying portion for the first conductivity type semiconductor layer. Thus, the reverse bias is applied between the first conductive type semiconductor layer and the second conductive type epitaxial layer, and the reverse bias is applied between the second conductive type epitaxial layer and the first conductive type semiconductor substrate. It is possible to suppress variations in measured values to a low level as compared with the case where the voltage is applied during the period.

<Example> In the present invention, when the photosensitivity / response speed of the light receiving element with a built-in circuit is tested, instead of testing the photosensitivity / response speed in the final test as in the conventional case, the epitaxial layer thickness is tested in the wafer test. Then, the photosensitivity and response speed are tested.

Hereinafter, the equivalence between the epitaxial layer thickness test and the photosensitivity / response speed test in the wafer test will be described with reference to FIG.

First, regarding the photosensitivity, the photoabsorption layer of the photodiode A mostly includes the epitaxial layer 3, so the photosensitivity increases as the thickness of the epitaxial layer 3 increases.

Next, regarding the response speed, the response speed of the photodiode A is that the epitaxial layer 3 is completely depleted when the reverse bias voltage is applied to the photodiode A as the thickness of the epitaxial layer 3 increases. And the diffusion current component of the photocarrier increases, resulting in a slow response speed.

As for the NPN transistor B, as the thickness of the epitaxial layer 7 increases, the collector resistance increases and the response speed decreases.

As described above, in the photodetector with a built-in circuit as shown in FIG. 3, the thickness of the epitaxial layers 3 and 7 is a major factor that determines the photosensitivity and response speed, and it corresponds to the epitaxial layer thickness and is simple. It can be seen that if the amount that can be subjected to the wafer test is tested instead of the photosensitivity / response speed, the photosensitivity / response speed is equivalent to the wafer test.

Therefore, in the present invention, the photosensitivity / response speed is tested in the wafer test as described above by providing a test device for equivalently testing the photosensitivity / response speed of each IC chip in the wafer. I am trying.

FIGS. 2 (a) and 2 (b) are enlarged views of a wafer and an IC chip in the wafer for producing a light receiving element with a built-in circuit according to an embodiment of the present invention, respectively.

In FIG. 2A, 12 is a scribe line, and 13 is an IC chip of a light receiving element with a built-in circuit divided by the scribe line 12.

Further, in FIG. 2B, 14 is a photodiode, 15 is a block of NPN transistors and resistors, and 16 is the above-mentioned test device. As shown in the figure, each IC chip 13 is provided with a test device 16.

Next, the test device 16 will be specifically described with reference to FIGS. 1 (a) and 1 (b). 1A and 1B are a cross-sectional view and a plan view of a test device according to this example, respectively.

In the figure, an N type epitaxial layer 7 is stacked on a P type semiconductor substrate 1, and a P type diffusion layer 8 is formed on the surface of the N type epitaxial layer 7. Here, the thickness of the N-type epitaxial layer 7 is the same as the epitaxial layer of the light receiving element with a built-in circuit whose optical sensitivity and response speed are to be tested. (Also, since this test device 16 has the same structure as a substrate PNP transistor normally used in a bipolar IC, it is hereinafter referred to as a substrate PNP transistor 16.) 9 is formed on the surface of the N-type epitaxial layer 7.
It is an N ⁺ type diffusion layer and is connected to the P type dispersion diffusion layer 11.

By the way, there is an inherent correlation between the punch-through breakdown voltage between the P-type diffusion layer 8 of the substrate PNP transistor 16 and the P-type semiconductor substrate 1 and the thickness of the N-type epitaxial layer 7. That is, the punch-through breakdown voltage is a breakdown voltage between the P-type diffusion layer 8 and the P-type semiconductor substrate 1, and more specifically, one of the P-type diffusion layer 8 and the P-type semiconductor substrate 1 and the second conductivity type epitaxial layer 7 is used. By increasing the reverse bias voltage value applied between the depletion layer and the P-type diffusion layer 8 or the P-type semiconductor substrate 1, the depletion layer gradually spreading from the junction surface into the N-type epitaxial layer 7 is reached. The applied voltage value at that time.

Therefore, for example, the thicker the N-type epitaxial layer 7 is, the longer the distance the depletion layer reaches the P-type diffusion layer 8 or the P-type semiconductor substrate 1. That is, the punch-through breakdown voltage increases. As described above, since there is a correlation between the punch-through breakdown voltage and the N-type epitaxial layer 7, it is possible to know the layer thickness of the N-type epitaxial layer 7 by measuring the punch-through breakdown voltage.

Therefore, the photosensitivity / light velocity can be indirectly tested by measuring the punch-through breakdown voltage of the test device 16 parts.

The punch-through breakdown voltage test of the substrate PNP transistor 16 will be described below. Since the impurity concentration of the P-type semiconductor substrate 1 usually has a large variation range,
When the punch-through breakdown voltage is measured by the method of applying a reverse bias between the P-type semiconductor substrate 1 and the N-type epitaxial layer 7, the measured values vary. Therefore, in this embodiment, a reverse bias is applied between the P-type diffusion layer 8 and the N-type epitaxial layer 7 to measure the punch-through breakdown voltage. In this measuring method, as shown in FIG. 1A, a negative voltage is applied to the P-type diffusion layer 8 and an N-type diffusion layer 9 connected to the P-type isolation diffusion layer 11 is used.
Apply a positive voltage to.

Since the punch-through breakdown voltage of the test device 16 as described above can be easily measured in the wafer state, it is possible to easily remove the photosensitivity / response speed abnormal product of the light receiving element with a built-in circuit in the wafer test.

In this embodiment, the photosensitivity / response speed test of the light receiving element with a built-in circuit has been described as a substitute for the test corresponding to the epitaxial layer thickness test. The thickness is
It is self-evident that the same method can be applied when there is a correlation with the characteristics that are difficult to test by wafer test.

<Effects of the Invention> As described above, according to the present invention, the first-conductivity-type semiconductor layer and the first-conductivity-type semiconductor substrate formed on the surface of the second-conductivity-type epitaxial layer are formed in part of the light-receiving element with a built-in circuit. Since a test device for measuring the punch-through withstand voltage between is provided, the photosensitivity and response speed of the photo detector with built-in circuit can be tested by the wafer test instead of the final test of the final product state as in the past. You can reduce the cost.

Further, by providing the reverse bias applying section, it is possible to obtain a measured value that does not vary regardless of the impurity concentration.

[Brief description of the drawings]

1 (a) and 1 (b) are a sectional view and a plan view of a test device according to an embodiment of the present invention, respectively. FIG. 2 (a) is a plan view of a wafer according to an embodiment of the present invention, and a second view, respectively.
2B is an enlarged plan view of one chip of the wafer shown in FIG. 2A, and FIG. 3 is a cross-sectional view of a conventional photodetector with a built-in circuit. 1 ... First conductivity type semiconductor substrate, 3 ... Second conductivity type epitaxial layer, 4 ... First conductivity type semiconductor layer, 8 ... First conductivity type semiconductor layer (test device side), 9 ... Second Conductive diffusion layer, 16 ... Test device, A ... Light receiving element, B ...
... Signal processing circuit.

Claims (2)

(57) [Claims] 1. A light receiving element with a built-in circuit, wherein a second conductive type epitaxial layer is grown on a first conductive type semiconductor substrate, and a light receiving element and a signal processing circuit are formed in the second conductive type epitaxial layer. A part of the light receiving element with a built-in circuit has a first conductivity type semiconductor layer formed on the surface of the second conductivity type epitaxial layer, and one of the first conductivity type semiconductor layer and the first conductivity type semiconductor substrate is provided. A reverse bias is applied between the first conductive type semiconductor layer and the first conductive type semiconductor substrate by applying a reverse bias between the first conductive type semiconductor layer and the second conductive type epitaxial layer. A photo detector with a built-in circuit. 2. The light-receiving element with a built-in circuit according to claim 1, wherein the test device section is formed of a first conductivity type isolation diffusion layer reaching from the surface of the second conductivity type epitaxial layer to the first conductivity type semiconductor substrate. And a second conductivity type diffusion layer is formed in a portion of the surface of the second conductivity type epitaxial layer where the first conductivity type semiconductor layer is not formed. A light receiving element with a built-in circuit, characterized in that it is electrically connected to the first conductivity type isolation diffusion layer, and the connection part serves as a reverse bias applying part to the first conductivity type semiconductor layer.