JPH01142052U - - Google Patents
Info
- Publication number
- JPH01142052U JPH01142052U JP3801288U JP3801288U JPH01142052U JP H01142052 U JPH01142052 U JP H01142052U JP 3801288 U JP3801288 U JP 3801288U JP 3801288 U JP3801288 U JP 3801288U JP H01142052 U JPH01142052 U JP H01142052U
- Authority
- JP
- Japan
- Prior art keywords
- processing unit
- central processing
- version
- register
- address
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 1
Description
第１図は、本考案の一実施例を示すブロツク図
である。第２図は、第１図の実施例の要部の動作
例を示すタイミングチヤートである。
１……ＣＰＵ、２……レジスタ、３……セレク
タ、４……バージヨンアドレス発生器、５……パ
ワーオンリセツト回路、６……表示器、１０……
ＣＰＵＲＯＭ、２０，２１，２３……データバス
、２２……レジスタ出力、２４……バージヨンア
ドレス発生器出力、２５……パワーオンリセツト
回路出力。
FIG. 1 is a block diagram showing one embodiment of the present invention. FIG. 2 is a timing chart showing an example of the operation of essential parts of the embodiment shown in FIG. 1... CPU, 2... Register, 3... Selector, 4... Version address generator, 5... Power-on reset circuit, 6... Display, 10...
CPUROM, 20, 21, 23...data bus, 22...register output, 24...version address generator output, 25...power-on reset circuit output.
Claims (1)
前記中央処理装置のプログラムデータおよび自装
置の版に関するデータが、あらかじめ格納されて
いて、出力を前記中央処理装置および前記レジス
タに与える固定記憶装置と、前記版に関するデー
タが格納されているアドレスを発生するバージヨ
ンアドレス発生器と、前記中央処理装置の出力ア
ドレスと前記バージヨンアドレス発生器の出力ア
ドレスのいづれかを選択して前記固定記憶装置に
出力するセレクタと、装置全体に電源が投入され
たとき一定時間リセツト信号を、前記中央処理装
置と前記レジスタと前記セレクタに出力するパワ
ーオンリセツト回路と、前記レジスタの出力を２
進化１０進法に変換し１０進表示する表示器を有
するＲＯＭバージヨン表示回路付きＣＰＵボード
。 A central processing unit, a register that stores input,
A fixed storage device in which program data of the central processing unit and data regarding the version of the device itself are stored in advance and provides output to the central processing unit and the register, and an address where data regarding the version is stored is generated. a version address generator that selects either the output address of the central processing unit or the output address of the version address generator and outputs it to the fixed storage device; a power-on reset circuit that outputs a reset signal to the central processing unit, the register, and the selector;
A CPU board with a ROM version display circuit that has a display that converts to an evolved decimal system and displays it in decimal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3801288U JPH01142052U (en) | 1988-03-23 | 1988-03-23 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3801288U JPH01142052U (en) | 1988-03-23 | 1988-03-23 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01142052U true JPH01142052U (en) | 1989-09-28 |
Family
ID=31264582
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3801288U Pending JPH01142052U (en) | 1988-03-23 | 1988-03-23 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01142052U (en) |
-
1988
- 1988-03-23 JP JP3801288U patent/JPH01142052U/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH01142052U (en) | ||
| JPS6439536U (en) | ||
| JPH0262480U (en) | ||
| JPS6395333U (en) | ||
| JPS62118290U (en) | ||
| JPS62169846U (en) | ||
| JPH0218149U (en) | ||
| JPH01127054U (en) | ||
| JPH039027U (en) | ||
| JPS6372648U (en) | ||
| JPS60180005U (en) | Sequence controller online monitor device | |
| JPS63183658U (en) | ||
| JPH0168508U (en) | ||
| JPH0433145U (en) | ||
| JPS6452062U (en) | ||
| JPS6133088U (en) | Character display control device | |
| JPH022730U (en) | ||
| JPS62146223U (en) | ||
| JPH01151307U (en) | ||
| JPH029837U (en) | ||
| JPS62193296U (en) | ||
| JPH0382435U (en) | ||
| JPS6098816U (en) | liquid crystal display device | |
| JPS639637U (en) | ||
| JPS64140U (en) |