JPH01139479U - - Google Patents

Info

Publication number
JPH01139479U
JPH01139479U JP3445188U JP3445188U JPH01139479U JP H01139479 U JPH01139479 U JP H01139479U JP 3445188 U JP3445188 U JP 3445188U JP 3445188 U JP3445188 U JP 3445188U JP H01139479 U JPH01139479 U JP H01139479U
Authority
JP
Japan
Prior art keywords
integrated circuit
hybrid integrated
mounting structure
substrate
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3445188U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3445188U priority Critical patent/JPH01139479U/ja
Publication of JPH01139479U publication Critical patent/JPH01139479U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Vibration Dampers (AREA)
  • Mounting Components In General For Electric Apparatus (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Mounting Of Printed Circuit Boards And The Like (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の原理を説明するための図、第
2図は本考案の実施例を示す図、第3図は本考案
の実施例の作用を説明するための図、第4図は本
考案の他の実施例を示す図、第5図は従来のハイ
ブリツド集積回路の実装構造を示す図である。 図において、1は基板、3はリード端子、5は
ハイブリツド集積回路、6はプリント配線板、7
は緩衝部材、8は受け部材、を示す。
Fig. 1 is a diagram for explaining the principle of the invention, Fig. 2 is a diagram showing an embodiment of the invention, Fig. 3 is a diagram for explaining the operation of the embodiment of the invention, and Fig. 4 is a diagram for explaining the operation of the embodiment of the invention. FIG. 5, which is a diagram showing another embodiment of the present invention, is a diagram showing a mounting structure of a conventional hybrid integrated circuit. In the figure, 1 is a board, 3 is a lead terminal, 5 is a hybrid integrated circuit, 6 is a printed wiring board, and 7
8 indicates a buffer member, and 8 indicates a receiving member.

Claims (1)

【実用新案登録請求の範囲】 基板1より垂直方向に複数のリード端子3が設
けられたハイブリツド集積回路5が、その基板1
をプリント配線板6に平行となるように実装され
るハイブリツド集積回路の実装構造において、 上記基板1の下面に断面がくさび状の板又は円
錐状のピン等よりなる緩衝部材7を設けると共に
、プリント配線板6側に前記緩衝部材7を弾性的
に挾持する受け部材8を設けて成るハイブリツド
集積回路の実装構造。
[Claims for Utility Model Registration] A hybrid integrated circuit 5 in which a plurality of lead terminals 3 are provided in a direction perpendicular to a substrate 1 is connected to the substrate 1.
In the mounting structure of a hybrid integrated circuit, which is mounted parallel to a printed wiring board 6, a buffer member 7 made of a plate with a wedge-shaped cross section or a conical pin, etc. is provided on the lower surface of the board 1, and A mounting structure for a hybrid integrated circuit comprising a receiving member 8 for elastically holding the buffer member 7 on the wiring board 6 side.
JP3445188U 1988-03-17 1988-03-17 Pending JPH01139479U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3445188U JPH01139479U (en) 1988-03-17 1988-03-17

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3445188U JPH01139479U (en) 1988-03-17 1988-03-17

Publications (1)

Publication Number Publication Date
JPH01139479U true JPH01139479U (en) 1989-09-22

Family

ID=31261159

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3445188U Pending JPH01139479U (en) 1988-03-17 1988-03-17

Country Status (1)

Country Link
JP (1) JPH01139479U (en)

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