JPH01132996U - - Google Patents
Info
- Publication number
- JPH01132996U JPH01132996U JP2626588U JP2626588U JPH01132996U JP H01132996 U JPH01132996 U JP H01132996U JP 2626588 U JP2626588 U JP 2626588U JP 2626588 U JP2626588 U JP 2626588U JP H01132996 U JPH01132996 U JP H01132996U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- alarm
- output
- outputs
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 3
- 230000004913 activation Effects 0.000 claims 6
- 238000010586 diagram Methods 0.000 description 3
- 238000005259 measurement Methods 0.000 description 1
Landscapes
- Electric Clocks (AREA)
- Electromechanical Clocks (AREA)
Description
第１図は本考案に係るアラーム時計の回路を示
すブロツク図、第２図は本考案の１実施例を示す
回路図、第３図は本考案に係るアラーム時計の１
実施例を示す外観図である。
１０…時計本体、１２…基準信号発生回路、１
８…時計回路、３０…アラーム回路、３６…アラ
ームスイツチ、３８…操作部材、４０…アラーム
制御回路、４８…スヌーズ回路、５６…スヌーズ
スイツチ、５８…ゲート回路、６２…アラーム発
音回路、６８…温度センサ、７０…温度記憶回路
、７８…比較回路、８０…基準値記憶回路、８６
…鳴り時間計測回路、９８…基準値補正回路。
Fig. 1 is a block diagram showing a circuit of an alarm clock according to the present invention, Fig. 2 is a circuit diagram showing an embodiment of the invention, and Fig. 3 is a circuit diagram showing an embodiment of the alarm clock according to the present invention.
It is an external view showing an example. 10...Watch body, 12...Reference signal generation circuit, 1
8... Clock circuit, 30... Alarm circuit, 36... Alarm switch, 38... Operating member, 40... Alarm control circuit, 48... Snooze circuit, 56... Snooze switch, 58... Gate circuit, 62... Alarm sounding circuit, 68... Temperature Sensor, 70...Temperature storage circuit, 78...Comparison circuit, 80...Reference value storage circuit, 86
...Ringing time measurement circuit, 98...Reference value correction circuit.
Claims (1)
て時刻を表示する時計回路と、 時計本体の一外装面に設けられた外部操作可能
な操作部材を有するアラームスイツチと、 該アラームスイツチから出力される操作信号が
持続したときにアラームセツト信号を出力するア
ラーム制御回路と、 前記アラームセツト信号の出力を条件とし、任
意設定時刻にアラーム作動信号を出力するアラー
ム回路と、 外部操作可能なスヌーズスイツチと、 該スヌーズスイツチからのオン信号の出力に応
答して前記アラーム作動信号の出力を一時的に遮
断するスヌーズ回路と、 アラーム作動信号が入力されるとアラーム音を
報知するアラーム発音回路と、 を有する時計において、 前記操作部材の操作面に固着される温度センサ
と、 前記アラーム制御回路からのアラームセツト信
号出力時に前記温度センサからの温度信号を記憶
する温度記憶回路と、 予め設定された基準温度信号の基準値を記憶す
る基準値記憶回路と、 前記温度信号と基準温度信号とを比較し、その
大小に対応して比較信号を出力する比較回路と、 前記比較信号の出力に対応して前記スヌーズス
イツチからのオン信号を遮断するゲート回路と、 を設けたことを特徴とするアラーム時計。 (2) 請求の範囲第１項記載のアラーム時計にお
いて、 基準値記憶回路を電源投入時に初期値を設定さ
れる加減計数回路をもつて構成し、 アラーム回路から出力されるアラーム作動信号
の出力時から最初の中断迄の時間を計測する鳴り
時間計測回路と、 該鳴り時間計測回路の計測値が予め設定した範
囲以外のときは、前記アラーム回路からアラーム
作動信号が出力されなくなつたとき、このアラー
ム作動信号の出力停止に応答して前記加減計数回
路の記憶値を補正する補正信号を出力する基準値
補正回路と、 を設けたことを特徴とするアラーム時計。[Claims for Utility Model Registration] (1) A reference signal generation circuit that outputs a reference signal, a clock circuit that measures the reference signal from the reference signal generation circuit and displays the time, and on one exterior surface of the watch body. an alarm switch having an externally operable operating member; an alarm control circuit that outputs an alarm set signal when the operating signal output from the alarm switch continues; and a condition for outputting the alarm set signal; an alarm circuit that outputs an alarm activation signal at an arbitrarily set time; an externally operable snooze switch; and a snooze circuit that temporarily blocks output of the alarm activation signal in response to an output of an on signal from the snooze switch. , an alarm sounding circuit that notifies an alarm sound when an alarm activation signal is input, and a temperature sensor fixed to the operating surface of the operating member; A temperature storage circuit that stores a temperature signal from a temperature sensor, a reference value storage circuit that stores a reference value of a preset reference temperature signal, and compares the temperature signal with the reference temperature signal and corresponds to the magnitude thereof. An alarm clock comprising: a comparison circuit that outputs a comparison signal based on the comparison signal; and a gate circuit that blocks an on signal from the snooze switch in response to the output of the comparison signal. (2) In the alarm clock according to claim 1, the reference value storage circuit is configured with an addition/subtraction counting circuit whose initial value is set when the power is turned on, and when an alarm activation signal is output from the alarm circuit. a ringing time measuring circuit that measures the time from the time to the first interruption, and when the measured value of the ringing time measuring circuit is outside a preset range, when the alarm activation signal is no longer output from the alarm circuit; An alarm clock comprising: a reference value correction circuit that outputs a correction signal for correcting the value stored in the addition/subtraction counting circuit in response to stopping the output of the alarm activation signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2626588U JPH01132996U (en) | 1988-02-29 | 1988-02-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2626588U JPH01132996U (en) | 1988-02-29 | 1988-02-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01132996U true JPH01132996U (en) | 1989-09-11 |
Family
ID=31247736
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2626588U Pending JPH01132996U (en) | 1988-02-29 | 1988-02-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01132996U (en) |
-
1988
- 1988-02-29 JP JP2626588U patent/JPH01132996U/ja active Pending
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