JPH01129910U - - Google Patents

Info

Publication number
JPH01129910U
JPH01129910U JP2297888U JP2297888U JPH01129910U JP H01129910 U JPH01129910 U JP H01129910U JP 2297888 U JP2297888 U JP 2297888U JP 2297888 U JP2297888 U JP 2297888U JP H01129910 U JPH01129910 U JP H01129910U
Authority
JP
Japan
Prior art keywords
phase
signal
multiplier
frequency modulated
modulated wave
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2297888U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP2297888U priority Critical patent/JPH01129910U/ja
Publication of JPH01129910U publication Critical patent/JPH01129910U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例における直角位相検
波回路の構成を示す回路ブロツク図、第2図は従
来の直角位相検波回路の構成を示す回路ブロツク
図、第3図は同回路の動作説明に使用する信号波
形図、第4図は乗算器の入出力特性図である。 1……振幅制限増幅器、2……移相器、3……
乗算器、4……増幅器、AS……周波数変調波信
号、BS……矩形波信号、CS……移相器の出力
信号、CS′……増幅後の移相器の出力信号、D
S……乗算器の出力信号。
FIG. 1 is a circuit block diagram showing the configuration of a quadrature phase detection circuit according to an embodiment of the present invention, FIG. 2 is a circuit block diagram showing the configuration of a conventional quadrature phase detection circuit, and FIG. 3 is an explanation of the operation of the circuit. FIG. 4 is an input/output characteristic diagram of the multiplier. 1... Amplitude limiting amplifier, 2... Phase shifter, 3...
Multiplier, 4...Amplifier, AS...Frequency modulated wave signal, BS...Square wave signal, CS...Output signal of phase shifter, CS'...Output signal of phase shifter after amplification, D
S... Multiplier output signal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 周波数変調波信号を二分して一方を移相器によ
り直角移相し、その移相出力信号と前記二分した
他方の周波数変調波信号とを乗算器で乗算するこ
とにより前記周波数変調波信号の復調信号を得る
直角位相検波回路において、前記移相器と乗算器
との間に、前記移相器からの移相出力信号の信号
レベルを所定レベルに高めて前記乗算器に供給す
る増幅器を設けたことを特徴とする直角移相検波
回路。
Demodulating the frequency modulated wave signal by dividing the frequency modulated wave signal into two, quadrature-shifting one side using a phase shifter, and multiplying the phase-shifted output signal and the other frequency modulated wave signal divided into two using a multiplier. In the quadrature phase detection circuit for obtaining a signal, an amplifier is provided between the phase shifter and the multiplier to increase the signal level of the phase-shifted output signal from the phase shifter to a predetermined level and supply it to the multiplier. A quadrature phase shift detection circuit characterized by:
JP2297888U 1988-02-25 1988-02-25 Pending JPH01129910U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2297888U JPH01129910U (en) 1988-02-25 1988-02-25

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2297888U JPH01129910U (en) 1988-02-25 1988-02-25

Publications (1)

Publication Number Publication Date
JPH01129910U true JPH01129910U (en) 1989-09-05

Family

ID=31241581

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2297888U Pending JPH01129910U (en) 1988-02-25 1988-02-25

Country Status (1)

Country Link
JP (1) JPH01129910U (en)

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