JPH01128396A - Dimmer for fluorescent lamp - Google Patents

Abstract

PURPOSE:To exceedingly enlarge the dynamic range of the dimmer by providing a monostable multivibrator and 1/2 frequency divider circuit so as to alternately distribute the output of the monostable multivibrator for driving an inverter. CONSTITUTION:A clock signal is supplied from a variable frequency oscillator 1 to a monostable multivibrator 2 and 1/2 frequency divider circuit 3. The clock signal is divided into 1/2 by the circuit 3 while the monostable multivibrator 2 is driven with the leading end of square wave of the clock signal so as to generate the pulse with time width equal to the minimum period of the generator. These signals are supplied a transistor inverter 5 through a distribution circuit 4 composed of AND gates 4a, 4b. With this arrangement, a voltage in which the polarity of the A.C. half wave is alternately reversed is supplied to a fluorescent lamp through a transformer T and the period can be shorten with the frequency increased. Therefore, it is possible to exceedingly enlarge a dynamic range without shortening the service life of the fluorescent lamp.

Description

DETAILED DESCRIPTION OF THE INVENTION "Field of Industrial Application" The present invention relates to a fluorescent lamp dimmer device used to dim a fluorescent lamp, which is a light source of a liquid crystal display device or the like.

``Prior Art'' As a fluorescent lamp dimmer of this type, the one shown in FIG. 5 has been used in the past. That is, an AC signal is supplied from an AC signal generator 1 to a dart circuit 2 (FIG. 6A), and a clock signal from a clock generator 3 is supplied to a duty ratio adjustment circuit (for example, composed of a monostable multivibrator) 4. Given (Fig. 6B), the duty ratio is the setting point of the dimming ratio P/n (here, 1/n represents the minimum dimming ratio, and 0≦
P<, n. ) and is applied to the dart circuit 2 as a control signal (FIG. 6C). The dart circuit 2 intermittents the input AC signal according to this control signal, and supplies the obtained burst signal to the output terminal 5 as a fluorescent lamp drive signal (FIG. 6D). The duty ratio D (approximately equal to the dimming ratio P/n) is D=Δ/'re
Supported by (1). Here, Δ and Tc are the on period and cycle of the control signal, respectively.

"Problems with the Prior Art" The ambient light in which liquid crystal display devices are placed has a wide dynamic range, from direct sunlight to darkness at midnight, so the brightness of the display device is generally 3000 d/m.
It is said that direct fine adjustment within the range of 2 to 0.3 cd/m2 is desirable.

Therefore, the fluorescent light dimmer used to dim the light source (fluorescent light) of this display device has a dimming ratio P/n of 1.
It is desirable to be able to set it in the range of /1000 to 1000/1000. However, even if an attempt is made to use the conventional device over such a wide dynamic range, the following disadvantages arise, making it difficult to use in practice.

In order to set the dimming ratio to the minimum (1/n), when the duty ratio is set to 1/n, and the number of cycles included in the burst signal is α, the on time Δ of the dart signal is: d=αX T (2). Here, T is the period of the alternating current signal (frequency is f), and T = 1/f. Since the duty ratio can be varied and the light can be adjusted within the range of 1/n = n/n, The period Tc of the control signal of the dart circuit 2 (equal to the period of the RACK signal) must be T0=ΔXn=αT n (3).Therefore, the frequency fc of the control signal is as follows.

In order to set the minimum dimming ratio 1/n small, the frequency fc must be made small according to equation (5), but,
To reduce the flickering of fluorescent lights, K and fc are, for example, 5.
It is impossible to reduce the frequency to about 0 Hz.

In order to light up a fluorescent lamp, it is preferable to alternately discharge between the two opposing electrodes A and B of the fluorescent lamp (from A to B, then from B to A) from the viewpoint of its lifespan. Therefore, it is desirable that the drive signal is an alternating signal and does not include a direct current component.

However, since there is no continuity between the final phase of one burst signal and the first phase of the next burst signal, a DC component may appear. For example, this is the case when the positive period of the burst signal waveform is longer than the negative period.

If the number of cycles included in the burst signal is large, even if the above DC component appears, it will be very small and will not cause a problem.However, in order to obtain a small dimming ratio, the ON period Δ of the control signal is set small, When the number of cycles is reduced to several cycles or even half a cycle, this DC component may become large, significantly shortening the life of the fluorescent lamp. Therefore, the ON period Δ of the control signal is small, and the number of cycles α of the burst signal is
It is not possible to use a signal where the period is less than a few cycles.

Also, the phase of the AC signal at the rise and fall of the burst signal is 0. It is not limited to π or its integral multiple, but is cut off in the middle of the peaks and valleys of the waveform, making it discontinuously zero. When a fluorescent lamp is driven by such a signal, the power efficiency of the fluorescent lamp dimmer generally may deteriorate if the number of cycles α included in the burst signal is small. Therefore, it is not desirable to reduce α from the viewpoint of power efficiency.

In order to reduce the DC component included in the fluorescent lamp drive signal, it is better to increase the number of cycles α included in the burst signal as much as possible, but due to the discharge time constant of the fluorescent lamp, the frequency of the AC signal is limited to about 40kHz. It is.

For the reasons stated above, α=4 in equation (5). fc≧50H
If z and f are 40kHz, the minimum dimming ratio is 1/n, which is far from the target of 1/n = 1/1000.Thus, in the conventional technology, the number of cycles α included in the burst signal is If the minimum dimming ratio 1/n is made smaller, the AC drive for the fluorescent lamp will be incomplete, which may shorten the lifespan and worsen the power efficiency.
There was a drawback that the minimum dimming ratio could not be set small.

Incidentally, liquid crystal display devices are also driven by alternating current (AC) for display in view of longevity, but the driving frequency is 30 to 300 Hz due to information transfer or scanning drive.
is used. In order to reduce the minimum dimming ratio 1/n of a fluorescent lamp dimmer, as mentioned above, the frequency f0 of the control signal is
must be lowered to, for example, about 50 Hz. When a fluorescent lighting device that is driven by this dimmer and has no frill power when used alone is used as a light source for a liquid crystal display device, the driving frequency of the lighting device, that is, the repetition frequency of the burst signal (equal to the frequency fc of the control signal) ) and the driving frequency of the liquid crystal are approximately the same, so interference occurs between them. However, if the dimming ratio P/n is small, this is not a problem, but as the dimming ratio P/n is increased, flicker appears and gradually becomes larger, causing a disturbance. The reason is,
This is because the brightness of the liquid crystal display increases as the dimming ratio increases, making flicker more noticeable.

The purpose of this invention is to enable the minimum dimming ratio 1/n to be set smaller than before, that is, to greatly expand the dynamic V range of dimming than before, and to dim fluorescent lamps without causing flickering on the liquid crystal display device. The goal is to provide equipment.

"An unsuccessful means to solve the problem" The fluorescent lamp dimmer of this invention includes a variable frequency oscillator,
A monostable multi-pipe and a lator which are driven by the output of the variable frequency oscillator, a frequency dividing circuit which divides the output of the variable frequency oscillator into half, and a monostable multi-pipe which is driven by the output of the frequency dividing circuit. A distribution circuit that alternately distributes the output of the saw lamp, and an inverter that is driven by the two outputs of the distribution circuit and supplies the output to the fluorescent lamp are provided.

The output pulse width of the monostable multivibrator is set equal to the minimum period of the variable frequency oscillator.

"Embodiment" As shown in FIG. 1, the fluorescent lamp dimmer of the present invention has a clock signal A of frequency f and period T from a variable frequency oscillator 1.
is supplied to the monostable multipipulator 2 and the 1/2 frequency divider circuit 3 (FIG. 2A). In the 172 frequency divider circuit 3, the frequency of the input clock signal A is divided by 1/2, and the frequency is f/2.
A frequency-divided signal B (FIG. 2B) and a frequency-divided signal 100 whose polarity is inverted are respectively supplied to one input terminal of ANDf) 4a and 4b. On the other hand, the monostable multivibrator 2 is driven by the leading edge of the square wave of the clock signal A, and a pulse signal C with a time width Δ is output to the other input terminal of the AND gate 4a t 4b (FIG. 2C) . In the AND dart 4a, the pulse signal C and the frequency-divided signal B are ANDed, and a distribution signal D of logic BXC (D in FIG. 2) is supplied to the inverter 5. On the other hand, the AND gate 4b performs an AND operation on the pulse signal C and the frequency division signal 100, and supplies the logical BXC distribution signal E (E in FIG. 2) to the inverter 5.

Ando Goo) 4a v 4b is A'rus signal C 172
It can be seen that a distribution circuit 4 is configured which alternately distributes the distribution based on the outputs B and B of the frequency division circuit 3. One of the divided outputs D is supplied to the node of the transistor Qt via a resistor Rl, and the other distributed output E is supplied to the base of the transistor Q2 via a resistor R2.

The transistors Q1 and C2 are connected to one end and the other end of the primary winding of the transformer T, respectively, and the emitters of the transistors QxsQz are grounded. The midpoint of the primary winding of the transformer T is connected to the DC power supply terminal 10B (hereinafter simply referred to as +B) via the resistor R3, and one end of the secondary winding is connected to the output terminal 5a, and the secondary winding The other end of the line is connected via a capacitor C to the output terminal 5b. Transistors Q1 and C2 are alternately turned on for 4 hours by the distributed output D%E, and current flows from 10B through resistor R3 and half of the primary winding to each transistor. As a result, a fluorescent lamp drive signal F is obtained between the output terminals 5a*5b, as shown in FIG. 2F, which alternately inverts the polarity of an AC half wave. The repetition frequency fD of the AC half wave is equal to the frequency f of the clock signal. The circuit consisting of transistors Ql and C2, transformer T1, capacitor C1, resistors R1, R2, and R3 is an inverter that is controlled by a distribution signal E and converts DC power into AC power.

As the frequency f of the variable frequency oscillator 1 is increased, the period T gradually decreases, and the interval between AC half waves of the fluorescent lamp oscillation signal F becomes narrower. Each signal waveform corresponding to FIG. 2 A-F when the frequency f is set to the maximum @fmax is shown in FIG. 3 A-F. The interval between the AC half waves of the fluorescent lamp drive signal F becomes zea, and a continuous AC signal is obtained. Naturally, the repetition frequency of the AC half wave is equal to the maximum frequency fm, Lx of the clock signal A. The time width Δ of pulse signal C (equal to the time width of an AC half wave) is equal to the time width of clock signal A
The minimum layer of KATm1rl is chosen equal to 1/fmax. That is, Δ=Tmin=1/fmax (7) In FIG. 2, the dimming ratio P/n by the drive signal F is P/n Δ/T = Δx t (
8). The repetition frequency fD of the AC half wave is expressed as fD=f=(P/n)/J (9) from the above equation. By substituting the relationship in equation (7) into this equation, fD
is: fD= f = (P/n) fmaX(1 (expressed as 1.

That is, the AC half-wave repetition frequency fD increases in proportion to the dimming ratio P/n. - For example f = 60ax kHz (so Δ = 16.7 ps) P/n =
If it is 100/1000, fo; f=(P/n) fm
ax=6000H2.

If the repetition frequency fD of AC half-wave is further increased,
The dimming ratio P/n becomes larger and larger. Therefore, in bright conditions where the flicker of the display device is easily noticeable, that is, in conditions where the dimming ratio P/n is large to some extent, the AC half-wave repetition frequency fD
is the driving frequency of the liquid crystal display element (30 to 300 Hz)
It is made considerably larger so that there is no visible interference between the mutual frequencies and no flicker occurs.

When setting the minimum dimming ratio 1/n to 1/1000,
If fmax = 60 kHz, the AC half-wave repetition frequency fD takes the minimum value 'Dmin, f = f, = (1/n)f = 60
Hz oDDmin n++n
It becomes max.

The frequency r (=rD) of the clock signal A is set to the maximum value 'max
(=f) in the case of Fig. 3, the dimming ratio Dm
a! P/n must of course be equal to 1, but (
8) By substituting f=f and Δ;1/f into the equation, D
=1maXma! This confirms that there is no contradiction.

As can be seen from the numerical example above, if the frequency f of the clock signal A is continuously varied between 60 Hz and 60 kHz, the dimming ratio P/n can be changed from 1/1000 to 1000/100.
It can be adjusted continuously between 0 and 0. In addition, variable frequency oscillator 1
may be constructed from a voltage controlled oscillator (VCO).

Modified Example of Inverter 5 Although the inverter 5 shown in FIG. 1 is constructed using a transformer T, it can also be constructed without using a transformer. An example is shown in FIG. That is, the distribution signal is supplied to the transistor Q1 through the inverting circuit N1,
Distribution signal E is supplied to the base of transistor Q2 through inverting circuit N2. The emitters of transistors Q+ and Q2 are grounded, and the collectors are connected to DC power supply terminal +Bo (hereinafter simply +BO) through resistors R and R2, respectively.
). Transistor Q! The collector of is connected to the pace of transistor Q3 through a resistor R3, the emitter of transistor Q3 is grounded, and its collector is connected to the base of transistor Q3 through a series circuit of resistors R4 and R5.
connected to. Meanwhile, the collector of transistor Q2 is connected to the pace of transistor Q4 through resistor R6, and its collector is connected to 10B through a series circuit of resistors R7 and R8.

The emitter of p-n-p h transistor Q5 is connected to 10B, and its collector is connected to n-p-n through resistor R9)
Connected to the collector of transistor Q6, transistor Q
Similarly, the emitter of p-n-p) transistor Q7 is connected to 1,000 B, and its collector is connected to the collector of n-p-n) transistor Q8 through a resistor RIG, whose The emitter is grounded. The pace of transistor Q5 is connected to the junction of resistors R7 and R8, and the pace of transistor Q6 is connected to the collector of transistor Q1 through resistor R'th. On the other hand, the pace of transistor Q is connected to the connection point between resistors R4 and R5, and the pace of transistor Q8 is connected to the collector of transistor Q2 via resistor R12. Each collector of the transistors Qs and Qs is connected to an output terminal 5a.
, 5b.

When the distribution signal becomes high level, the inverting circuit N is activated.

The output of the transistor Q1 becomes low level, and the transistor Q1 is turned off. As a result, a bias current is supplied from 10B0 to the transistors Qs and Qs, and both transistors are turned on. Transistor Q.

is turned on, the potential at the connection point of resistors R4 and R6 is 10B.
, and a pace current is supplied to transistor Q, turning it on.

- Since the force distribution signal E is at a low level, the inverter N,
The output of is at a high level, and transistor Q2 is turned on. As a result, the pace of transistor Q<, Qs is set to approximately zero volts, and both transistors are turned off. If transistor Q4 is off, transistor Q
Since the same voltage (+B) as that of the emitter is applied to the pace of , the transistor QIl is turned off.

During the period when the distribution signal is at a high level, the current force from 10B, trannostar Q, - resistor R1° - load (output terminal 5a
, 5b) - transistor Q6 - ground,
flows along the route of

During the period when the distribution signal E is at high level, the transistors Q1 to Q
The on/off state of 8 is opposite to the above, and current from 10B flows through the path of transistor Q, resistor R9, load, transistor Qs, and ground. Therefore, the direction of current flowing through the load is opposite to that before.

During a period when both the distribution signals E and E are at a low level, both transistors Q1 and Q2 are turned on, and all other transistors are turned off. Therefore, both the voltage and current supplied to the load are zero.

The resistors Rs + R1° are current limiting resistors, and a capacitor may be added in parallel to each resistor.

"Effect of the Invention" According to the present invention, even if the minimum dimming ratio 1/n is set small, the positive half-wave and negative half-wave of the fluorescent lamp drive signal are always repeated alternately. There is no risk that an imbalance will occur between the sum of positive periods and the sum of negative periods, which will reduce the life of the fluorescent lamp. Furthermore, the AC half-wave, which is the minimum unit that makes up the fluorescent lamp drive signal, is synchronized with the clock signal, has a time length equal to the minimum period of the clock signal, and has zero rising and falling waves, so the minimum adjustment is possible. Light ratio 1/
Even if n is made small, the waveform is cut off in the middle of the peak or valley at the rise and fall of the burst signal as in the past, and the waveform becomes zero discontinuously, which deteriorates the power efficiency of the fluorescent lamp dimmer. I'm also anxious about letting it happen.

Therefore, according to the present invention, it is possible to set the minimum dimming ratio to be much smaller than in the past, and the dynamic range of the dimming device can be greatly expanded.

According to this invention, the AC half-wave repetition frequency fD of the fluorescent lamp drive signal increases in proportion to the dimming ratio. Even if this dimming ratio is increased to make the crystal display brighter and flicker becomes more noticeable, the repetition frequency fD of the AC half-wave will be the drive frequency of the liquid crystal display element (3
0 to 300 Hz), for example, by one order of magnitude or more, and the difference in image frequency becomes large, so that flicker does not occur as in the conventional case.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the fluorescent lamp dimmer of the present invention, FIG. 2 is a waveform diagram of the main parts of the signals in FIG. 1,
3 is a waveform diagram of the main part of the signal when the period of the clock signal A is the minimum in FIG. 1, FIG. 4 is a circuit diagram showing another embodiment of the inverter 5 of FIG. 1, and FIG. 6 is a block diagram of a conventional fluorescent lamp dimmer, and FIG. 6 is a waveform diagram of the main signals of FIG. 5. Patent applicant: Hoshi Electric Manufacturing Co., Ltd.

Claims (1)

[Claims] A variable frequency oscillator, a monostable multivibrator driven by the output of the variable frequency oscillator, a frequency dividing circuit that divides the output of the variable frequency oscillator into half, and the frequency dividing circuit. A distribution circuit that alternately distributes the output of the monostable multivibrator according to the output of the circuit, and an inverter that is driven by two outputs of the distribution circuit and supplies the output to the fluorescent lamp, the monostable multivibrator described above. The output pulse width of the fluorescent lamp dimmer is equal to the minimum period of the variable frequency oscillator.