JPS6247995A - Discharge lamp stabilizer - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a high-frequency lighting device for a discharge lamp, and particularly to a discharge lamp ballast suitable for dimming a discharge lamp.

[Background of the invention]

Dimming methods for high-frequency lighting devices include changing the oscillation frequency, connecting an impedance in series with the load, and changing the duty ratio of the oscillation circuit.
The latter full-bridge method, in which the discharge lamp is lit using the resonance of L and C of the load, has the disadvantage that it is difficult to shape the waveform using the resonant circuit, and that an excessive current flows when the transistor conducts.

Also, JP-A-56-46671. Japanese Patent Publication No. 56-4667
2, JP-A-56-46673, JP-A-56-496
An idea has also been proposed, such as 80, in which the drive signal of the main switching transistor is periodically turned on and off. However, in these discharge lamp ballasts, the auxiliary winding is used to continue the oscillation of the main switching transistor, making it difficult to completely control the pace current (feedback current) of the main switching transistor. In order to continue the efficient operation of discharge lamp ballasts, further improvements have been desired.

[Purpose of the invention]

Therefore, the purpose of the present invention is to prevent high voltages caused by transient phenomena by synchronizing the activation and stopping of the oscillation circuit with the oscillation frequency of the oscillation circuit, that is, the zero of the tube current of the discharge lamp.
Another object of the present invention is to provide a control circuit for a discharge lamp output control device that completely stops oscillation when the control circuit receives a stop signal.

[Summary of the invention]

That is, the present invention includes a switching element that supplies load power to a discharge lamp, a drive circuit that emits a high-frequency drive signal that conducts this switching element, and a high-frequency drive signal that is generated at a lower frequency than the drive signal of the drive circuit and that is synchronized with the drive signal. The present invention provides a discharge lamp ballast including a dimming control circuit that periodically issues a dimming operation signal.

[Embodiments of the invention]

Hereinafter, one embodiment of the present invention will be described with reference to FIG.

Figure 1 shows a half-bridge type high frequency lighting device.
A drive circuit 80 is constructed around a control IC (hereinafter referred to as a control IC) 8. This control IC
8 has an oscillation circuit O8C built in, and the oscillation frequency f can be varied by adjusting an external capacitor 12 or resistor 13. Further, conduction of the main switching transistors 4 and 5 is controlled via a drive transformer 9 by a transistor located inside the control IC 8 and alternately turned on and off at an oscillation frequency f. Herein, 100 is a dimming control circuit that periodically emits a dimming operation signal C that is at a lower frequency than the drive signal RI, D, of the drive circuit 80 and is synchronized with the drive signal RI, , D, This dimming control circuit 10
0 is a waveform shaping circuit consisting of a transistor 19.20 which extracts the oscillation output of the control IC 8 from between the terminals of the capacitor 12 and converts it into a clock pulse, and divides the frequency of the converted cross pulse as the clock signal ck. ．． It is composed of a transistor 18 and the like that enables or disables drive signals R, D, of a drive circuit 80 according to the frequency division result of the counter group 14. The switch 30 is a full-light/dimmer switch, and when the switch 30 is set to σ, the light is full, and when it is OFF, the light is dimmed.

The operation of the device configured as described above will be explained below. First, the opening state (all-light operation) of the changeover switch 30 will be explained. When the power supply 1 is turned on, the drive circuit 80 starts oscillating at a frequency f determined by the capacitor 12 and the resistor 13. At this time, since the transistor 18 is in the ON state, the drive signals of the drive circuit 80 are: , D,
is input to the main switching transistor 4.5 via the drive transformer 9. As a result, the main switching transistors 4 and 5 become conductive alternately, and the ballast element 6°2
Lighting power is supplied to the discharge lamp 7 via the discharge lamp 7. Therefore, the discharge lamp 7 is lit at high frequency in a full-light state.

Now, when the changeover switch 30 is opened in this state, the conduction of the transistor 18 is determined by the frequency division result of the counter group 14, and when the transistor 18 is non-conduction, the drive signal DI of the drive circuit 80 is determined.

The current is blocked and the oscillation of the main transistor 4.5 is stopped. This point will be further explained using the time chart shown in FIG. In FIG. 2, C1 is the terminal voltage of the capacitor 12 of the drive circuit 80, ck is the clock signal generated when the terminal voltage of the capacitor 12 is processed by the transistor 19.20 and falls, and C is the clock signal of the counter group 14. This is a dimming operation signal that is generated according to the cycle result, and in the embodiment, the dimming operation signal C changes every time four pulses of the clock signal ck are input to the counter group 14. That is, the period ta indicates the state of the dimming operation signal CIJ''-Hi, and the period tb indicates the LO state, and the Hi state and Lo state are periodically repeated.Therefore, the dimming operation signal C is When in the Lo state, the transistor 18 is conductive, the drive signals R, D, of the drive circuit 80 are enabled, and a load current as shown by R1 in the figure is supplied to the load (discharge lamp 7). .

In the embodiment, the control of the transistor 18 is synchronized with the oscillation frequency f of the drive circuit 80, and the transistor 18 is switched between conducting and non-conducting when the tube current of the discharge lamp 7 becomes zero. The generation of high voltage pulses due to transient phenomena can be prevented. Furthermore, in the embodiment, when the transistor 1B is non-conductive, the supply of drive signals D, D, to the drive transformer 9 can be completely blocked (zero), and the drive current of the main switching transistors 4 and 5 is insufficient. Alternatively, there is no need to worry about the main switching transistors 4, 5 generating heat and being damaged due to an increase in conduction loss.

More specifically, in the embodiment, the oscillation frequency f of the drive circuit 80 is selected to be several tens of kHz, the oscillation frequency of the dimming operation signal C is selected to be several k) (z), and the Hi and Hi of the dimming operation signal C are selected. Duty of LO period ta, tb
The ratio tb/la was chosen to be 1. Therefore, the amount of power supplied to the load (discharge lamp 7) during dimming is 1/2 of that at full light.

In this way, even during dimming, the fundamental frequency of the power supplied to the load remains the same as when the light is fully illuminated, so the resonant impedance of the ballast elements 6 and 27 of the load can always be selected at an optimal value. Efficient operation can be continued both when the light is fully illuminated and when the light is dimmed.

Now, in the described embodiment, the duty ratio tb/la of the dimming operation signal C was selected to be 1, but the configuration of the counter group 14 for obtaining duty ratios other than this is shown in FIGS. 3(a) and 3(b). ). In other words, in the case of Fig. 3 (duty ratio tb/la > 1), Fig. 3 +
b> shows an example in which the duty ratio tb/la (1).

Next, the embodiment shown in FIG. 4 will be described.

In this embodiment, the duty ratio tb/la of the dimming operation signal C is continuously varied by using the PtJT 32. The circuit operation of this embodiment will be briefly explained with reference to the time chart shown in FIG. The PUT 32 basically constitutes a phase control circuit, and by adjusting the variable resistor 63 connected to the gate side, the H1 period ta' and the LO period tb' of the potential at point B are changed. The potential signal at point B is transferred to the D-type flip-flop 35.
In addition to the D terminal of this D type flip prop 35
Clock terminal [When a clock pulse is input, a dimming operation signal C synchronized with the clock pulse can be obtained from the Q terminal of the D-type flip 70 tube 35. Therefore, in this embodiment as well, as in the embodiments already described,
Stable dimming operation can be performed by using dimming operation signals with appropriate timing.

Next, another embodiment shown in FIG. 6 will be described. In this embodiment, the output of the oscillator circuit which is the basis of the drive signals R, D, of the main switching transistor 4.5 is directly cut off.
It will continue.

That is, 801 and 802 are a sawtooth wave oscillator and a drive signal distribution circuit that constitute the drive circuit, respectively, and the drive signal distribution circuit 802 includes a T-type flip-flop 50, various logic circuits 51, 52, 53, and 54, and transistors 60. 61 and a drive signal DI for the main switching transistors 4 and 5.

8. To further explain this point with reference to the time chart in FIG. Every time the pulse train E
, which is applied to the T terminal of the T-type flip-flop 50. Then, an alternately inverted pulse train is generated from the Q and Q terminals of the T-shaped flip 70 and the tube 50, and this pulse train is distributed within the drive signal distribution circuit 802 to generate the drive signal D1. Processed into D. In addition, the dimming control circuit 10
1 represents the output signal of the counter group 14, which inputs the output signal of the NAND circuit 62, 65, NAND circuit 62, 63 as a clock pulse, as a clock pulse, and the output signal of the NAND circuit 62, 65, which performs waveform shaping of the sawtooth wave E of the sawtooth wave oscillator 801; , a transistor 67 that is turned on and off by the dimming operation signal C.
, a comparator 70 that enables or disables subsequent pulse train signals depending on the state of the transistor 67.

Now, if the transistor 67 is OFF, the resistance 66°65
The input voltage E of one terminal of the comparator 70 determined by the voltage division ratio of 0
, so that they do not exceed the maximum value of the sawtooth wave E, and when the number of transistors 67 is 1, the input voltage E8 is increased to approximately the drive voltage Vc so that the value exceeds the maximum value of the sawtooth wave E. The circuit constants shall be selected. Note that the input voltage E when the transistor 67 is on is expressed as El' for convenience. In this way, counter group 1
As explained earlier, when the dimming operation signal C of No. 4 is Hi, that is, during the period when the transistor 67 is OFF,
A drive signal is sent to the main switching transistor 4.5,
, D, are supplied, and the discharge lamp 7 is supplied with lighting power. The time difference t between the drive signals R, D, and D is a dead time to prevent the transistors 60 and 61 from being turned on at the same time.

Next, as shown in FIG. 8, when the dimming operation signal C of the counter group 14 is LO, that is, during the period when the transistor 67 is turned down, the input voltage E,' is higher than the maximum value of the sawtooth wave E. Therefore, the output of the comparator 70 remains LO and never becomes Hi. Therefore, the drive signal, ,D,
remains in the LO state, and the main switching transistor 4
, 5 do not operate, so lighting power is not supplied to the discharge lamp 7.

In this way, in this embodiment, the sawtooth wave oscillation circuit 801
The comparator 70 uses a signal obtained by dividing the oscillation frequency f into 1/n.
In addition to changing the input voltage E1, the sawtooth wave E is applied so that the rise and fall of the dimming operation signal C are synchronized with the OFF'F' time of the main switching transistor 4.5, that is, the time when the load current becomes zero. .

The frequency is divided.

Now, in the embodiments described above, the circuit operation was explained only during full light or dimming, but depending on the purpose of dimming, multiple frequency dividing circuits may be prepared and stepwise dimming may be performed. operations can be performed. In this case, a programmable counter using a microcomputer,
By preparing a count up (count down) program, more detailed dimming operations can be performed. Furthermore, in the embodiment, the synchronization of the drive signal of the drive circuit and the dimming operation signal of the dimming control circuit was realized using a frequency divider circuit and other circuit technology in the waveform processing process. It is also possible to detect this using a transformer, etc., and switch various signals by seizing the opportunity when the current value becomes zero.

〔Effect of the invention〕

As explained above, the present invention includes a switching element that supplies load power to a discharge lamp, a drive circuit that emits a high-frequency drive signal that conducts this switching element, and a drive signal that is lower in frequency than the drive signal of this drive circuit, The present invention provides a discharge lamp ballast equipped with a dimming control circuit that periodically issues a dimming operation signal synchronized with a drive signal. You can get a light ballast.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram for explaining one embodiment of the present invention, FIG. 2 is a time chart for explaining the operation of the embodiment shown in FIG. 1, and FIG. 3(a). fbl is a diagram for explaining the configuration of each other counter group, FIG. 4 is a circuit diagram for explaining another embodiment, and FIG. 5 is a diagram for explaining the operation of the embodiment shown in FIG. 4. FIG. 6 is a circuit diagram for explaining another embodiment, and FIGS. 7 and 8 are time charts for explaining the operation of the embodiment shown in FIG. 6, respectively. 4.5... Switching element, 7...
...Discharge lamp, 80, 801, 802...
...drive circuit, 100,101...song...
Dimming control circuit, D, , D,... Drive signal, C... Dimming operation signal Figure 2 Figure 3 Figure S

Claims (1)

[Claims] A switching element that supplies load power to the discharge lamp, a drive circuit that generates a high-frequency drive signal that conducts this switching element, and a dimming operation signal that has a lower frequency than the drive signal of this drive circuit and is synchronized with the drive signal. A discharge lamp ballast equipped with a dimming control circuit that periodically emits light.