JPH01123471A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To avoid the inversion of a substrate independently of implantation ion concentration and driving conditions, by performing As ion implantation using a resist mask, and exfoliating and eliminating the resist mask before As ion driving process. CONSTITUTION:A three-layer film consisting of a thermal oxide film 2, a silicon nitride film 3 and a CVDSiO2 film 4 is formed on a P-type silicon substrate 1. By using a resist pattern 5 as a mask, an NSG 4 is etched and subjected to patterning. When N-type impurity atom like As is ion-implanted, the resist pattern 5 serves as a mask, and the N-type impurity is implanted only in a desired buried diffusion region of the P-type silicon substrate 1. The resist pattern 5 is exfoliated, an SiN film 3 is etched by using the NSG film 4 as a mask. The P-type silicon substrate 1 is oxidized, and an oxide film 2a is selectively formed on an impurity region 6, by oxidation at a comparatively low temperature. Driving at a high temperature is performed, and successively the oxide films 2, 2a, and the NSG film 4 are totally exfoliated and eliminated in order.

Description

Detailed Description of the Invention <Industrial Application Field> The present invention relates to a method for manufacturing a semiconductor device, and in particular to a bipolar transistor section in a BiMOS semiconductor device in which a bipolar transistor and a MOS transistor are formed on the same substrate. Regarding the jl collector diffusion technique.

<Prior Art> Conventionally, antimony (Sb) element has been used as an n-type impurity in bipolar semiconductor integrated circuit devices, or SbG has been used as an n-type impurity diffusion source. However, bipolar type M
OS) When manufacturing transistor eMo transistors on the same substrate as S-type transistors using conventional MOS-type transistor manufacturing equipment, SbG or sb is rarely used in the conventional MO8-type transistor manufacturing process, so M
An increase in the number of devices used is prevented by using the O8 type transistor manufacturing equipment's N-type impurity drive furnace such as As to diffuse sb from the SbG layer.

However, if the N-type impurity drive furnace of the conventional MOS transistor manufacturing equipment is also used as the SbG drive furnace, the sb
The out-diffusion of the N-type impurity drives contaminates the N-type impurity drive reactor and adversely affects the MO8 type transistor. Therefore,
It is being considered to form an N-type buried diffusion layer by implanting As·'i ions, which are source/drain diffusion impurities of n-ch MO8 type O8 transistors, instead of sb.

Here, we repurposed the source/drain diffusion region formation technology,
When a relatively thick oxide film is used as a mask for As ion implantation, the impurity concentration required to form an N-type buried collector is relatively high and the drive conditions are quite severe, so As atoms implanted into the oxide film surface are There is a problem in that during the subsequent drive step, the oxide passes through the oxide film and reaches the semiconductor substrate, inverting the surface of the substrate. In addition, a hot water bath using photoresist as an ion implantation mask and ion implantation directly into the exposed surface of the semiconductor substrate cause non-uniform distribution of implanted ions and damage to the surface.

When forming the N-type buried collector of a bipolar transistor in this way, As atoms are used as the N-type impurity, and M
There is a problem in that even if an OS type transistor manufacturing apparatus is used to perform the ion implantation and diffusion of As atoms, it is not possible to manufacture a reliable N-type buried collector for a bipolar transistor.

<Means for Solving the Problems> The present invention has been made to solve the above-mentioned problems.
In the method for manufacturing a semiconductor device in which an S-type transistor is formed, when forming a second conductivity type impurity-embedded collector in a first conductivity type semiconductor substrate, a semiconductor thermal oxide film and a silicon nitride film are formed in the first conductivity type semiconductor substrate. forming a photoresist pattern on the silicon nitride film 5 exposing a desired ion-implanted region of the first conductivity type semiconductor substrate, and doping a second conductivity type impurity over the entire surface of the first conductivity type semiconductor substrate. implanting ions; sequentially removing the silicon nitride film on the photoresist pattern and the desired ion-implanted region; and heating the first conductivity type semiconductor substrate in two stages, one at a relatively low temperature and one at a relatively high temperature. The present invention provides a method for manufacturing a semiconductor device comprising the steps of performing selective oxidation separately and simultaneously forming a second conductivity type impurity-buried collector.

<Function> As mentioned above, N-type impurities such as As used in MOS transistor manufacturing can be used as a technology for forming N-type buried diffusion regions of bipolar transistors, and at the same time, when using a MOS transistor manufacturing equipment, As ion implantation can be used. By using a resist mask and peeling and removing the resist mask before the As ion drive step, the substrate will not be inverted regardless of the implanted ion concentration and drive conditions. Furthermore, by implanting As ions through a two-layer film of a nitride film and an oxide film on the substrate, the ions can be uniformly implanted and damage to the substrate surface can be prevented.

<Examples> Examples of the present invention will be described below with reference to the drawings, but the present invention is not limited thereto.

FIGS. 1(a) to 1(i) are cross-sectional views showing one embodiment of the present invention.

First, as shown in FIG. 1(a), a 100%
A thermal oxide film 2 with a thickness of ~500A is formed, followed by a
LPCV thin silicon nitride film 3 of about 00 to 200A
Formatively annealed at 900° C. with good uniformity using device D. Now, N5G4/S i N3/S i 022
A three-layer film is formed on the entire surface of the wafer 1.

Next, as shown in FIG. 1(c), a resist pattern 5 is formed in the area where buried diffusion is not performed using the N buried diffusion layer forming pattern, and then a resist turn 5i mask and a resist pattern 5 are formed as shown in FIG. 1(d). The NSC film 4 is etched and patterned using an ordinary oxide film etchant such as buffered hydrofluoric acid while maintaining a selectivity with respect to the underlying SiN layer 3. Thereafter, when N-type impurity atoms such as As are ion-implanted, the N-type impurity is implanted only into the desired buried diffusion region of the P-type silicon substrate 1 using the resist pattern 5 as a mask. Subsequently, as shown in FIG. 1(e), the ion-implanted resist pattern 5 is removed using oxygen plasma, sulfuric acid peroxide, or the like. After that, the NSC film 4 is used as a mask using hot phosphoric acid, etc., and the base S
The SiN film 3 is etched and patterned while maintaining a selectivity with respect to the iO□ film 2.

Next, as shown in FIG. 1(f), the P-type silicon substrate 1 is oxidized in water vapor where viscous flow of the oxide film is likely to occur.

At this time, oxidation is performed at a relatively low temperature to prevent the previously implanted N-type impurity from diffusing into the oxide film 2 and being extracted from the silicon substrate 1 due to outward diffusion.
Then, an oxide film 2a of about 3000 Å is selectively formed. Thereafter, as shown in FIG. 1(g), driving is performed at high temperature to obtain an appropriate junction depth xj, and the impurity diffusion region 6 becomes approximately 300°.
Since it is covered with the oxide film 2a having a thickness of A, it is possible to avoid a decrease in surface concentration due to outward diffusion of impurities and contamination of the diffusion furnace. Next, as shown in FIG. 1(b), the oxide film 2.2a, N
The SG film 4 is removed using buffered hydrofluoric acid or the like, and the SiN film 3 is removed from the top layer sequentially using hot phosphoric acid or the like.

At this time, since the selective oxide film 2a was formed on the impurity diffusion region 6, when the oxide film 2a is removed, a step is formed on the surface of the silicon substrate 1. This step can be used as an alignment mark during the subsequent isolation or N-well diffusion process.

Next, as shown in FIG. 1(i), P-type silicon 7 is epitaxially grown using a conventionally known technique.

FIG. 2 shows an example in which a bipolar transistor and a MOS transistor' are actually formed on the same substrate using this embodiment. N-well diffusion is performed on the P-type silicon 7ON-type impurity diffusion region 7, and the N-well diffusion region 8
A bipolar transistor 9 or P-chMOS) transistor 10 is formed on the P-type silicon 7, and a material-chMOS transistor 10 is formed on the P-type silicon 7.
S) Forming the transistor 11 using a conventionally known technique.

In this embodiment, the film thicknesses of SiO+2° and SiN3 formed on the P-type silicon substrate 1 during N-type impurity ion implantation were 100 to 500A and 100 to 200λ, respectively.
However, the present invention is not limited to this, and the sum of the film thicknesses of 5iO22 and SiN3 is a thickness that allows the SiN pattern to sufficiently serve as a mask during selective oxidation performed by etching to manufacture conventional MOS transistors. If so, you can apply it.

However, in this embodiment, the NSC film 4 was used as a mask when removing the nitride film 3 by etching, but if a dry etching method with a high selectivity with respect to the underlying oxide film 2 was used, the resist mask 5 would be used. NSC because it can be etched with
Membrane 4 becomes unnecessary.

As mentioned above, after ion implantation, the impurity atoms implanted into the resist mask e (by removing it) diffuse through the mask in the subsequent drive process, reach the substrate surface 1, and form an N-type layer on the surface. It is possible to avoid contamination of the autodor 1 and the furnace due to out-diffusion. Furthermore, by ion-implanting N-type impurities through a thin nitride film and oxide film, variations in impurity distribution due to channeling can be eliminated. Furthermore, by applying two stages of low temperature and high temperature conditions during oxide film formation and driving after ion implantation, it is possible to avoid a decrease in surface concentration due to outward diffusion and contamination of the furnace.

<Effects of the Invention> As detailed above, according to the present invention, bipolar type transistors can be manufactured using conventional MOS transistor manufacturing equipment without affecting the manufacturing process and manufacturing equipment of conventional MOS transistors. A semiconductor device in which a transistor and a MOS transistor are formed on the same substrate can be manufactured.

[Brief explanation of the drawing]

FIGS. 1(a) to (i) are cross-sectional views showing an embodiment of the present invention, and FIG. 2 is a cross-sectional view showing an example of use of the embodiment of the present invention. 1. P-type Si substrate 2.2a thermal oxide film 3. Silicon nitride 1 4. NSG film 5. Resist pattern 6. N-type impurity diffusion region 7. P-type Si epitaxial layer agent Patent attorney Takeshi Sugiyama (and 1 other person) @1 Figure 7P Sojgo/Kuge 14Ten 1

Claims (1)

[Claims] 1. Bipolar transistor and MO on the same semiconductor substrate
In a method of manufacturing a semiconductor device in which an S-type transistor is formed, impurity ions of a second conductivity type are implanted into a semiconductor substrate of a first conductivity type, and the implanted ions are diffused to fill the second conductivity type impurity of a bipolar transistor. When forming the integrated collector, a step of sequentially forming a semiconductor thermal oxide film and a silicon nitride film on the first conductivity type semiconductor substrate, and a photoresist pattern exposing a desired ion implantation region of the first conductivity type semiconductor substrate. forming on the silicon nitride film and implanting second conductivity type impurity ions into the entire surface of the first conductivity type semiconductor substrate; and sequentially removing the silicon nitride film on the photoresist pattern and the desired ion implantation region. and selectively oxidizing the first conductivity type semiconductor substrate in two stages, one at a relatively low temperature and the other at a relatively high temperature, and simultaneously forming a second conductivity type impurity-embedded collector. A method for manufacturing a semiconductor device.