JPH01120815A - Heating of semiconductor wafer - Google Patents

Heating of semiconductor wafer

Info

Publication number
JPH01120815A
JPH01120815A JP27950787A JP27950787A JPH01120815A JP H01120815 A JPH01120815 A JP H01120815A JP 27950787 A JP27950787 A JP 27950787A JP 27950787 A JP27950787 A JP 27950787A JP H01120815 A JPH01120815 A JP H01120815A
Authority
JP
Japan
Prior art keywords
wafer
low resistance
heating
resistance layer
heated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP27950787A
Other languages
Japanese (ja)
Inventor
Kiyouichi Takaike
高池 匡一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP27950787A priority Critical patent/JPH01120815A/en
Publication of JPH01120815A publication Critical patent/JPH01120815A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To heat a wafer efficiently and uniformly by a method wherein impurity ions are implanted into the surface of the wafer opposite to the surface on which an epitaxial film is built up, a low resistance layer with a specified resistivity and thickness is formed by a thermal diffusion treatment, its induction heating is performed and the wafer is heated by the heat transmission from the low resistance layer. CONSTITUTION:Wafers 6 with low resistance layers are put on a quartz board 5 in a reaction tube 4. After the reaction tube 4 is evacuated through an exhaust pipe 10, the low resistance layers 2 formed on the rear surfaces of the wafers 1 are induction-heated by an induction heating coil 8 while reactive gas is introduced into the reaction tube 4 from a gas introducing pipe 7. The wafer 6 with the low resistance layer is formed by diffusing n-type impurity into the rear surface of the p-type Si wafer. For that purpose, after phosphorus ions are implanted, the wafer is annealed in a nitrogen atmosphere. In order to obtain the effect of induction heating, it is necessary to have the diffusion depth not less than 1mum and the resistivity not higher than 0.1OMEGAcm. With this constitution, the wafer can be heated efficiently and uniformly.

Description

【発明の詳細な説明】 〔概要〕 半導体ウェハーの加熱方法に関し。[Detailed description of the invention] 〔overview〕 Regarding heating methods for semiconductor wafers.

該ウェハーに熱源の機能を付加することを目的とし。The purpose is to add a heat source function to the wafer.

該ウェハー上のエピタキシャル膜成長面と反対側の面に
不純物イオンを注入し、拡散熱処理により0.1Ωcm
以下の抵抗率を持つ厚さ1μI以上の低抵抗層を形成し
て誘導加熱することにより、該ウェハーを加熱する構成
とする。
Impurity ions are implanted on the surface opposite to the epitaxial film growth surface on the wafer, and a diffusion heat treatment is performed to reduce the thickness to 0.1 Ωcm.
The wafer is heated by forming a low resistance layer having a resistivity below and having a thickness of 1 μI or more and performing induction heating.

〔産業上の利用分野〕[Industrial application field]

本発明は半導体ウェハーの加熱方法に係り、特に効率良
くしかも均一に該ウェハーを加熱する方法に関する。
The present invention relates to a method of heating a semiconductor wafer, and particularly to a method of efficiently and uniformly heating the wafer.

〔従来の技術〕[Conventional technology]

第3図は従来のウェハー加熱方法を示す。化学的気相成
長法(CVD法)等でウェハー表面にエピタキシャル膜
を成長させるプロセスにおいて。
FIG. 3 shows a conventional wafer heating method. In the process of growing an epitaxial film on a wafer surface using chemical vapor deposition (CVD) or the like.

排気管10から反応管4内の排気を行い1次いで反応管
4の中へガス流入管7から反応ガスを導入しながら誘導
加熱コイル8に高周波を加え、該反応管4の中に設置し
た石英ボード5上の炭素板9を誘導加熱し、そこからの
熱伝導によりウェーハlを加熱していた。
The inside of the reaction tube 4 is evacuated from the exhaust pipe 10, and then a high frequency is applied to the induction heating coil 8 while introducing the reaction gas into the reaction tube 4 from the gas inflow pipe 7. The carbon plate 9 on the board 5 was heated by induction, and the wafer l was heated by heat conduction from there.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかし、従来知られている方法には、熱効率が悪く、さ
らにウェハーと炭素板の間に浮きを生じることがあり加
熱が必ずしも均一に行われないという問題があった。
However, conventionally known methods have problems in that they have poor thermal efficiency and that floating may occur between the wafer and the carbon plate, so that heating is not necessarily uniform.

本発明の目的はウェハーを効率よ(、シかも均一に加熱
することにある。
An object of the present invention is to efficiently and uniformly heat a wafer.

〔問題点を解決するための手段〕[Means for solving problems]

第1図に本発明の低抵抗層付きウェハーを示す。 FIG. 1 shows a wafer with a low resistance layer of the present invention.

・ ウェハー1上のエピタキシャル膜成長面3と反対側
の面に不純物イオンを注入し、拡散熱処理により0.1
Ω1以下の抵抗率を持つ厚さ1μ−以上の低抵抗層2を
形成して誘導加熱し、そこからの熱伝導で該ウェハー1
を加熱する。かくすることにより、上記問題点は解決さ
れる。
- Impurity ions are implanted on the surface opposite to the epitaxial film growth surface 3 on the wafer 1, and a diffusion heat treatment is performed to reduce the
A low resistance layer 2 having a resistivity of Ω1 or less and a thickness of 1μ or more is formed and heated by induction, and the wafer 1 is heated by heat conduction from there.
heat up. By doing so, the above problem is solved.

〔作用〕[Effect]

ウェーハ裏面は本来、半導体装置の形成される面ではな
いので、そこに低抵抗層を形成して誘導加熱する熱源と
するのは該装置への影響がなく。
Since the back surface of the wafer is not originally the surface on which semiconductor devices are formed, forming a low resistance layer there and using it as a heat source for induction heating has no effect on the device.

しかもこの熱源は該装置の形成される面に極めて接近し
ているので、加熱の効率が良く、均一に加熱できる。
Moreover, since this heat source is very close to the surface on which the device is formed, the heating efficiency is high and uniform heating can be achieved.

誘導加熱の効果を得るためには、拡散深さが1μm以上
、抵抗率は0.1Ω1以下であることを要する。
In order to obtain the effect of induction heating, the diffusion depth must be 1 μm or more and the resistivity must be 0.1Ω1 or less.

〔実施例〕〔Example〕

第2図に本発明の低抵抗付きウェハーを用いる加熱方法
を示す0反応管4の中の石英ボード5の上に低抵抗付き
ウェハー6を載せ、排気管10から排気した後、ガス流
入管7から反応ガスを導入しつつ、誘導加熱コイル8に
よりウェハー1の裏面(半導体装置が形成される面と反
対側の面)に形成された低抵抗N2を誘導加熱する。低
抵抗層付きウェハーの作製は次の如くする。
FIG. 2 shows a heating method using a low-resistance wafer of the present invention. A low-resistance wafer 6 is placed on a quartz board 5 in a reaction tube 4, and after exhausting air from an exhaust pipe 10, a gas inflow pipe 7 While introducing a reactive gas from the wafer 1, the low resistance N2 formed on the back surface of the wafer 1 (the surface opposite to the surface on which semiconductor devices are formed) is heated by induction using the induction heating coil 8. The wafer with a low resistance layer is manufactured as follows.

厚さ約500μm、不純物濃度が10150−3である
p型Siウェハーの裏面にn型不純物を拡散させて低抵
抗層を形成する。このために、P+ (燐イオン)を1
20keVのエネルギーで5 X I Q I5am−
2イオン注入した後、窒素雰囲気中で1100℃、1時
間のアニールをして、拡散深さ約3μm1表面濃度約I
Q”cm−’の低抵抗層を形成する。この部分の比抵抗
は約lθ″″3Ω国である。 かくすることにより、ウ
ェハーを効率良くしかも均一に加熱することが出来る。
A low resistance layer is formed by diffusing n-type impurities on the back surface of a p-type Si wafer having a thickness of about 500 μm and an impurity concentration of 10150-3. For this purpose, P+ (phosphorus ion) is
5 X I Q I5am- at an energy of 20 keV
After implanting 2 ions, annealing was performed at 1100°C for 1 hour in a nitrogen atmosphere to achieve a diffusion depth of about 3 μm1 and a surface concentration of about I.
A low resistance layer of Q"cm-' is formed. The specific resistance of this portion is about lθ""3Ω. By doing this, the wafer can be heated efficiently and uniformly.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、化学的気相成長法(CVD法)等でウ
ェハー表面にエピタキシャル膜を成長させるプロセスに
おいて、ウェハーを効率良くしかも均一に加熱すること
ができる。また、従来ウェハー加熱に用いていた高周波
誘導加熱用炭素板が不用となるのでウェハーのセットは
石英ボードに載せるのみで簡単になり、しかも装置、ボ
ード等の軽量化が計れる。
According to the present invention, a wafer can be efficiently and uniformly heated in a process of growing an epitaxial film on a wafer surface by chemical vapor deposition (CVD) or the like. Furthermore, since the high-frequency induction heating carbon plate conventionally used for wafer heating is no longer necessary, the wafer can be easily set by simply placing it on a quartz board, and the weight of the equipment, board, etc. can be reduced.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は低抵抗層付きウェハー。 第2図は本発明の加熱方法 第3図は従来の加熱方法 である。 図において。 1はウェハー。 2は低抵抗層。 3はエピタキシャル膜成長面。 4は反応管。 5は石英ボード。 6は低抵抗層付きウェハー。 7はガス流入管。 8は誘導加熱コイル。 9は炭素板。 lOは排気管 従4ミの刀ロ熱゛方−法 単3 図 Figure 1 shows a wafer with a low resistance layer. Figure 2 shows the heating method of the present invention. Figure 3 shows the conventional heating method It is. In the figure. 1 is a wafer. 2 is a low resistance layer. 3 is the epitaxial film growth surface. 4 is a reaction tube. 5 is a quartz board. 6 is a wafer with a low resistance layer. 7 is a gas inflow pipe. 8 is an induction heating coil. 9 is a carbon plate. lO is the exhaust pipe How to heat up a sword for junior high school students AA figure

Claims (1)

【特許請求の範囲】[Claims]  半導体ウェハーを加熱しつつ、該ウェハー上にエピタ
キシャル膜を成長させるプロセスにおいて、該ウェハー
1上のエピタキシャル膜成長面3と反対側の面に不純物
イオンを注入し、拡散熱処理により0.1Ωcm以下の
抵抗率を持つ厚さ1μm以上の低抵抗層2を形成し誘導
加熱することにより、該ウェハー1を加熱することを特
徴とする半導体ウェハーの加熱方法。
In the process of growing an epitaxial film on a semiconductor wafer while heating the wafer, impurity ions are implanted into the surface of the wafer 1 opposite to the epitaxial film growth surface 3, and a resistance of 0.1 Ωcm or less is achieved by diffusion heat treatment. A method for heating a semiconductor wafer, which comprises heating the wafer 1 by forming a low resistance layer 2 having a thickness of 1 μm or more and heating the wafer 1 by induction heating.
JP27950787A 1987-11-05 1987-11-05 Heating of semiconductor wafer Pending JPH01120815A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27950787A JPH01120815A (en) 1987-11-05 1987-11-05 Heating of semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27950787A JPH01120815A (en) 1987-11-05 1987-11-05 Heating of semiconductor wafer

Publications (1)

Publication Number Publication Date
JPH01120815A true JPH01120815A (en) 1989-05-12

Family

ID=17612005

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27950787A Pending JPH01120815A (en) 1987-11-05 1987-11-05 Heating of semiconductor wafer

Country Status (1)

Country Link
JP (1) JPH01120815A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002343946A (en) * 2001-03-16 2002-11-29 Canon Inc Semiconductor film and manufacturing method thereof
JP2008067099A (en) * 2006-09-07 2008-03-21 Toin Gakuen Array type ultrasonic probe and its manufacturing method

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5961175A (en) * 1982-09-30 1984-04-07 Fujitsu Ltd Semiconductor substrate

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5961175A (en) * 1982-09-30 1984-04-07 Fujitsu Ltd Semiconductor substrate

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002343946A (en) * 2001-03-16 2002-11-29 Canon Inc Semiconductor film and manufacturing method thereof
JP2008067099A (en) * 2006-09-07 2008-03-21 Toin Gakuen Array type ultrasonic probe and its manufacturing method

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