JPH01120025A - Manufacture of thin film transistor - Google Patents

Abstract

PURPOSE:To form a good Ta gate electrode without contamination on the surface and to obtain good TFT characteristics by dry-etching a tantalum layer using a metal layer as a mask to which wet-etching is conductable, when processing and forming a tantalum gate electrode. CONSTITUTION:When manufacturing a thin film transistor which has a gate section of lamination construction of a tantalum gate electrode 13, an oxide tantalum primary gate insulation layer 15 and a secondary gate insulation layer 5 in succession, a tantalum layer 11 which is formed on a substrate 1 is dry-etched using a metal layer 14 as a mask to which wet-etching is conductable in processing and forming the tantalum gate electrode 13. For instance, after an etching mask layer 12 such as nichrome is formed on a Ta film 11 and patterned by wet-etching, the Ta gate electrode 13 is formed by conducting dry-etching using the etching mask 14. The anodic oxidation is made to the Ta gate electrode 13 to form the primary insulation layer 15 after the mask 14 is eliminated by wet-etching.

Description

[Detailed description of the invention] (Industrial application field) The present invention relates to a method for manufacturing a thin film transistor.

(Prior Art) Figure 2 is a cross-sectional view (c) of main parts of a thin film transistor (hereinafter referred to as TPT) and a conventional TPT manufacturing process diagram (a-c).
), in the figure, 1 is a substrate made of a transparent insulator such as glass, 2 is a transparent electrode made of ITO (Ina03+5nOi), 3 is a tantalum (Ta) gate electrode, and 4 is made of tantalum oxide (Ta0x). a first gate insulating layer;
5 is a second gate insulating layer, 6 is an active layer, 7 is a drain electrode, and 8 is a source electrode.

Next, a conventional method for manufacturing TPT will be explained using FIG. 2.

Sputtering method or electron beam evaporation method and processing (
A transparent electrode 2 is formed by photolithography, etching), and then a gate electrode 3 is formed on the substrate 1 by sputtering and processing (photolithography, dry etching).
[Fig. 2(a)]. By anodizing a predetermined portion of the gate electrode 3, a first gate insulating layer 4 is formed on the upper part of the gate electrode 3 [FIG. 2(b)].

Next, a second gate insulating film 5 and an active layer 6 are sequentially formed on predetermined portions of the gate electrode 3 and the first gate insulating layer 4, and further a drain electrode 7 and a source electrode 8 are formed [FIG. 2(C)] . Finally, silicon oxide IIi (Si
The TPT is manufactured by forming a protective film (not shown) made of a silicon nitride film (S1Nx) on the TPT and the transparent electrode.

By arranging transparent electrodes two-dimensionally, TPT is used, for example, as a TFT array with transparent electrodes in a liquid crystal display device.

(Problems to be Solved by the Invention) However, in this conventional TPT manufacturing method, Ta
In forming the gate electrode, during etching using a mixed gas of CF 4 and 02 and RF plasma, Ta, which was once etched and released into the plasma, re-attaches to the resist surface, and the resist suffers plasma damage.

As a result, when attempting to remove such resist in the subsequent manufacturing process, organic solvents and nitric acid-based chemicals,
Alternatively, there was a problem that the resist could not be completely removed even if 02 plasma (asher) was used.

Residues on the Ta gate electrode, such as redeposited Ta or altered resist that cannot be removed, cause pinholes to form when the first gate insulating layer is formed by anodic oxidation after forming the Ta gate electrode. This causes deterioration in the film quality of the gate insulating layer. Furthermore, this deterioration in film quality causes deterioration in the film quality of the second gate insulating layer that is subsequently formed. This deterioration in the film quality of the second gate insulating layer is due to TPT.
This causes a short circuit between the gate and drain when operating the TPT, and as a result, the ON current of the TPT becomes small and the OFF current becomes large, resulting in a small ON10FF ratio, and the resulting TPT has insufficient function as a switch. The problem was that it became a thing.

(Means for Solving the Problems) The present inventor has solved the above-mentioned problems caused by residues on the Ta gate electrodes due to Ta re-deposition, resist damage, etc. that occur during the formation of the Ta gate electrodes in the conventional TPT manufacturing method. The present invention was completed as a result of various studies.

That is, the present invention provides a method for manufacturing a thin film transistor in which the gate portion has a structure in which a tantalum gate electrode, a tantalum oxide first gate insulating layer, and a second gate insulating layer are stacked on a substrate in this order, including processing and forming the tantalum gate electrode. In this method, a tantalum layer formed on a substrate is dry-etched using a wet-etchable metal layer as a mask.

(Function) The wet-etchable metal used in the method of the present invention prevents the surface of the Ta layer from being contaminated during dry etching processing of the Ta gate electrode. The metal is removed by wet etching after the dry etching process is completed.

(Example) Hereinafter, the TPT manufacturing method of the present invention will be explained with reference to the drawings.

FIG. 1 shows a process diagram of the method of the present invention, and in the figure, 1, 2, and 5 to 8 have the same meanings as above, and 1
1 is a Ta film for forming a Ta gate electrode, 12 is an etching mask layer according to the present invention, 13 is a Ta gate electrode whose upper surface is masked, and 14 is an etching device used when dry etching the Ta gate electrode 13. mask,
Reference numeral 15 indicates a first gate insulating layer of oxidized metal.

The method of the invention can be used as follows.

A transparent electrode 2 is formed on a substrate 1 using the same method as the conventional method. Next, a Ta film 11 is formed over the entire surface of the substrate by sputtering or electron beam evaporation to a thickness of 500 to 5,000. Subsequently, a wet-etchable metal is formed on the Ta film 11 to a thickness of 300 to 2,000 by sputtering or electron beam evaporation. As a result, an etching mask layer 12 is formed [first etching mask layer 12].
Figure (a)]. Examples of metals that can be wet-wet-eratinized include nichrome, chromium, nickel, and aluminum, which may be used alone or in combination of two or more.

Next, the etching mask layer 12 is processed into a predetermined gate electrode pattern by photolithography and wet etching to form an etching mask 14. Thereafter, the resist pattern used during processing by photolithography is removed using an organic solvent or the like. Then, by dry etching the Ta film 11 using this etching mask 14 in accordance with a conventional method, the Ta film 11 is etched.
A gate electrode 13 is formed. Next, the etching mask 14 that is no longer needed is removed by wet etching [
Figure 1(b)].

After that, the Ta gate electrode 13 is anodized under predetermined conditions.
Oxidation is performed by at least one of plasma oxidation and thermal oxidation to form a first gate insulating layer 15 on at least a portion thereof [FIG. 1(C)].

Next, according to a conventional method, a second gate insulating layer 5, an active layer 6,
The TPT of the present invention can be obtained by forming a drain electrode 7, a source electrode 8, and a protective film (not shown) [FIG. 1(d)].

The second gate insulating layer 5 and the active layer 6 are made of, for example, silane (S
iH4) Amorphous silicon nitride film (a
-5iNx) and plasma CV using silane gas
It can be formed by depositing an amorphous silicon film (a-3i) around the gate electrode by the D method or the like, and then processing it into a predetermined shape by photolithography and plasma etching.
-... - The drain electrode 7 and the source electrode 8 are formed by depositing a metal film made of a metal material such as aluminum or chromium by sputtering, vapor deposition, etc., and then processing it into a predetermined shape by photolithography and etching. It can be formed by

Further, the protective film can be formed by, for example, a silicon oxide film or a silicon nitride film on the TPT and the transparent electrode by plasma CVD.

(Effects of the Invention) Since the thin film transistor manufacturing method of the present invention has a configuration such as a diagonal top, according to the present invention, a metal film that can be wet-etched is used as a mask for dry etching of the Ta film. This eliminates the problem of plasma deterioration of the resist that existed in the prior art, and even if Ta is re-deposited, when the dry etching mask 14 of the gate electrode is removed by wet etching, the Ta re-deposit is also removed at the same time. 1. It became possible to form a good Ta gate electrode without contamination on the electrode surface.

As a result, the subsequent steps of anodic oxidation of Ta, gate insulating film formation, and active layer can be formed without impairing film quality, and good TPT characteristics can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a process diagram of the method for manufacturing a thin film transistor according to the present invention;
FIG. 2 shows a process diagram of a conventional manufacturing method for the same thin film transistor. DESCRIPTION OF SYMBOLS 1... Base body, 11. Ta film, 12... Etching mask layer, 13... Ta gate electrode, 14... Etching mask, 15... First gate insulating layer. Patent applicant Oki Electric Industry Co., Ltd. Figure 1: Manufacturing capabilities of thin film transistors; past performance Figure 2

Claims (1)

[Claims] A method for manufacturing a thin film transistor in which the gate portion has a structure in which a tantalum gate electrode, a tantalum oxide first gate insulating layer, and a second gate insulating layer are stacked on a substrate in this order, comprising processing and forming the tantalum gate electrode. A method for manufacturing a thin film transistor, comprising dry etching a tantalum layer formed on a substrate using a wet-etchable metal layer as a mask.