JPH01117507A - Analog type frequency converter - Google Patents
Analog type frequency converterInfo
- Publication number
- JPH01117507A JPH01117507A JP27501887A JP27501887A JPH01117507A JP H01117507 A JPH01117507 A JP H01117507A JP 27501887 A JP27501887 A JP 27501887A JP 27501887 A JP27501887 A JP 27501887A JP H01117507 A JPH01117507 A JP H01117507A
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- JP
- Japan
- Prior art keywords
- output
- input
- oscillator
- signal
- given
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 230000001360 synchronised effect Effects 0.000 claims description 32
- 230000006866 deterioration Effects 0.000 abstract description 2
- 239000000969 carrier Substances 0.000 abstract 3
- 238000006243 chemical reaction Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 238000000926 separation method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
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- Amplitude Modulation (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は1周波数変換装置に関し、特に1周波数変換さ
れた信号における入力交流信号の漏れに伴なうシ乍比あ
るいはひずみ特性の増加の改善を図ったアナログ型周波
数変換装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a one-frequency conversion device, and particularly to an improvement in the increase in the signal ratio or distortion characteristic caused by leakage of an input AC signal in a signal converted to one frequency. This invention relates to an analog frequency converter.
従来の技術
従来この稿のアナログ型周波数変換装置け1周波数変換
に掛算器を用いている。第3図に従来の一般例を示す。2. Description of the Related Art Conventionally, the analog frequency converter described in this paper uses a multiplier for frequency conversion. FIG. 3 shows a conventional general example.
@3図において、入力端子lけ、同期発振器コと、掛算
器//の入力に接続され、同期発振器コの出力は掛算器
lコの入力に接続され、掛算器/2の一方の入力に発振
器3が接続され、掛算器//の一方の入力は掛算器/ユ
の出力と接続され、出力端+6は掛算器/lの出力に接
続されている。In Figure 3, the input terminal 1 is connected to the synchronous oscillator and the input of the multiplier //, the output of the synchronous oscillator is connected to the input of the multiplier, and the output is connected to one input of the multiplier/2. An oscillator 3 is connected, one input of the multiplier // is connected to the output of the multiplier /U, and the output +6 is connected to the output of the multiplier /l.
実際に周波数変換を行なうのけ掛算器l/であり。This is a multiplier l/ that actually performs frequency conversion.
入力端子lから搬送波信号で8を入力し、掛算回路/−
より非搬送波信号fcを入力すると、出力端+6には(
ハ式に示す信号が発生する。Input 8 as a carrier wave signal from input terminal l, and apply it to the multiplication circuit/-
When the non-carrier signal fc is inputted, the output terminal +6 receives (
A signal shown in formula C is generated.
fo am K(fs −!c fc)+ Ksfs
+ Kcfc + Ko −・−・(ハ(ハ式にお
いて、には掛算器の利得定数、 Ks、 Kc。fo am K(fs -!c fc) + Ksfs
+ Kcfc + Ko −・−・(Ha (In formula Ha, are the gain constants of the multiplier, Ks, Kc.
Koはそれぞれfa、 fcおよびシステムの零オフセ
ツト定数である。(1)式の右辺第1項は周波数変換し
た出力成分であるが、右辺第一項以後は不要な出力成分
である。Ko are fa, fc and the system zero offset constant, respectively. The first term on the right side of equation (1) is a frequency-converted output component, but the parts after the first term on the right side are unnecessary output components.
発明か解決しようとする問題点
しかしながら、上述した従来の回路の場合、第3図で示
すように、掛算器を持った周波数変換回路は、搬送波信
号と非搬送波信号を入力し1周波数変換して前記搬送波
信号、非搬送波信号の和と差の信号以外に不要な搬送信
号をも発生し1本来の信号との分離が必要となる。Problems to be Solved by the Invention However, in the case of the conventional circuit described above, as shown in FIG. In addition to the sum and difference signals of the carrier signal and non-carrier signal, unnecessary carrier signals are also generated and must be separated from the original signal.
また、このような不要な搬送波信号の発生はひずみ信号
となり、 S/N比あるいはひずみを大きく低下させる
という問題がある。Further, the generation of such unnecessary carrier wave signals becomes a distorted signal, which poses a problem of greatly reducing the S/N ratio or distortion.
本発明は従来の上記実情に鑑みてなされたものであり、
従って本発明の目的は、従来の技術に内在する上記諸欠
点を除去し1本来の信号以外の不要出力を理論的に抑圧
し、 S/N比あるいはひずみ特性を著しく改善するこ
とを可能とした新規なアナログ型周波数変換装置を提供
することにある。The present invention has been made in view of the above-mentioned conventional situation,
Therefore, an object of the present invention is to eliminate the above-mentioned drawbacks inherent in the conventional technology, to theoretically suppress unnecessary output other than the original signal, and to make it possible to significantly improve the S/N ratio or distortion characteristics. An object of the present invention is to provide a new analog frequency conversion device.
問題点を解決するための手段
上記目的を達成する為に1本発明に係る周波数変換装置
は、入力端子を同期検波器の入力と同期発振器の入力に
接続し、前記同期検波器の他方の入力に前記同期発振器
の出力を接続し、前記同期検波器の出力を振幅変調器の
入力に接続し、前記振幅変調器の他方の入力に発振器の
出力を接続し。Means for Solving the Problems In order to achieve the above objects, the frequency conversion device according to the present invention connects an input terminal to an input of a synchronous detector and an input of a synchronous oscillator, and The output of the synchronous oscillator is connected to the output of the synchronous oscillator, the output of the synchronous detector is connected to the input of an amplitude modulator, and the output of the oscillator is connected to the other input of the amplitude modulator.
前記振幅変調器の出力を出力端子に接続して構成される
。The output of the amplitude modulator is connected to an output terminal.
即ち1本発明のブロック構成を117図に示す。That is, the block configuration of the present invention is shown in FIG. 117.
第1図を参照するに、入力端子lは同期検波器Jと同期
発振器コの入力に接続され、同期検波器3の他方の入力
に同期発振器−の出力が接続され。Referring to FIG. 1, an input terminal 1 is connected to the inputs of a synchronous detector J and a synchronous oscillator, and the output of the synchronous oscillator is connected to the other input of the synchronous detector 3.
同期検波器Jの出力は振幅変調6参の入力に接続され、
振幅変調6亭の他方の入力に発振器3の出力が接続され
、振幅変調器ダの出力は出力端子基に接続されている。The output of the synchronous detector J is connected to the input of the amplitude modulator 6,
The output of the oscillator 3 is connected to the other input of the amplitude modulator 6, and the output of the amplitude modulator 6 is connected to the output terminal base.
又、同期検波器3の中には低域フィルタjaも含む。Furthermore, the synchronous detector 3 also includes a low-pass filter ja.
次に木・発明の動作原理について説明すゐ。入力端子l
に。Next, I will explain the operating principle of the tree invention. Input terminal l
To.
f(t) +w Ac1 cos ωclt + Vm
cos(ωc1+a+a)t+Vmcoa(ωc1−
a+a)t ・−・−・・−曲(コ)。f(t) +w Ac1 cos ωclt + Vm
cos(ωc1+a+a)t+Vmcoa(ωc1-
a+a)t ・-・-・・-song (ko).
が入力されると、同期発振器コは、前記(ハ式の第7項
の搬送波信号のみに同期させた信号を同期検波器Jに入
力し、同期検波器3の出方には、低域フィルタJ&を通
り。is input, the synchronous oscillator A inputs a signal synchronized only to the carrier signal of the seventh term of the equation (C) to the synchronous detector J, and the output of the synchronous detector 3 is provided with a low-pass filter. Pass by J&.
AclVm1cosa+at ・・・川…・・・・
・・・・・川・・・・・・ (,7)の信号が出力さ
れ、振幅変調器ダに入力され、その信号を発振器5の搬
送波AC2cosωc2tで変調すると、振幅変調6参
の出力は。AclVm1cosa+at...river...
...... River... The signal (,7) is output and input to the amplitude modulator da, and when that signal is modulated by the carrier wave AC2cosωc2t of the oscillator 5, the output of the amplitude modulator 6 is as follows.
Ac2cos ωC2t + Vm2 cos(a+c
2+ωs)t+ Vm2 cog(ωc2−ωg)t
・・・・・1・・・…・・ (4)となり、(コ
)式と(り)式を比較すると搬送波のみが変換される。Ac2cos ωC2t + Vm2 cos(a+c
2+ωs)t+Vm2 cog(ωc2-ωg)t
...1...... (4), and when comparing equations (c) and (r), only the carrier wave is converted.
よって、前記(ハ式のような不要な成分が含まれない。Therefore, unnecessary components such as the above-mentioned formula (C) are not included.
実施例
次に本発明をその好ましい一実施例について第一図を参
照しながら具体的に説明する。EXAMPLE Next, a preferred embodiment of the present invention will be specifically explained with reference to FIG.
第1図は本発明に係るアナログ型周波数変換装置の一実
施例を示すブロック構成図である。FIG. 1 is a block diagram showing an embodiment of an analog frequency converter according to the present invention.
第1図を参照するに、同期検波器3は第1の同期検波器
7及びwXJの同期検波器tr/cより構成され、振幅
変調器ダは第1の振幅変調器9及び第一の振幅変調器1
0により構成されている。入力端子lは同期検波器り、
tと同期発振器−の入力に接続され、同期検波器り、t
の他方の入力には同期発振器コの出力で、たがいにto
”の位相差を持った1つの出力の片方ずつが接続されて
いる。同期検波器7.tの出方はそれぞれ振幅変調器t
、i。With reference to FIG. Modulator 1
Consists of 0. The input terminal l is a synchronous detector,
t is connected to the input of the synchronous oscillator, and the synchronous detector is connected to the input of the synchronous oscillator.
The other input of the oscillator is the output of the synchronous oscillator.
One output with a phase difference of
,i.
に接続され、振幅変調器1.10の他方の入力には発振
器Sの出力でたがいに900の位相差を持った一つの出
力の片方ずつが接続されている。°振幅変調器?、10
の各出力は加算器/Jに入力され、その出力は出力−子
6に接続されている。又、同期検波器り、tには、低域
フィルタクa、taが含まれている。and one output of the oscillator S having a phase difference of 900 degrees is connected to the other input of the amplitude modulator 1.10. ° Amplitude modulator? , 10
Each output of is input to an adder/J, the output of which is connected to output-child 6. Furthermore, the synchronous detector t includes low-pass filters a and ta.
ここで、入力端子lに第ダ図ωに示す搬送色信号を入力
し、バースト信号に同期させて90”の位相差をもつ1
つの搬送、波を同期検波器?、jに入力すると、第4図
(b)のように各同期検波器り、lの出力は一つの搬送
波の位相差に分解された色差信号成分のみが出方され、
搬送波は出方されない。Here, the carrier color signal shown in Fig.
Two carrier, wave synchronous detector? , j, as shown in FIG. 4(b), each synchronous detector outputs only the color difference signal component decomposed into the phase difference of one carrier wave, and
No carrier wave is emitted.
次にこの1つの出方をたがいに振幅変調器t。Next, the amplitude modulator t is applied to each other based on this one output.
l0VC入力し1発振器よよりto00位相差をもつλ
つの搬送波を振幅変調器9,10に入力して各振幅変調
*q、toを加算すると、第4図(C)のように入力端
子/に入力された搬送色信号の搬送波とは異なる搬送波
の搬送色信号に周波数を変換することができる。この結
果、理論的に不要々出力があられれない。λ with l0VC input and to00 phase difference from one oscillator
When two carrier waves are input to the amplitude modulators 9 and 10 and the respective amplitude modulations *q and to are added, as shown in FIG. 4(C), a carrier wave different from the carrier wave of the carrier color signal input to the input terminal The frequency can be converted to a carrier color signal. As a result, theoretically, the output cannot be output unnecessarily.
このようにして、非搬送波信号にもとず〈不要出力の発
生を抑止することによって、不要出力発生によるS/N
比、ひずみ特性の低下あるいは分離回路等の必要性も根
本的に排除することができる。In this way, by suppressing the generation of unnecessary output based on the non-carrier signal, S/N
It is also possible to fundamentally eliminate the need for a reduction in ratio, distortion characteristics, or a separation circuit.
発明の詳細
な説明した如く1本発明によれば1周波数変換における
不要出力の発生を理論的く排除することにより、不要出
力によるS/N比、ひずみ特性の低下を理論的に排除し
うるアナログ型周波数変換装置が実現できるという効果
が得られる。As described in detail about the invention, according to the present invention, by theoretically eliminating the generation of unnecessary output during frequency conversion, it is possible to theoretically eliminate the deterioration of S/N ratio and distortion characteristics due to unnecessary output. The effect is that a type frequency conversion device can be realized.
第1図は本発明の基本的ブロック構成図、@コ図は本発
明の一実施例を示すブロック構成図、第3図は従来にお
けるこの種の装置のブロック構成図、第4図は搬送色信
号波形と色差信号の分離・合成を示す図である。
l・・・入力端子、コ・・・同期発振器、J、?、g・
・・同期検波器、 ja、 ?a、 ta ・・・
低域フィルタ、 II。
9、lO・・・振幅変調器、!・・・発振器、6・・・
出力端子。
//、/コ・・・掛算器、/3・・・加算器特許出願人
日本電気アイジ−マイコンシステム株式会社
代 理 人 弁理士 熊 谷 雄太部第1図
第2図
第3図
第4図Figure 1 is a basic block diagram of the present invention, Figure 3 is a block diagram showing an embodiment of the present invention, Figure 3 is a block diagram of a conventional device of this type, and Figure 4 is a color conveyance diagram. FIG. 3 is a diagram showing separation and combination of a signal waveform and a color difference signal. l...input terminal, co...synchronous oscillator, J,? , g.
...Synchronous detector, ja, ? a, ta...
Low-pass filter, II. 9, lO...amplitude modulator,! ...Oscillator, 6...
Output terminal. //, /co...multiplier, /3...adder Patent applicant: NEC IG Microcomputer Systems Co., Ltd. Representative: Patent attorney Yutabe Kumagai Figure 1 Figure 2 Figure 3 Figure 4
Claims (1)
し、前記同期検波器の他方の入力に前記同期発振器の出
力を接続し、前記同期検波器の出力を振幅変調器の入力
に接続し、前記振幅変調器の他方の入力に発振器の出力
を接続し、前記振幅変調器の出力を出力端子に接続する
ことを特徴とするアナログ型周波数変換装置。An input terminal is connected to an input of a synchronous detector and an input of a synchronous oscillator, an output of the synchronous oscillator is connected to the other input of the synchronous detector, and an output of the synchronous detector is connected to an input of an amplitude modulator. , an output of an oscillator is connected to the other input of the amplitude modulator, and an output of the amplitude modulator is connected to an output terminal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62275018A JP2758599B2 (en) | 1987-10-30 | 1987-10-30 | Analog type frequency converter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62275018A JP2758599B2 (en) | 1987-10-30 | 1987-10-30 | Analog type frequency converter |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH01117507A true JPH01117507A (en) | 1989-05-10 |
JP2758599B2 JP2758599B2 (en) | 1998-05-28 |
Family
ID=17549729
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62275018A Expired - Fee Related JP2758599B2 (en) | 1987-10-30 | 1987-10-30 | Analog type frequency converter |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2758599B2 (en) |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5112378A (en) * | 1974-07-23 | 1976-01-30 | Fujitsu Ltd | KONGOGASUHATSUSEIYOBABURA |
JPS5317011A (en) * | 1976-07-30 | 1978-02-16 | Mitsubishi Electric Corp | Carrier conerter |
JPS5472912A (en) * | 1977-11-24 | 1979-06-11 | Nippon Hoso Kyokai <Nhk> | Frequency converter for vestigial side-band amplitude-modulated wave |
JPS5472913A (en) * | 1977-11-24 | 1979-06-11 | Nippon Hoso Kyokai <Nhk> | Frequency converter for vestigial side-bond amplitude-modulated wave |
JPS55149507A (en) * | 1979-05-11 | 1980-11-20 | Toshiba Corp | Synchronous detecting circuit |
JPS6177427A (en) * | 1984-09-25 | 1986-04-21 | Fujitsu Ten Ltd | Unlock detection circuit |
-
1987
- 1987-10-30 JP JP62275018A patent/JP2758599B2/en not_active Expired - Fee Related
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5112378A (en) * | 1974-07-23 | 1976-01-30 | Fujitsu Ltd | KONGOGASUHATSUSEIYOBABURA |
JPS5317011A (en) * | 1976-07-30 | 1978-02-16 | Mitsubishi Electric Corp | Carrier conerter |
JPS5472912A (en) * | 1977-11-24 | 1979-06-11 | Nippon Hoso Kyokai <Nhk> | Frequency converter for vestigial side-band amplitude-modulated wave |
JPS5472913A (en) * | 1977-11-24 | 1979-06-11 | Nippon Hoso Kyokai <Nhk> | Frequency converter for vestigial side-bond amplitude-modulated wave |
JPS55149507A (en) * | 1979-05-11 | 1980-11-20 | Toshiba Corp | Synchronous detecting circuit |
JPS6177427A (en) * | 1984-09-25 | 1986-04-21 | Fujitsu Ten Ltd | Unlock detection circuit |
Also Published As
Publication number | Publication date |
---|---|
JP2758599B2 (en) | 1998-05-28 |
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