JPH01114964A - マルチプロセッサシステムにおけるクロック同期方式 - Google Patents

マルチプロセッサシステムにおけるクロック同期方式

Info

Publication number
JPH01114964A
JPH01114964A JP62273817A JP27381787A JPH01114964A JP H01114964 A JPH01114964 A JP H01114964A JP 62273817 A JP62273817 A JP 62273817A JP 27381787 A JP27381787 A JP 27381787A JP H01114964 A JPH01114964 A JP H01114964A
Authority
JP
Japan
Prior art keywords
clock
processor
time
processors
value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62273817A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0528866B2 (enrdf_load_html_response
Inventor
Satoshi Hasegawa
聡 長谷川
Shoichiro Nakai
正一郎 中井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62273817A priority Critical patent/JPH01114964A/ja
Priority to US07/253,478 priority patent/US5041966A/en
Publication of JPH01114964A publication Critical patent/JPH01114964A/ja
Publication of JPH0528866B2 publication Critical patent/JPH0528866B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Multi Processors (AREA)
JP62273817A 1987-10-06 1987-10-28 マルチプロセッサシステムにおけるクロック同期方式 Granted JPH01114964A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP62273817A JPH01114964A (ja) 1987-10-28 1987-10-28 マルチプロセッサシステムにおけるクロック同期方式
US07/253,478 US5041966A (en) 1987-10-06 1988-10-05 Partially distributed method for clock synchronization

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62273817A JPH01114964A (ja) 1987-10-28 1987-10-28 マルチプロセッサシステムにおけるクロック同期方式

Publications (2)

Publication Number Publication Date
JPH01114964A true JPH01114964A (ja) 1989-05-08
JPH0528866B2 JPH0528866B2 (enrdf_load_html_response) 1993-04-27

Family

ID=17532972

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62273817A Granted JPH01114964A (ja) 1987-10-06 1987-10-28 マルチプロセッサシステムにおけるクロック同期方式

Country Status (1)

Country Link
JP (1) JPH01114964A (enrdf_load_html_response)

Also Published As

Publication number Publication date
JPH0528866B2 (enrdf_load_html_response) 1993-04-27

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