JPH01107171A - Noise detecting apparatus - Google Patents

Abstract

PURPOSE:To make it possible to detect the level of noises in the entire band readily with high precision with a simple, low-cost constitution, by providing a reference-signal generating circuit, a clamping circuit, an analog/digital converter circuit, a delay circuit and a comparator circuit. CONSTITUTION:A detecting apparatus detects the level of noises which are generated in a processing circuit 12 of analog signals and mixed in the output signal from the circuit 12. A reference-signal generating circuit 15 generates a periodic sawtooth reference signal whose amplitude is smaller than the maximum-input amplitude of the circuit 12. A clamping circuit 16 performs variable clamping of the reference signal in correspondence with a preset clamping level and outputs the signal to the circuit 12. An analog/digital converter circuits 19 sequentially converts the output signal of the circuit 12 into an N-bit digital signal. A delay circuit 20 delays all bits or K bits (1<=K<N) of the converted digital signal from the circuit 1 19 by the period of integer times of the reference signal and outputs the signal. A comparator circuit 21 repeats the comparison of the converted digital signal and all bits or K bits of the delayed digital signal from the circuit 20 and outputs the detected signal of the noises.

Description

[Detailed Description of the Invention] [Industrial Application Field] This invention relates to noise detection that detects the level of noise generated in a processing circuit for analog signals such as video signals and audio signals and mixed into the output signal of the processing circuit. Regarding equipment.

[Conventional technology]

Conventionally, amplifiers have been used in the fields of video equipment and audio equipment.

2. Description of the Related Art The level (magnitude) of relatively small noise such as white noise that is used in processing of video signals and audio signals in filter circuits and the like is detected.

Note that most processing circuits perform processing in an analog manner, so they are constructed from analog circuits; however, in the case of high-definition (HDTV) processing circuits, processing is performed digitally, so the first and last stages are are equipped with an analog/digital converter and a digital/analog converter, respectively.
Consists of digital circuits.

By the way, conventional detection of this type of noise often involves
This is done using an oscilloscope, for example, a video signal (composite signal) with a fixed brightness level of 50% (gray level) or a sine wave audio signal is input to the processing circuit to be detected, and the output of the processing circuit is This is done by observing the signal waveform with an oscilloscope.

On the other hand, on pages 14-10 of "Television Engineering Handbook" (edited by the Telecommunications Society, published by Ohmsha Co., Ltd.),
It is described that the level of high frequency noise mixed into a video signal is detected by a noise detection device having the configuration shown in FIG.

In the case of the detection device shown in FIG. 4, the input video signal to be detected (hereinafter referred to as input video signal) is divided into three parts by the video distribution circuit (1), the high-pass filter circuit (2), and the video signal. The input video signal is input in parallel to the level hold circuit (3) and the synchronization separation circuit (4), and from the filter circuit (2) via the level clamp preamplifier circuit (5) to the threshold detection circuit (6). A high frequency component of is output.

Further, based on the level hold of the input video signal, the hold circuit (3) forms a signal with a level of a threshold E, which is a reference for noise detection, and this signal is sent to the detection circuit (6).
is output to.

Then, only when the level of the output signal of the amplifier circuit (5) exceeds the level of the threshold value E of the output signal of the hold circuit (3), a signal is output from the detection circuit (61) to the gate circuit (7).

Furthermore, the synchronization signal I in the input video signal separated by the synchronization separation circuit (4) is transmitted from the noise gate pulse generation circuit (8) to the gate circuit (7) for a preset noise detection period for each field. Lucky gate pulse is output.

The gate circuit (7) is turned on only when the gate pulse is output from the generation circuit (8) and outputs the input signal to the counter circuit (9).
), a gate pulse having a width of a predetermined counting period within the aforementioned noise detection period is output from the counter gate pulse generating circuit (10) to the counter circuit (9), and the gate pulse is input. Only during this period, the signal output period of the gate circuit (7), that is, the signal period exceeding the threshold value E is counted by the counter circuit (9).

Therefore, during a certain period set by the counting period, the counter circuit (9) outputs a count signal for the number of times the level of the high frequency component of the input video signal exceeds the level of the threshold E to the display hold circuit (11), At this time, as the level of high-frequency noise included in the input video signal increases, the value of the count signal increases, and the number of repeated counts (total sampling number) of the counter circuit (9) for the certain period Based on the number of times of the count signal (the number of samplings exceeding the threshold value E) in 9), it is possible to calculate the level of high-frequency noise contained in the input video signal.

Therefore, for example, the hold circuit (11) calculates and displays the level of high frequency noise contained in the input video signal based on the input count signal.

[Problem that the invention seeks to solve]

By the way, as mentioned above, if you want to observe the waveform of the output signal of a processing circuit using an oscilloscope and detect relatively small noise such as white noise mixed into the output signal of the processing circuit, use the oscilloscope's high impedance detection probe. There is a problem that various external noises are easily mixed in and cannot be detected accurately.

On the other hand, when detecting noise mixed in the output signal of the processing circuit using the detection device shown in Fig. 4 instead of an oscilloscope, the above-mentioned Contamination by extraneous noise, such as when using a detection probe, is prevented.

However, when using the detection device shown in FIG. 4, the hold circuit (3) formed from the input video signal detects the threshold EG of the input video signal in an analog manner, and the generation circuit formed from the input video signal (8).

(Hold circuit (3) for detecting noise by counting the number of detections based on the gate pulse 101.

Synchronous separation circuit (4), detection circuit (6), gate circuit (7)
) 9 generation circuit +81, 001, counter circuit (9)
It requires a large number of circuits such as, making the detection device complicated and expensive, and there is a problem that it cannot be detected simply and at low cost.

In addition, in the case of the detection device shown in Fig. 4, only high frequency noise is detected by extracting the high frequency components of the filter circuit (2), so it is difficult to accurately detect noise in the entire band. , the gate pulses necessary for noise detection are formed in the generation circuits +81, +9 based on the synchronization signal in the video signal mentioned above, so that the noise generated in the processing circuit for analog signals other than video signals such as audio signals. There is a problem that detection cannot be performed.

By the way, if the processing circuit is composed of digital circuits,
First stage and final stage analog/digital converter.

A digital/analog converter allows e.g.
Noise at a certain level, where the output of a digital converter changes to all 1s or 0s, becomes larger than noise at other levels, and the level of noise mixed into the output signal of the processing circuit is the level of the output signal. That is, it varies depending on the level of the input signal to the processing circuit.

Therefore, it is desirable to detect the level of noise mixed into the output signal of the processing circuit for each of the plurality of level stages of the output signal of the processing circuit. In this case, it is difficult to detect each level, and there is also the problem that the noise level at each level cannot be detected easily and accurately.

This invention has been made with the above-mentioned problems in mind.

[Means for solving problems]

Means for solving the above problems will be explained below using FIG. 1 corresponding to the embodiment.

The present invention provides a noise detection device for detecting the level of noise generated in a processing circuit (1) of an analog signal such as a video signal or an audio signal and mixed into an output signal of the processing circuit (121). A reference signal generation circuit (15) that generates a periodic sawtooth reference signal with an amplitude smaller than the maximum input amplitude of the
), a clamp circuit (16) that performs variable clamp processing on the reference signal according to a set clamp level and outputs it to the processing circuit (f, ?J), and converts the output signal of the processing circuit 1z into an N-bit digital Analog/digital conversion circuit that sequentially converts signals (19)
and a delay circuit that delays all bits or lower bits (1≦K<N) of the converted digital signal of the conversion circuit for a period of an integral multiple of the reference signal, and outputs the converted digital signal. a comparison circuit (20) that repeatedly compares all or all bits of the delayed digital signal of the delay circuit (20) and outputs the noise detection signal;
21).

[Effect]

Therefore, according to the present invention, the periodic sawtooth-shaped reference signal of the generation circuit (15) is subjected to variable clamp processing in the clamp circuit (I6), and is transferred from the clamp circuit (16) to the processing circuit (121). A reference signal whose level changes in an arbitrary input amplitude range is output, and at this time, the output signal of the processing circuit (1) is output from the processing circuit (1) as shown in FIGS. 2(a) and 3(a), for example. It changes within an arbitrary output amplitude range, and also changes due to the inclusion of noise such as white noise generated in the processing circuit (I2).

Furthermore, the output signal of the processing circuit (121) is
) is converted into an N-bit digital signal, and is also transmitted from the conversion circuit (19) to the delay circuit (A)) and the comparison circuit (21
), the converted digital signal is output.

Then, the comparison circuit &1) compares the converted digital signal output from the conversion circuit <+91 with all bits of the delayed digital signal or the mixed signal outputted from the delay circuit (20) for a period that is an integral multiple of the period of the reference signal. The comparison of the lower level hits that fluctuates due to noise is repeated, and at this time, the mixed noise fluctuates randomly, so the comparison circuit (2
The multiplexed combined waveforms of the detection signals in 1) are shown in Figures 2(C) and 3.
As shown in Figure (C), based on the reference signal, the output signal of the processing circuit (1 匈) is the minimum hit (L) of the conversion circuit (19).
During a certain period Ta that changes by a unit level DZ corresponding to SB), the level continuously indicates the presence of noise during periods I'b and Tb' that are proportional to the level of the mixed noise.

Therefore, the detection signal of the comparator circuit (21) becomes a signal obtained by converting the noise level into time, and at this time, by measuring the lengths of the detection signal periods Ta, Tb, and Tb', DZXTb/Ta or DZXTb/Ta or Z X T b'/
The level of mixed noise can be easily (accurately) detected from the equation of T a.

Since the gate pulse for noise detection of the detection device shown in Fig. 4 is not required, there is no need to provide a synchronous separation circuit, a gate pulse generation circuit, etc. Since there is no transmission, noise can be detected in all bands with a simple and inexpensive configuration.

Further, by the variable clamping process of the clamp circuit (+6), the output signal of the processing circuit (12) can be divided into a plurality of level stages, and the noise level of each level stage can be easily and accurately detected.

Furthermore, since the aforementioned gate pulse for noise detection is not required, detection can be performed even if the output signal of the processing circuit (1) does not include a synchronization signal, and can be used to detect not only video signals but also various analog signals such as audio signals. It is possible to provide a highly versatile noise detection device that can be used for noise detection in a processing circuit.

Therefore, the technical problem is solved.

〔Example〕

Next, the present invention will be explained in detail with reference to FIGS. 1 to 3 showing one embodiment thereof.

FIG. 1 shows a case where the detection target circuit is a processing circuit that digitally processes a video signal.

An analog/digital converter and a digital/analog converter are installed at the final stage to digitally amplify the input video signal (composite signal).

Performs digital filter processing, etc.

(13) is a sawtooth signal generator provided at the front stage of the processing circuit (13), and includes, for example, a ROM that stores waveform pattern data, an address generator for reading the ROM, and Consists of a digital/analog converter that converts pattern data into an analog signal and outputs it.
A synchronizing signal is added every horizontal scanning period (hereinafter referred to as H) of the video signal, and a sawtooth signal that changes in a relatively gentle sawtooth shape is output.

(14) is an attenuator for level adjustment connected to the generator (03), which is formed by varying the output of the generator (14) with a variably set attenuation level and adjusting the amplitude of the input signal. A sawtooth reference signal is output as shown by the solid line α in Fig. 2(a) and the solid line α' in Fig. 3(a).(15) is the generator.
This is a reference signal generation circuit consisting of an attenuator (4).

(16) is a clamp circuit provided between the attenuator (14) and the processing circuit (1), and the generating circuit (15)
The lower limit level (sync chip level) of the reference signal inputted from the input terminal (17) and the clamp level of the input terminal (18) shown in FIGS. 2(b) and 3(b) Based on Cvx (x=1.2...), the clamp level Cvx (this is set variably, the input reference signal is subjected to variable clamp processing according to the clamp level Cvx, and the level change range is set variably. The signal is output to a processing circuit (one output).

(19) is an analog/digital conversion circuit provided after the processing circuit (12), which continuously repeats sampling and quantization to convert the output signal of the processing circuit (12) into N bits (N is an integer). It sequentially converts into digital signals and outputs each digital (word) as a converted digital signal.

(20) is a delay circuit to which the converted digital signal is input, and the lower bit (1
≦K<N) is formed using a bit IH delay circuit, and among all the bits (=N bits) of the converted digital signal, the lower bits are delayed by IH and output). This is a comparison circuit connected to the circuit (19) and the delay circuit (a), and consists of a two-way match/mismatch detection circuit, and it detects the lower bits and delays of the converted digital signal output from the conversion circuit (I@). I output from the circuit @Shizu
Compare the bits to the H continuous digital signal, and if the bits are exactly the same on both sides and there is no level difference between adjacent 2Hs, it is assumed that there is no noise, the output is held at O, and the bits are on both sides. If a level difference occurs between different and adjacent 2H,
Figure 2 (C) shows that the output is inverted to high level, assuming that there is noise.

The binary signal of the comparison result shown in FIG. 3(C) is repeatedly output as a noise detection signal. The wire is a noise detection device having a structure shown by a dotted line.

At the time of detection, the processing circuit (1) and the detection device are connected as shown in Figure 1 using a coaxial cable, etc. At this time, the generator repeatedly reads the pattern data from the ROM and converts it into an analog signal. , a sawtooth signal with an appropriate amplitude based on, for example, the DC level is output to the attenuator (14) for each IH.

Furthermore, the input sawtooth signal is attenuated and varied by the attenuation amount set by the operation by the attenuator α4), and from the attenuator (14) to the clamp circuit (one peak, the processing circuit 02).
A reference signal with a small amplitude of l/M (M is an arbitrary number greater than 1) of the maximum input amplitude of Become.

On the other hand, the clamp circuit (16) to which the reference signal of the attenuator (14) is input is configured to generate a clamp pulse inputted via an input terminal (1η) from a clamp pulse generation circuit (not shown) in synchronization with the reference signal. Each I shown in figure (b)
A clamp pulse Cp output during the H synchronization signal period,
The sync tip level of the input reference signal is determined based on the clamp level Cvx setting (is number, that is, the reference signal sync tip level setting signal) input from the level setting circuit (not shown) through the input terminal (18). is subjected to variable clamping processing to the clamp level Cvx, and the level change range of the reference signal is variably set to any operationally set range within the range of the maximum input level to the minimum input level of the processing circuit (12).

Then, the reference signal that has passed through the clamp circuit (country) is input to the processing circuit (1 line), and at this time, the reference signal that has passed through the processing circuit (1 line) is connected to, for example, the broken line β in FIG. 2(a).

Relatively small levels of random noise, such as white noise at the noise level indicated by the width NZ of β' or the dashed line i in Figure 3 (a) and the widths NZ and NZ' of γ', are mixed into the process. The level of the signal output from the circuit f+21 to the conversion circuit (19) is affected by the mixed noise, so the level of the signal output from the circuit f+21 varies from the solid line α in FIG.
) based on the level of the solid line α, the noise level N Z
, N Z'.

By the way, the clamp level Cvx is almost determined by the processing circuit (12
When the level Cvl is set to the level Cvl corresponding to the minimum output level of the processing circuit (12J), the level change range of the output signal of the processing circuit (12J As shown in FIG. 2(a), the clamp level Cvx falls within a relatively low level range from level Cv1 to level CV2.
(CV2>CVI), the processing circuit (1
The sync chip level of the reference signal input to the mount is CV2
As a result, the level change range of the output signal of the processing circuit (121) reaches level C as shown in FIG. 3(a).
It rises to a range from V2.

In addition, when the clamp level Cvx is set to CV2, the output signal of the processing circuit (121) is in the region of a specific level step where the noise level becomes large due to the processing circuit (121 analog/digital converter, digital/analog converter). Because the level changes, the broken line in Figure 3 (a) ?'t7''
The width increases from NZ to NZ'<NZ' )N2 months.

Furthermore, based on the setting of the gradient of the reference signal, the conversion circuit (1
The period of the specific level step in which the noise level of the input signal No. 4 becomes NZ' is longer than the period in which the input signal of the conversion circuit (19) changes by a unit level, DZ, which will be described later, due to the rise in the level of the reference signal.

The conversion circuit (I9) to which the output signal of the C1 processing circuit +121 is input is the second one corresponding to the least bit (LSB).
The unit level DZ in Figures (a) and 3(a) is set to be larger than twice the expected maximum noise level, and the input signal is sampled and quantized at intervals sufficiently smaller than IH, and N-bit The converted digital signals (parallel signals) are sequentially output.

By the way, the converted digital signal reaches its maximum value when the level of the output signal of the processing circuit (12) is Vmax, and due to relatively small level fluctuations based on the noise of the output signal of the processing circuit (121), Bits and below fluctuate.

Further, for example, in FIG. 2(a), the processing circuit (12
) When the output signal of the processing circuit (12) reaches the level of the reference signal shown by the solid line α, compared to when there is no noise, the output signal of the processing circuit (12) reaches the level of the reference signal shown by the broken line β, the converted digital signal reaches the noise level NZ = When the output signal of the processing circuit (!2) reaches the level of the broken line β', the converted digital signal changes slowly by the period corresponding to the half-width of the noise level NZ. .

Then, the converted digital signal is input to the delay circuit 120) and the comparison circuit (21), and the comparison circuit (21) outputs an IH delayed digital signal that has a lower hit of the converted digital signal.

Furthermore, the comparison circuit 821) compares the lower bit of the converted digital signal with the delayed digital signal, and at this time, the comparison circuit (2) 1) assumes that there is no noise if both have the same bit, and outputs the signal. The level is held at 0, and if the bits are different between the two, it is assumed that there is noise and the output level is inverted to high level.

Therefore, in the case of FIG. 2(a) where the output signal of the processing circuit (12) is a signal in a level range other than a specific level stage, the detection signals of each IH repeatedly output from the comparison circuit (21) are multiplexed and synthesized. Then, as shown in the same figure (C), due to the increase in the level of the reference signal, the solid line α and the broken lines β, β'
During the period Ta required for the noise level to become the unit level DZi, a high level signal indicating the presence of noise is continuously obtained during the period Tb which is proportional to the noise level NZ, and at this time, NZ=DZX'l'b /Ta holds true.

In addition, in the case of FIG. 3(a) where the output signal of the processing circuit (12) is a signal in a level range of a specific level step, the converted digital signal is at the noise level at the levels indicated by the broken lines r and γ', respectively. Before the reference signal level of the solid line α' for a period corresponding to the half width of NZ'.

In this case, if the detection signals of each IH that are repeatedly output from the comparator circuit (l) are multiplexed,
As shown in the same figure (C), the solid line α' and the broken lines r, γ'
During a certain period Ta required for the noise level NZ to change by a unit level DZ, a signal that continuously becomes high level during a period Tb' proportional to the noise level NZ' is obtained, and NZ' = DZ
xTb''Ta holds true.

That is, the detection signal of the comparison circuit &]) is a signal obtained by converting the level of white noise generated in the processing circuit - into time, and the detection signal of the comparison circuit (21) is a signal obtained by converting the level of white noise generated in the processing circuit (21) to a period Ta.
By measuring Tb and Tb', NZ=DZ
XTb/Ta, NZ'=DZxTb'/Ta(
The noise levels NZ and NZ' can be detected from Equation 0.

The lengths of the periods Ta, Tb, and Tb' are measured by using an oscilloscope, for example, and displaying the waveform of the detection signal from the comparator circuit (21) on the screen while triggering the sweep using the reference signal. In this case, the periods Ta, Tb, and Tb' are measured from the waveform obtained by superimposing the detection signals of the comparator circuit 1) for about one field or one frame visible at a time due to the afterimage effect.

Then, the detection signal of the comparison circuit (21) is detected by the processing circuit (1).
2) Regardless of the level of the output signal, the binary value changes greatly depending on the presence or absence of noise, so the continuity of periods Tb and Tb can be clearly displayed on the screen without being affected by external noise, etc. By accurately measuring Ta, Tb, and Tb', the noise levels NZ and NZ' can be detected with high precision.

By the way, in the case of the detection device shown in Figure %1, the generation circuit (15
) to the processing circuit (12) via the clamp circuit (I6).
), a sawtooth reference signal having an amplitude smaller than the maximum input amplitude of the processing circuit (12) is supplied to the processing circuit (12) with the level change range arbitrarily set by variable clamp processing based on the variable clamp level Cvx; Conversion circuit Q9+
The p delay circuit e20) is used to convert the output signal of the processing circuit (12) into a digital signal using the comparator circuit (21), and compares the lower bits of the digital signal and the LH-delayed digital signal to determine the noise level. Since the configuration is configured to obtain a detection signal converted into time, there is no need for a gate pulse for noise detection in the detection device shown in Figure 4, and an input signal amplification circuit, a synchronous separation circuit, a gate pulse generation circuit, etc. The detection device can be formed easily and inexpensively, and the noise level can be detected easily and inexpensively.

Moreover, since the filter circuit (2) in Fig. 4 is not used,
The noise level NZ of the entire band can be detected.

Furthermore, based on the variable clamp processing of the clamp circuit (16), it is possible to detect the noise level of each level stage of the output signal of the processing circuit (121). It is possible to easily and accurately detect the state of the noise level of the processing circuit, which increases at a specific level step.

In addition, all bits of the converted digital signal of the conversion circuit θ9) are delayed in the delay circuit side, and the comparison circuit 1) converts both circuits (
19) j All bits of the digital signal (20) (=N
The same effect as above can be obtained by comparing bits), but
In the case of Figure 1, only the lower bits of the digital signals of both circuits (19) 9020) are compared, so compared to the case where all bits are compared, the delay circuit example and comparison circuit (2
The configuration of 1) is simplified, and the configuration of the detection device 0η is significantly simpler and cheaper.

By the way, it goes without saying that the above-mentioned 'N bits' and bits can be arbitrarily set depending on the noise level NZ, NZ', etc.

In addition, the noise level of the processing circuit (!) can be detected in any amplitude range by adjusting the amplitude of the reference signal based on the adjustment of the attenuation amount of the attenuator (14) and adjusting the clamp level CVx of the clamp circuit (16). Of course, if the unit level DZ of the conversion circuit (19) can be set variable at this time, for example, when the noise level becomes higher than the expected level,
By increasing the unit level DZ and reducing the resolving power of the conversion circuit (19), the period Ta is extended and the periods Ta and Tb can be measured, making it possible to detect noise levels in a wide level range.

Furthermore, the periods Ta and T of the detection signal of the comparison circuit f211
The noise level can also be automatically detected by automatically measuring b and Tb using, for example, a counter instead of using an oscilloscope.

Since the synchronization signal in the output signal of the processing circuit OXO is not used to detect the noise level, even if the 1f processing circuit (121) is replaced with an analog processing circuit other than a video signal such as an audio signal, the same It is possible to provide a highly versatile noise detection device.

In the case of the above embodiment, the video signal processing circuit (121
In order to apply this method, the reference signal of the generation circuit (15) is a video signal format signal with a synchronization signal added, but when it is applied to an audio signal processing circuit, etc., a synchronization signal etc. may be added. In this case, it goes without saying that the period length of the reference signal can be set arbitrarily.

On the other hand, it goes without saying that the generator ++3) can be formed by a sawtooth signal generator of various configurations, and the attenuator (14) may be omitted from the generator circuit (15).

In addition, the delay time on the delay circuit side is set to an arbitrary period that is an integral multiple of the period of the reference signal such as multiple H, and the output signal of the conversion circuit (19) shifted by an integral multiple of the period of the reference signal and the delay circuit side Of course, the same effect as in the embodiment can be obtained by comparing all bits or the lower bits of the output signal.

〔Effect of the invention〕

As described above, according to the noise detection device of the present invention, the periodic sawtooth reference signal of the reference signal generation circuit is subjected to variable clamp processing by the clamp circuit and supplied to the processing circuit, and the output signal of the processing circuit is arbitrarily controlled. It is variable in the amplitude range of
A converted digital signal formed by digitally converting the output signal of a processing circuit.

The converted digital signal is delayed by an integral multiple of the period of the reference signal, and all bits or lower bits of the delayed digital signal are repeatedly compared, and the noise level of white noise generated in the processing circuit is converted to RfM1. By outputting it as a detection signal, it is possible to easily and accurately detect the level of noise such as white noise in all bands with a simple and inexpensive configuration. The level of noise introduced into the output signal can be detected for each of a plurality of level steps of the output signal of the processing circuit, e.g. It is a highly versatile noise detection device because it can easily and accurately detect the state of the noise level at the level stage, and it can also detect processing circuits for various analog signals such as video signals and audio signals. This is something that can be provided.

[Brief explanation of the drawing]

? Fig. 7J1 is a block diagram of one embodiment of the noise detection device of the present invention, Figs. 2(a) to (C), and Figs. 3(a) to (C).
) is a waveform diagram for explaining the operation of FIG. 1, and FIG. 4 is a block diagram of an example of a conventional noise detection device. (1)...Processing circuit, (15)...Reference signal generation circuit, (I6)...Clamp circuit, (+91...Analog/digital conversion circuit, (20)...Delay circuit, i2
1... Comparison circuit.

Claims (1)

[Claims] (1) In a noise detection device that detects the level of noise generated in a processing circuit for analog signals such as video signals and audio signals and mixed into the output signal of the processing circuit, the period has an amplitude smaller than the maximum input amplitude of the processing circuit. a reference signal generation circuit that generates a sawtooth reference signal; a clamp circuit that performs variable clamp processing on the reference signal according to a set clamp level and outputs it to the processing circuit; and a clamp circuit that outputs the output signal of the processing circuit to the processing circuit. an analog/digital conversion circuit that sequentially converts into an N-bit digital signal; and an analog/digital conversion circuit that converts all bits or lower K bits (1≦K<N) of the converted digital signal of the conversion circuit into a period that is an integral multiple of the reference signal. and a comparison circuit that repeatedly compares the converted digital signal with all the bits or the K bits of the delayed digital signal of the delay circuit and outputs the noise detection signal. Characteristic noise detection device.