JPH01106678A - Solid-state image pickup element - Google Patents

Abstract

PURPOSE:To obtain a sensitivity-variable solid-state image pickup element by outputting charges obtained at respective photoelectric converting parts by means of the exposure of one time in dividing them into plural times, thin ning out the portion of arbitrary times by means of a transfer gate, and transferring-synthesizing the remaining charges to an integrator at a high speed. CONSTITUTION:An integrator 18 accumulates the charges by 1 frame obtained by a photoelectric converter 10 continuously in 1 field period. Next, the charges are outputted one by one for 1 field through a transfer gate 20 with a clock pulse phi2 and transferred through a transfer gate 21 to each vertical register 16 of an accumulating part 19. The charges are transferred to the register 16 and a horizontal transferring part 17 with clock pulses phi6 and phi7 and outputted from a terminal 22. At such a time, gates 20 and 15 are alternately opened and closed by a prescribed timing and by casting off the charges through a drain 14 when the gate 20 is closed and the gate 15 is opened, the charges can be arbitrarily thinned out. Thus, the sensitivity of the solid-state image pickup can be made variable.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a solid-state imaging device such as a COD (charge-coupled device), and particularly to a solid-state imaging device in which the sensitivity of a solid-state imaging probe can be varied.

(Prior Art) Solid-state imaging devices such as COD have been used as photoelectric conversion devices in various television cameras and electronic still cameras. Signal charges obtained by photoelectric conversion are converted into two-phase or four-phase
By sequentially transferring and reading the signals using phase clock pulses, a video signal corresponding to the imaging light is output.

For example, the interline type COD is as shown in Figure 3.
It is composed of an imager section 3 consisting of photoelectric conversion sections 1 and vertical transfer sections 2 arranged alternately, and a horizontal transfer section 4, and the signal charge obtained in the photoelectric conversion section 1 is transferred from a drive circuit 5. The supplied clock pulse CP causes the signal to be swept out via the vertical transfer section 2 and the horizontal transfer section 4.

Further, in such a COD, unnecessary charges are picked up and removed via an A-buff flow drain provided above the imager section 3.

(Problems to be Solved by the Invention) Incidentally, in the interline type COD as described above, a predetermined portion of the charges obtained in the photoelectric conversion section 1 by one exposure is transferred through the overflow drain. By discarding the light, the actual exposure time can be varied, and thereby the shutter speed of this COD can be varied.

However, when the shutter speed is varied by such a method, the image becomes stroboscopic, which is undesirable, especially when a fast-moving subject is photographed.

Therefore, there has been a demand for improvement in this respect.

In addition, in such a COD, there is a third direction in which unnecessary charges are transferred through the overflow drain.
(lower direction in the figure) is the original sweeping direction (upper direction in figure 3)
This is not desirable because it is in the opposite direction.

(Means for Solving the Problems) - The present invention has been made in view of the above-mentioned actual circumstances, and is a solid-state material that can vary the sensitivity and always keep the direction of charge transfer constant. The purpose is to provide an image element.

In order to achieve this object, the present invention, as shown in FIG. The imager section 1 is connected to the vertical transfer section 11.
2, and each photoelectric conversion unit 10 transferred from this imager unit 12
an integrator 13 that temporarily accumulates and synthesizes charges from the imager section 12, and a drain 1 that is provided on the output side of the imager section 12 and discards unnecessary charges transferred from the imager section 12.
4, a transfer gate 15 for selectively controlling the transfer of the charge transferred from the imager section 12 to the integrator 13 or the drain 14, and a transfer gate 15 for outputting the charge swept out from each of the integrators 13 as a video signal. vertical register 16 and horizontal transfer section 17
The charge obtained in each photoelectric conversion unit 10 by one exposure is divided into multiple times (after being swept to the vertical transfer unit 11,
The charges swept out in multiple times are discarded from the drain 14 via the transfer gate 15 and thinned out arbitrarily, and the remaining charge is transferred to the drain 14 in time for the charge to be swept out from the horizontal transfer section 17. The object of the present invention is to provide a solid-state image carrier characterized in that the sensitivity can be varied by transferring and combining signals to each integrator 13 at high speed.

(Function) In the solid-state IID image element having the above-described configuration, the charges swept out from the photoelectric conversion section 10 are appropriately thinned out and transferred to the drain 14 as shown in FIG. 2(B) or FIG. 2(C).
The sensitivity of this type of solid-state image sensing device can be arbitrarily varied by discarding it through the .

By performing this thinning method, for example, evenly, it is possible to take a natural photograph without creating a strobe-like image even when fdl is particularly used for a fast-moving subject.

Also, the location where this drain 14 is installed is as shown in image 1.
Since the charge is on the output side of the section 12, the transfer direction is constant whether the charge is transferred to the integrator 13 or left from the drain 14.

(Example of Actual Droplet) Hereinafter, a preferred embodiment of the solid-state imaging device according to the present invention will be described in detail with reference to FIGS. 1 and 2.

FIG. 1 shows the application of the present invention to a frame interline type COD.
9 and a horizontal transfer section 17.

Also, an integrator section 1 which is the output side of the imager section 12
A transfer gate 15 is provided between the 8 and the storage section 19;
A drain 14 is provided.

The imager section 12 includes a plurality of photoelectric conversion sections 10 arranged in the vertical direction corresponding to each pixel, and each photoelectric conversion section 10.
The vertical transfer section 11 provided between the photoelectric converters 10 and Divide into vertical transfer section 11! , +1 is output and transferred at high speed.

Further, the horizontal width dimension of the vertical transfer section 11 is formed to be narrower than the width dimension of the photoelectric conversion section 10, so that the area occupied by the vertical transfer section 11, which is connected to the imager section 12, is smaller than that of the photoelectric conversion section 10. This is sufficiently smaller than the area occupied by the conversion section 10.

Therefore, the aperture ratio in this COD is extremely large by "C" compared to the conventional one.

The integrator section 18 is configured to include a plurality of integrators 13 corresponding to each of the photoelectric conversion sections 10, and these integrators 13 are transferred from each vertical transfer section 11 in a plurality of times. After the incoming charges are once accumulated and synthesized, they are swept out at qa using a four-phase clock pulse φ2.

Note that the transfer or sweeping out of charge to each integrator 13 is controlled by a transfer gate 20 controlled by a clock pulse φ3 and a transfer gate 15 controlled by a11 by a clock pulse φ4.

1. That is, when transferring the charge to each integrator 13, the transfer gate 20 is opened and the other transfer gates 1 to 15 are closed, whereby the charge is transferred to the predetermined integrator 13. Ru.

On the other hand, when the charge is discarded via the drain 14, the transfer gate 20 is opened, and
The other transfer gate 15 is opened so that the charge is discarded via the drain 14.

Further, the transfer of the discharged charge to the storage section 19 is as follows.
Other transfer 1 gates 15 and clock pulse φ
The transfer is controlled by other transfer gates 21 controlled by 5.

In the mode, the electric charge swept out from each integrator 13 of the integrator section 18 is transferred to 4 through the transfer gate 21.
Phase clock pulse φ6. The signal is output from the output terminal 22 as a video signal via the vertical register 16 and the horizontal transfer section 17, which are each driven by φ7.

In the COD configured as described above, the charges obtained by photoelectrically converting the imaging light in each photoelectric converter 10 are divided into multiple times and transferred to each adjacent one by a predetermined localization method as shown in FIG. 2(A). It is swept out to the vertical transfer section 11.

Note that this scanning method is not only possible by mixing the upper and lower pixels and then sweeping them out, but also by sweeping all pixels as they are, and by changing the combination of the upper and lower pixels, interlaced sweeping is also possible. .

Further, the vertical transfer section 11 performs transfer at a high speed of about 1000 a (60 kt-1z), assuming that the sweeping speed from the horizontal transfer section 17 is 1/60 second.

As a result, the area of this vertical transfer section 11 becomes smaller than that of the photoelectric conversion section 1.
Even if the area is smaller than the area of Since all the charges can be sufficiently transferred to the integrator 13, and the amount of charges transferred in the - times is reduced, the vertical transfer section 11 is driven by the two-phase clock pulse φ1 as described above. I can do J゛.

While one load is transferred from the vertical transfer section 11, the transfer gate 20 is opened, the other transfer gate 15 is closed, and each integrator 13 is placed in the hold mode. Therefore, the transferred charges are once accumulated and combined in each integrator 13.

This integrator section 18 continues such volume synthesis for 1/60 seconds (one field period), and after the accumulation of charges for one frame obtained in the photoelectric conversion section 10 is completed, , the charges accumulated through the 1-transfer gate 20 are returned to the storage unit via the transfer gate 21 so as to be interlaced one field at a time at a high transfer rate using the clock pulse φ2. 19 vertical registers 16.

Then, the transferred charges are transferred to the clock pulse φ6.
The data is transferred through the vertical register 1G and the horizontal transfer unit 17 at φl, and is outputted one field at a time from the output terminal 22.

As described above, in the COD according to this embodiment, the area occupied by the vertical transfer section 11 in the image V section 12 can be made sufficiently small, so that the frontage ratio of this COD can be increased.

Furthermore, by increasing the transfer speed from the vertical transfer section 11 to each integrator 13, the number of transfer charge ports in the vertical transfer section 11 can be increased, so the dynamic range of this COD can also be expanded. .

Further, while charges are being transferred from the vertical transfer section 11, each of the integrators 13 is placed in the hold mode, and the transfer gate 20 and other transfer gates 15 are opened and closed at a predetermined timing with alternating current. By discarding the charges transferred through the drain 14 while the transfer gates 1 to 20 are closed and the other transfer gates 15 are closed, charges obtained by one exposure are generated. can be arbitrarily thinned out, thereby making it possible to arbitrarily vary the sensitivity of this COD.

For example, see Figure 2 (B) for this thinning method.
Among the charges swept out from the photoelectric conversion unit 10, as shown in FIG. All you have to do is thin them out evenly.

Furthermore, according to this embodiment, as described above, the aperture ratio of the image V section 12 can be increased to improve the sensitivity, so that sufficient charge can be obtained even when the exposure time is extremely short. As a result, CO according to this example can be
By using D, the image quality of frame still reproduction can be further improved.

Also, since the dynamic range of this COD is large,
Even when BHI was applied to a bright subject with a long exposure time, clear images without smear or blooming were obtained.

(Effects of the Invention) As is clear from the above description, according to the present invention, the sensitivity of the solid-state 8&element can be varied by appropriately thinning out the charges returned from the photoelectric conversion section, and the sensitivity of the solid-state 8 & element can be varied. Even when photographing a subject, it is possible to take a natural photograph.

Further, by varying the method of thinning out the charges while keeping the amount of charge discarded the same, it is possible to substantially vary the shutter speed without reducing sensitivity.

Furthermore, the direction of charge transfer can be made the same when the charges are swept out and when they are discarded from the drain.

[Brief explanation of the drawing]

Fig. 1 is a diagram schematically showing an embodiment of the solid-state 11υ image element according to the present invention, Fig. 2 is a diagram schematically showing charge sweep-out, and Fig. 3 is a diagram schematically showing a conventional example. It is. 10... Photoelectric conversion section, 11... Vertical transfer section, 12.
... Image V section, 13... Integrator, 14... Drain, 15... Transfer gate (other transfer gate-1-), 16... Vertical register, 17... Horizontal transfer section. Atmosphere

Claims (1)

[Scope of Claims] An imager section including a photoelectric conversion section that photoelectrically converts imaging light corresponding to each pixel, and a vertical transfer section that transfers charges swept out from these photoelectric conversion sections; an integrator for temporarily accumulating charges from each photoelectric conversion unit; a drain provided on the output side of the imager unit to discard unnecessary charges transferred from the imager unit; and a drain for discarding unnecessary charges transferred from the imager unit; It is equipped with a transfer gate that selectively controls transfer to an integrator or drain, and a vertical register and horizontal transfer section for outputting the charge swept out from each integrator as a video signal, and performs each photoelectric conversion by one exposure. After dividing the charge obtained in the section into multiple times and sweeping it out to the vertical transfer section, the charge at an arbitrary time that is swept out in these multiple times is discarded from the drain via the transfer gate and arbitrarily thinned out. . A solid-state imaging device characterized in that the sensitivity is varied by transferring remaining charges to each of the integrators at high speed and combining them in time for sweeping out from the horizontal transfer section.