JPH01106520A - Bipolar logic circuit - Google Patents

Abstract

PURPOSE:To realize high speed operation by conducting transiently a 3rd transistor(TR) in response to the current supplied to an output terminal via a 1st TR, conducting a 4th TR attended therewith to discharge rapidly the base storage charge of a 2nd TR. CONSTITUTION:When a potential at an output terminal 4 changes from a low level to a high level, that is, the 1st TRs 11, 12 are conductive and the 2nd TR 15 is nonconductive, the 3rd TR 23 is conductive transiently in response to the current supplied to the load capacitor of the output terminal 4 via the 1st TRs 11, 12. Since the 4th TR 26 is conductive attended therewith, the base storage charge of the 2nd TR 15 is discharged rapidly by using the 4th TR 26 as a discharge path. Thus, the turn-off time of the 2nd TR 15 is shortened.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to logic circuits, and in particular, for example, ALST T
L (AdVanCe -Low power 5ch
ottky Transistor-Transist
This relates to the improvement of the output circuit of the Logic or Logic.

[Conventional technology]

Conventionally, as this type of ALSTTL, for example, °87 Mitsubishi Semiconductor Data Book Bipolar Digital IC<AL
The one shown in page 2-9 of ed. STTL is known.

FIG. 2 is a circuit diagram showing an inverter which is a conventional logic circuit described in this document. In the figure, 1 is a terminal for connecting a high potential power supply, 2 is a terminal for connecting a low potential power supply, 3 is an input terminal, and 4 is a terminal for connecting a low potential power supply. is the output terminal.

The base of a pnp transistor 5 is connected to the input terminal 3, the emitter of this pnp transistor 5 is connected to the high potential power supply connection terminal 1 through the resistor 6, and the collector is connected to the low potential power supply connection terminal 2. There is.

7 is an npn transistor with a Schottky barrier diode (hereinafter referred to as 5BDnpn transistor) that conducts in response to conduction of pnρn transistor 9; its base is connected to the emitter of pnp transistor 5, and its collector is connected to a high potential power supply via resistor 8. It is connected to the connection terminal 1. Reference numeral 9 denotes a 5BDnpnt-transistor which becomes conductive in response to the conduction of the 5BDnpn transistor 7. Its base is connected to the emitter of the 5BDnprl transistor, and its collector is connected to the high potential power supply connection terminal 1 via a resistor 10.

11 and 12 are each 5s connected to Darlington
They are an onpn transistor and an npnt transistor, and can be equivalently considered as one transistor element.
5BDnl)n is turned on in response to the non-conduction of the transistor 9, and is used to selectively connect the output terminal 4 to the high potential side. The emitter of the npn transistor 12 is connected to the output terminal 4, and the collectors of the 5sonpnt transistor 11 and the npn transistor 12 are connected to each other and connected to the high potential power supply connection terminal 1 via a resistor 13. A resistor 14 is connected between the base of the npnl transistor 12 and the output terminal 4, and is configured to discharge excess charge in the base of the npn transistor 12 through the resistor 14.

15 is a 5BDnpn transistor that becomes conductive in response to the conduction of the 5BDnpn transistor 9 and selectively connects the output terminal 4 to the low potential side, and its base is connected to the 5BDnpn transistor 9.
The emitter of the npn transistor 9 is connected to the output terminal 4, and the emitter is connected to the low potential power supply connection terminal 2.

16 is a Schottky barrier diode (hereinafter referred to as SBD) for extracting the base charge when the 5BDnpn transistor 9 is inverted from a conductive state to a non-conductive state; its anode is connected to the base of the 5BDnpn transistor 9, and its cathode is connected to the input Connected to terminal 3.

17 discharges the charge stored in the capacitive load of the output terminal 4 when the potential of the output terminal 4 is inverted from high level to low level,
This is an SBD for supplying the base current of the BDnpn transistor 15.

Reference numeral 18 denotes a 58D npn transistor that constitutes a discharge path from which the base charge is drawn out when the 5BD npn transistor 15 is inverted from a conductive state to a non-conductive state, and its base and collector are connected to the 5BD npn transistor 15 through resistors 19 and 20, respectively.
Emitter of BDnprl transistor 9 and 5BDnprl
It is connected to the connection point with the base of the transistor 15, and its emitter is connected to the low potential power supply connection terminal 2.

21 and 22 are SBDs for human output clamps that prevent the internal circuit from malfunctioning when the input terminal 3 and output terminal 4 become negative potentials due to noise, and 5BD2
The cathode of 5F3D22 is connected to the input terminal 3, the cathode of 5F3D22 is connected to the output terminal 4, and the anodes of both are connected to the low potential power supply connection terminal 2, respectively.

Next, the operation of the circuit configured as above will be explained. First, when a high level signal is input from the input terminal 3 to the base of the pnp transistor 5, the pnp transistor 5 becomes non-conductive, and as a result, the 5BDnpn transistor 7.9.15 becomes conductive and sucks current from the output terminal 4. , the potential of the output terminal 4 becomes low level. At this time, since the collector potential of 5BDnl)n transistor 9 decreases, 5BDnpr+transistor 11 and np
The nt-transistor 12 is in a non-conducting state.

Also, at this time, a part of the emitter current of the 5sonpρ transistor 9 is given as the base current of the 5BDnpn transistor 18, so the 5BDnpn transistor 18
becomes conductive, and thereby the excess current from the 5BDnpn transistor 9 is discharged from the 5BDnpn transistor 18, and the 5BDnpn transistor 15 is prevented from being overdriven.

On the other hand, when a low level signal is input from the input terminal 3 to the base of the pnp transistor 5, the pnp transistor 5 becomes conductive, and as a result, 5BDnpn transistor 7.9
．． 15 becomes non-conductive.

At this time, the charge accumulated in the base of the 5BDnpn transistor 9 is extracted to the input terminal 3 side through the 5BD16, so that the turn-off time of the 5BDnprl transistor 9 is accelerated. Along with this, the collector potential of the 5BDnpnt- transistor 9 rises, so the 5BDnon transistor 11 and the npn transistor 12 become conductive. Therefore, a current is supplied from the high potential power supply connection terminal 1 to the output terminal 4 via the resistor 13, and the potential of the output terminal 4 becomes high level. Further, even after the base current supply to the 5BDnpn transistor 15 is stopped at this time, the 5BDnDn transistor 18 continues to be conductive for a short time due to the accumulated charge in its base, so that this 5BDnpn
The accumulated charge at the base of the 5BDnpn transistor 15 is discharged using the n transistor 18 as a discharge path, thereby speeding up the turn-off time of the 5BDnpn transistor 15.

[Problem that the invention seeks to solve]

In the conventional bipolar logic circuit as described above, when the potential of the output terminal 4 changes from a low level to a high level, that is, when the 5BDnpn transistor 15 changes from a conductive state to a nonconductive state, the 5sonpn transistor 9 is connected to the base of the 5BDnpn transistor 18. 5BDnp with no current supply from the base and only the base accumulated charge.
Since the configuration barely ensures conduction of the n transistor 18, the base storage f]i of the 5BDnpn transistor 15
The charge cannot be discharged quickly, and therefore 5
The effect of reducing the turn-off time of the BDnpn transistor 15 is not sufficiently improved, and as a result, the 5BDnpn transistor 1
There was a problem in that the output waveform could not rise sharply due to the transient current flowing through 5, and the high speed of input/output low/high propagation speed was somewhat inhibited.

The present invention has been made to solve these problems, and an object of the present invention is to provide a bipolar logic circuit in which the output waveform has a steep rise and can operate at higher speed.

[Means for solving problems]

The bipolar logic circuit according to the present invention is connected between a high potential point and an output terminal, and is connected between a high potential point and an output terminal.

A first transistor is connected between a low potential point and an output terminal, and is connected between a low potential point and an output terminal, and is made conductive in response to a high designation of a signal that designates high and becomes non-conductive in response to a low designation of a signal. , a second transistor that becomes conductive in response to a low designation of a signal that designates high and becomes non-conductive in response to a high designation, and a current value supplied to the output terminal through the first transistor. A third transistor is connected between the base of the second transistor and the low potential point and is conductive only during a relatively large period of time, and is conductive in response to conduction of the third transistor and non-conductive in response to non-conduction of the third transistor. A fourth transistor that becomes conductive is provided.

[Effect]

The third transistor in the present invention is used when the potential of the output terminal changes from a low level to a high level, that is, the third transistor
When the second transistor becomes conductive and the second transistor becomes non-conductive, the fourth transistor becomes conductive transiently in response to the current value supplied to the load capacitance of the output terminal through the first transistor, and accordingly, the fourth transistor becomes conductive and the fourth transistor becomes conductive. Since the transistor becomes conductive, the charge stored in the base of the second transistor is rapidly discharged using the fourth transistor as a fiffi path, and the turn-off time of the second transistor is shortened.

〔Example〕

FIG. 1 is a circuit diagram showing an embodiment of a bipolar logic circuit according to the present invention, in which 1 to 17.21°22 are the same as the conventional circuit described above. 23 is a pnp transistor (
880 n p n transistor 1 with Darlington connection, whose base can be equivalently considered as one transistor (first transistor)
1 and the collector of the npn transistor 12, its emitter is connected to the high potential power supply connection terminal 1 via a resistor 24, and its collector is connected to the 5B terminal via a resistor 25.
It is connected to the base of the Dnpn transistor 26 (fourth transistor) and is configured to become conductive in response to the conduction of the 5BDnprl transistor 11 and the npn transistor 12. Also 5BDnpn transistor 2
The base of 6 is connected to the low potential power supply connection terminal 2 via the resistor 27.
and its collector is connected to 5BDn through a resistor 28.
It is connected to the base of a pn transistor 15 (second transistor), its emitter is connected to the low potential power supply connection terminal 2, and is configured to become conductive in response to conduction of the pnp transistor 23. The other configurations are similar to the conventional circuit shown in FIG.

Next, the operation of the circuit configured as above will be explained. First, when a high-level signal is input from the input terminal 3 to the base of the pnpt transistor 5, the pnp transistor 5 becomes non-conductive, as in the conventional circuit, and as a result, the pnp transistor 5 becomes non-conductive.
BDnpn transistors 7.9 and 15 are rendered conductive, and the potential of output terminal 4 becomes low level. At this time 5BDn
Since the collector potential of the pn transistor 9 decreases, the Darlington-connected 5BD npn transistor 11 and n p n can be equivalently regarded as one transistor.
The l-transistor 12 becomes non-conductive.

Therefore, at this time, no current flows through the resistor 13 and the potential at point A, that is, the base potential of the pnp transistor 23 does not decrease, so the pnp transistor 23 becomes non-conductive. Therefore, S B D n l) n +- transistor 2
6 is also in a non-conducting state.

Next, when a low level signal is input to the base of the pnp transistor 5 from the input terminal 3, the pnp transistor 5 becomes conductive as in the conventional circuit, and as a result, 5BDnpn
Transistor 7.9.15 turns non-conducting. At this time, since the collector potential of the 5aonpn transistor 9 rises, the 5BDnpn transistor 11 and the npn
Transistor 12 becomes conductive. Therefore, a current is supplied from the high potential power supply connection terminal 1 to the output terminal 4 via the resistor 13, and the potential of the output terminal 4 becomes high level.

At the beginning of this transient state, the resistor 13 is connected to the output terminal 4.
Since a relatively large II current flows to charge the negative direction of the current, the voltage drop causes a relatively large drop in the potential at point A, that is, the base potential of the pnp transistor 23.

That is, the resistance value of the resistor 13 is set to the current value of R1 to 1. pnp
Transistor 230 base-emitter [If the pressure is vBE, then IxR>VBE, which makes the pnp transistor 23 conductive,
The 88Dnpn transistor 26 receives the collector current at its base and becomes conductive. Therefore, the base accumulated charge of the 5aonpn transistor 15 is rapidly discharged through the 5BDnpn transistor 26, and the turn-off time of the 5BDnprl transistor 15 is significantly shortened. That is, the transient current flowing through the 5Bonpn transistor 15 decreases, and at this time the output waveform rises sharply from a low level to a high level.

As the capacitive load of the output terminal 4 is charged, the resistor 13
When the current rii flowing through decreases, the potential at point A increases and eventually the pnp transistor 23 becomes non-conductive, and therefore the 5BDnpn transistor 26 also becomes non-conductive. In this way, the 5BDnpn transistor 26 operates only in a transient state in which the output terminal 4 changes from low level to high level, and does not affect other operations.

(Effects of the Invention) As explained above, according to the present invention, when the output terminal changes from low level to high level, the third transistor responds to the current value supplied to the output terminal via the first transistor.
Since the second transistor is highly conductive, the fourth transistor is accordingly conductive, and the charge accumulated in the base of the second transistor is rapidly discharged, so that the turn-off time of the second transistor is fast. In other words, it is possible to obtain a bipolar logic circuit in which the output waveform has a steep rise and can operate at higher speed.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of a bipolar logic circuit according to the present invention, and FIG. 2 is a circuit diagram showing a conventional bipolar logic circuit. In the figure, 1 is a high potential power supply connection terminal, 2 is a low potential power supply connection terminal, 4 is an output terminal, and 11 and 12 are Darlington-connected 5BDn as first transistors.
pn transistor and npn transistor, 15 is 5
a second transistor consisting of a BDnpn transistor;
23 is a third transistor made of a pnp transistor, and 26 is a fourth transistor made of a 5BDnpn transistor. Note that the same reference numerals in each figure indicate the same or corresponding parts. Fig. 1 26 --- 4th/) Transk

Claims (2)

[Claims] (1) A bipolar logic circuit that performs low and high logic output by selectively connecting the output terminal to either a low potential point or a high potential point according to a signal specifying low or high of the output terminal. connected between the high potential point and the output terminal, a row of the output terminal;
A first transistor is connected between the low potential point and the output terminal, and is connected between the low potential point and the output terminal, and the first transistor becomes conductive in response to a high designation of a signal that designates high, and becomes non-conductive in response to a low designation of the signal. A second terminal that becomes conductive in response to a low designation of a signal that designates a low or high terminal, and becomes non-conductive in response to a high designation.
a third transistor that is conductive only while the current value supplied to the output terminal via the first transistor is relatively large; and between the base of the second transistor and the low potential point. a fourth transistor connected to the fourth transistor, which becomes conductive in response to conduction of the third transistor, and becomes non-conductive in response to non-conduction of the third transistor. (2) The third transistor has an emitter connected to the high potential point via a resistor, a base connected to the high potential point via a resistor connected between the high potential point and the first transistor, and a collector connected to the high potential point via a resistor connected between the high potential point and the first transistor. Claim 1, which is a pnp transistor connected to the base of the fourth transistor.
Bipolar logic circuit described in section.