JPH01103968U - - Google Patents
Info
- Publication number
- JPH01103968U JPH01103968U JP19928387U JP19928387U JPH01103968U JP H01103968 U JPH01103968 U JP H01103968U JP 19928387 U JP19928387 U JP 19928387U JP 19928387 U JP19928387 U JP 19928387U JP H01103968 U JPH01103968 U JP H01103968U
- Authority
- JP
- Japan
- Prior art keywords
- reference level
- output
- shading distortion
- signal
- white
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 3
- 238000003705 background correction Methods 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
Landscapes
- Facsimile Image Signal Circuits (AREA)
Description
第１図は本考案の実施例を示すブロツク図、第
２図はシエーデイング歪補正用の基準信号を発生
する構成例を示すブロツク図、第３図及び第４図
は基準レベルの更新の様子を示す説明図、第５図
ａ，ｂは画像入力部の概略平面図及び概略断面図
、第６図は従来のシエーデイング補正を説明する
ための模式図である。
２……Ａ／Ｄ変換器、１０……ビデオアンプ、
１１〜１５……ＲＯＭ、１６……アドレス線、２
１……原稿、２２……紙送りローラ、２３……原
稿照明光源、２４……一次元イメージセンサ。
Fig. 1 is a block diagram showing an embodiment of the present invention, Fig. 2 is a block diagram showing an example of a configuration for generating a reference signal for correcting shedding distortion, and Figs. 3 and 4 show how the reference level is updated. 5A and 5B are a schematic plan view and a schematic sectional view of an image input section, and FIG. 6 is a schematic diagram for explaining conventional shading correction. 2...A/D converter, 10...video amplifier,
11-15...ROM, 16...Address line, 2
1... Document, 22... Paper feed roller, 23... Original illumination light source, 24... One-dimensional image sensor.
Claims (1)
メモリ手段からの白基準レベルと画像信号との間
の演算によりシエーデイング歪補正を行う演算手
段と、原稿挿入前に前記白基準レベルとして一定
の基準レベルを前記メモリ手段に設定し原稿挿入
後は前記演算手段の出力に基づき前記一定の基準
レベルを順次更新する手段とを設けたことを特徴
とするシエーデイング歪補正回路。 ２ 実用新案登録請求の範囲第１項記載の一定の
基準レベルは、該一定の基準レベルを用いて画像
読取装置のゴムローラ部をシエーデイング歪補正
したとき黒信号を出力し、白紙をシエーデイング
歪補正したとき白信号を出力する値であることを
特徴とするシエーデイング歪補正回路。[Scope of Claim for Utility Model Registration] 1. A memory means for setting a white reference level, a calculation means for correcting shading distortion by calculating between the white reference level from the memory means and an image signal, and A shading distortion correction circuit characterized in that the circuit further comprises means for setting a constant reference level in the memory means as the white reference level, and sequentially updating the constant reference level based on the output of the calculating means after the document is inserted. . 2. The certain reference level stated in Paragraph 1 of Claims for Utility Model Registration is such that when the rubber roller part of the image reading device is corrected for shading distortion using the certain reference level, a black signal is output, and a blank sheet is corrected for shading distortion. A shading distortion correction circuit characterized in that the value is such that a white signal is output when the signal is output.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19928387U JPH0535646Y2 (en) | 1987-12-28 | 1987-12-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19928387U JPH0535646Y2 (en) | 1987-12-28 | 1987-12-28 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01103968U true JPH01103968U (en) | 1989-07-13 |
| JPH0535646Y2 JPH0535646Y2 (en) | 1993-09-09 |
Family
ID=31489741
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19928387U Expired - Lifetime JPH0535646Y2 (en) | 1987-12-28 | 1987-12-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0535646Y2 (en) |
-
1987
- 1987-12-28 JP JP19928387U patent/JPH0535646Y2/ja not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0535646Y2 (en) | 1993-09-09 |
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