JPH01103061A - Signal link error rate monitor system - Google Patents
Signal link error rate monitor systemInfo
- Publication number
- JPH01103061A JPH01103061A JP26056687A JP26056687A JPH01103061A JP H01103061 A JPH01103061 A JP H01103061A JP 26056687 A JP26056687 A JP 26056687A JP 26056687 A JP26056687 A JP 26056687A JP H01103061 A JPH01103061 A JP H01103061A
- Authority
- JP
- Japan
- Prior art keywords
- error rate
- reference value
- rate reference
- signal link
- state
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 claims description 8
- 238000012544 monitoring process Methods 0.000 claims description 8
- 230000011664 signaling Effects 0.000 claims description 7
- 230000004044 response Effects 0.000 abstract 3
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 230000005856 abnormality Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000002452 interceptive effect Effects 0.000 description 1
Abstract
Description
【発明の詳細な説明】
1里匁1
本発明は信号リンク誤り率監視方式に関し、特にプログ
ラム蓄積方式の電子交換機に用いられる共通線信号方式
において当該共通線信号リンクの正常性の判定を行う信
号リンク誤り率監視方式に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a signal link error rate monitoring system, and particularly to a signal for determining the normality of a common line signal link in a common line signaling system used in a program storage type electronic exchange. Related to link error rate monitoring method.
11亘薯
従来のこの種の信号リンク誤り率監視方式では、正常性
の判定をなすための誤り率基準値は予め定められた所定
の一定値に固定されている。In this type of conventional signal link error rate monitoring system, the error rate reference value for determining normality is fixed at a predetermined constant value.
この様に、従来方式では判定基準となる誤り率基準値が
固定された一定の値となっているために、当該一定基準
でしか共通線信号リンクの正常性を判定することができ
ない。そのために、共通線信号方式により接続されたネ
ットワークの種々の状態に合わせて誤り率基準値を調整
できず、その結果過喰に共通線信号リンクの異常を検出
し過ぎることが生じて、回線の運用に支障をきたすとい
う欠点がある。In this way, in the conventional system, since the error rate reference value serving as the determination criterion is a fixed constant value, the normality of the common line signal link can only be determined based on the fixed standard. For this reason, it is not possible to adjust the error rate reference value according to the various conditions of networks connected by the common line signaling method, and as a result, abnormalities in the common line signaling link are overdetected, resulting in line failure. It has the disadvantage of interfering with operation.
1■匁■潰
そこで、本発明はかかる従来のものの欠点を解決すべく
なされたもので、その目的とするところは、ネットワー
クの状態に応じて誤り率基準値を設定可能な信号リンク
誤り率監視方式を提供することにある。1 ■ Momme ■ Failure Therefore, the present invention was made to solve the drawbacks of the conventional ones, and its purpose is to provide a signal link error rate monitor that can set an error rate reference value according to the network condition. The goal is to provide a method.
■tW感
本発明によれば、電子交換機に用いられる共通信号方式
において、共通信号リンクの正常性の判定を行う信号リ
ンク誤り率監視方式であって、前記正常性の判定のため
の誤り$基準値を外部指示に応じて設定自在に構成した
ことを特徴とする信号リンク誤り率監視方式が得られる
。■tW feeling According to the present invention, there is provided a signal link error rate monitoring method for determining the normality of a common signal link in a common signaling system used in an electronic exchange, and an error $ standard for determining the normality. A signal link error rate monitoring method is obtained, which is characterized in that values can be freely set according to external instructions.
実施例 以下に図面を用いて本発明の詳細な説明する。Example The present invention will be described in detail below using the drawings.
第1図は本発明の実施例のブロック図である。FIG. 1 is a block diagram of an embodiment of the invention.
図において、本発明の実施例による共通線信号回路1は
、共通線信号方式のデータリンク制御レベルの機能を有
し、以下の構成からなる。誤り率基準値を任意に選定し
て設定可能なスイッチ手段2と、中央制御装置3と、デ
ータ記ifi装旧4と、回線インタフェース5とからな
り、この回線インタフェース5により共通線信号リンク
6とのインタフェースが可能となっている。In the figure, a common line signal circuit 1 according to an embodiment of the present invention has a function at the data link control level of the common line signaling system, and has the following configuration. It consists of a switch means 2 that can arbitrarily select and set an error rate reference value, a central control unit 3, a data recording device 4, and a line interface 5. interface is possible.
当該共通線信号回路1において、共通線信号リンク6か
らの信号が受信されると、回線インタフェース5を介し
てこの受信信号が中央制御装置3へ導入される。この中
央制御装置3において受信信号の正常性が周知の方式に
より判定されることになる。When the common line signal circuit 1 receives a signal from the common line signal link 6, this received signal is introduced to the central control unit 3 via the line interface 5. In this central control device 3, the normality of the received signal is determined by a well-known method.
この判定により、誤りがな【ノれば記憶装置4内に設け
られている誤りカウンタ部7(第2図参照)の減算が行
われる。もし、受信信号に誤りが検出されれば、当該誤
りカウンタ部7の加算が行われ、この誤りカウンタ部7
の値と誤り率基準値メモリ部8(第2図゛)に格納され
ている誤り率基準値とが比較される。この時、誤りカウ
ンタ部7の値が誤り率基準値を越えていれば、誤り過多
と判定されることになる。As a result of this determination, if there is no error, the error counter section 7 (see FIG. 2) provided in the storage device 4 is subtracted. If an error is detected in the received signal, addition is performed in the error counter section 7;
The value is compared with the error rate reference value stored in the error rate reference value memory section 8 (FIG. 2). At this time, if the value of the error counter unit 7 exceeds the error rate reference value, it is determined that there are too many errors.
ここで、中央制iII装置3は誤り率基準値設定用のス
イッチ手段2の状!!!(例えば、第3図に示す如く、
スイッチのオンオフ状態に応じて番号110 IIから
“F″までの状態を定期的に監視しており、その都度記
憶装置4内の誤り率基準値テーブル9(第2図)から読
出されたスイッチ番号に対応する誤り率基準値を、記憶
装置4内の誤り率基準値メモリ部8へ格納して設定する
。スイッチ手段2の状態が切替えられる度にそれに対応
した誤り率基準値をテーブル9から読出してメモリ部8
へ格納するのである。よって、回線状態に応じてメモリ
手段2の状態を外部より切替え制御すれば、それに応じ
た誤り率基準値が変更されることになるので、回線の運
用がスムーズどなるものである。Here, the central control III device 3 is in the state of the switch means 2 for setting the error rate reference value! ! ! (For example, as shown in Figure 3,
The status of numbers 110 II to "F" is periodically monitored according to the on/off status of the switch, and each time the switch number is read from the error rate reference value table 9 (FIG. 2) in the storage device 4. The error rate reference value corresponding to the error rate reference value is stored and set in the error rate reference value memory section 8 in the storage device 4. Every time the state of the switch means 2 is changed, the corresponding error rate reference value is read out from the table 9 and stored in the memory section 8.
It is stored in . Therefore, if the state of the memory means 2 is switched and controlled from the outside in accordance with the line state, the error rate reference value is changed accordingly, so that the line can be operated smoothly.
尚、第3図に、スイッチ手段2の状態番号と、誤り率基
準値の例を示しており、右欄の数は共通信号線リンク6
の初期設定時の値であり、中欄は通常動作時のそれであ
る。Incidentally, FIG. 3 shows an example of the state number of the switch means 2 and the error rate reference value, and the numbers in the right column are for the common signal line link 6.
This is the initial setting value, and the middle column is the value during normal operation.
発明の効果
叙上の如く、本発明によれば、スイッチ手段により信号
リンクの誤り率監視のための判定基準値を所望に変化自
在としているので、回線の運用に支障をきたすことなく
、共通線信号方式により接続されたネットワークの形態
に応じて最も適した誤り率基準値を設定可能となるとい
う効果がある。Effects of the Invention As described above, according to the present invention, since the criterion value for monitoring the error rate of the signal link can be changed as desired by the switch means, the common line can be switched without causing any trouble to the operation of the line. This has the effect that it is possible to set the most suitable error rate reference value according to the form of the network connected by the signaling system.
第1図は本発明の実施例のブロック図、第2図は第1図
の記憶装置の内部を示す図、第3図はスイッチ番号と誤
り率基準値の一例を示すテーブルである。
主要部分の符号の説明
2・・・・・・スイッチ手段
3・・・・・・中央制m装置
4・・・・・・記憶装置
6・・・・・・共通線信号リンク
7・・・・・・誤りカウンタ部
8・・・・・・誤り率基準値メモリ部
9・・・・・・誤り率基準値テーブルFIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a diagram showing the inside of the storage device shown in FIG. 1, and FIG. 3 is a table showing an example of switch numbers and error rate reference values. Explanation of symbols of main parts 2...Switch means 3...Central control device 4...Storage device 6...Common line signal link 7... Error counter section 8 Error rate reference value memory section 9 Error rate reference value table
Claims (1)
号リンクの正常性の判定を行う信号リンク誤り率監視方
式であつて、前記正常性の判定のための誤り率基準値を
外部指示に応じて設定自在に構成したことを特徴とする
信号リンク誤り率監視方式。A signal link error rate monitoring method for determining the normality of a common signal link in a common signaling system used in electronic exchanges, wherein the error rate reference value for determining the normality can be freely set according to external instructions. A signal link error rate monitoring method characterized in that it is configured as follows.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP26056687A JPH01103061A (en) | 1987-10-15 | 1987-10-15 | Signal link error rate monitor system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP26056687A JPH01103061A (en) | 1987-10-15 | 1987-10-15 | Signal link error rate monitor system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01103061A true JPH01103061A (en) | 1989-04-20 |
Family
ID=17349728
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP26056687A Pending JPH01103061A (en) | 1987-10-15 | 1987-10-15 | Signal link error rate monitor system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01103061A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100374877B1 (en) * | 2000-06-21 | 2003-03-06 | 주식회사 하이닉스반도체 | MESSAGE MONITORING METHOD OF No.7 BLOCK IN MOBILE COMMUNICATION EXCHANGER |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5485616A (en) * | 1977-12-20 | 1979-07-07 | Nec Corp | Automatic circuit test system |
JPS57190438A (en) * | 1981-05-18 | 1982-11-24 | Nec Corp | Processing system for digital line fault information |
JPS6248165A (en) * | 1985-08-27 | 1987-03-02 | Fujitsu Ltd | Simultaneous incoming supervisory system |
-
1987
- 1987-10-15 JP JP26056687A patent/JPH01103061A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5485616A (en) * | 1977-12-20 | 1979-07-07 | Nec Corp | Automatic circuit test system |
JPS57190438A (en) * | 1981-05-18 | 1982-11-24 | Nec Corp | Processing system for digital line fault information |
JPS6248165A (en) * | 1985-08-27 | 1987-03-02 | Fujitsu Ltd | Simultaneous incoming supervisory system |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100374877B1 (en) * | 2000-06-21 | 2003-03-06 | 주식회사 하이닉스반도체 | MESSAGE MONITORING METHOD OF No.7 BLOCK IN MOBILE COMMUNICATION EXCHANGER |
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