JPH01101010A - Voice modulation circuit - Google Patents

Voice modulation circuit

Info

Publication number
JPH01101010A
JPH01101010A JP62258652A JP25865287A JPH01101010A JP H01101010 A JPH01101010 A JP H01101010A JP 62258652 A JP62258652 A JP 62258652A JP 25865287 A JP25865287 A JP 25865287A JP H01101010 A JPH01101010 A JP H01101010A
Authority
JP
Japan
Prior art keywords
circuit
frequency
oscillation
modulation
normal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62258652A
Other languages
Japanese (ja)
Inventor
Junichi Fukutani
淳一 福谷
Terumoto Akatsuka
輝元 赤塚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62258652A priority Critical patent/JPH01101010A/en
Publication of JPH01101010A publication Critical patent/JPH01101010A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To always apply a feedback and to correct the dislocation of a central frequency by adding a PLL circuit and a loop filter circuit composed of ICs for a PLL to an LC generating type FM modulation circuit composed of a mixer circuit and a VCO circuit, and forming an APC circuit. CONSTITUTION:At the time of a phase more advancing than the value of a normal oscillation frequency, an error signal is obtained from a phase comparator 21. The error signal passes a loop filter 34, and the voltages of both edges of a variable capacity diode 36 are lowered. Thus, the central frequency is lowered, and it approaches the value of the normal oscillation frequency. To the contrary, at the time of a lagging phase, the voltages of both edges of the variable capacity diode 36 is raised in the same work. Thus, the central frequency is also increased, and it approaches the normal value. In such a way, by feeding back the dislocation of the central frequency of the oscillation, the correct oscillation frequency can be always obtained.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、ベースバンドの音声信号をFM変調して出力
する、VTRやCATV用コンバータなどの機器に関す
るものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to equipment such as VTRs and CATV converters that FM modulates and outputs baseband audio signals.

従来の技術 従来、RFモジュレータに用いられる音声変調回路51
は、第3図に示すように、発振周波数をLCまたはSA
W発振回路52のLCの定数またはSAW発振子によっ
て決定させる方式をとっていた。
2. Description of the Related Art Conventionally, an audio modulation circuit 51 used in an RF modulator
As shown in Figure 3, the oscillation frequency is set to LC or SA.
A method was adopted in which the LC constant of the W oscillation circuit 52 or the SAW oscillator was used.

発明が解決しようとする問題点 上記のような従来の構成では、温度変化などの外的要因
が加わることにより、発振周波数が変化するため、4.
5M Hz±I KH2の範囲内の安定度を達成するこ
とは不可能であるという問題点を有していた。
Problems to be Solved by the Invention In the conventional configuration as described above, the oscillation frequency changes due to the addition of external factors such as temperature changes.
The problem was that it was impossible to achieve stability within the range of 5 MHz±I KH2.

本発明の音声変調回路は、上記従来の問題点を解決する
もので、温度変化などの外的変化に対しても発振周波数
が変化しない音声変調回路を提供することを目的とする
ものである。
The audio modulation circuit of the present invention solves the above-mentioned conventional problems, and aims to provide an audio modulation circuit whose oscillation frequency does not change even with external changes such as temperature changes.

問題点を解決するための手段 上記問題点を解決するために本発明の音声変調回路は、
ミキサ回路とVCO回路よりなり、音声信号をFM変調
するLC発振型FM変調回路に、PLL回路およびルー
プフィルタを付加してAPC回路を形成したものである
Means for Solving the Problems In order to solve the above problems, the audio modulation circuit of the present invention has the following features:
An APC circuit is formed by adding a PLL circuit and a loop filter to an LC oscillation type FM modulation circuit, which is composed of a mixer circuit and a VCO circuit, and performs FM modulation of an audio signal.

作用 上記構成により、VCO回路の発振の中心周波数が正規
の周波数より高い場合、APC回路により、VCO回路
の同調電圧を下げ、それにより発振周波数が低くな、す
、中心周波数が低い方に移動し、逆に、正規の周波数よ
り低い場合、APC回路により、VCO回路の同調電圧
を上げ、それにより発振周波数が高くなり、中心周波数
が高い方に移動する。このように、VCO回路の発振の
中心周波数のずれが常にフィードバックされるため、温
度変化などの外的要因に封する安定度もよく、常に正規
の中心周波数で変調回路が動作する。さらに、PLL回
路の比較基準信号は水晶振動子を用いているため、正確
な周波数安定度が得られる。
Effect With the above configuration, when the center frequency of oscillation of the VCO circuit is higher than the normal frequency, the APC circuit lowers the tuning voltage of the VCO circuit, thereby lowering the oscillation frequency and moving the center frequency to a lower side. , Conversely, if the frequency is lower than the normal frequency, the APC circuit increases the tuning voltage of the VCO circuit, thereby increasing the oscillation frequency and moving the center frequency to a higher side. In this way, the shift in the center frequency of the oscillation of the VCO circuit is constantly fed back, so the stability against external factors such as temperature changes is good, and the modulation circuit always operates at the normal center frequency. Furthermore, since the comparison reference signal of the PLL circuit uses a crystal resonator, accurate frequency stability can be obtained.

実施例 以下本発明の一実施例について図面にもとづいて説明す
る。
EXAMPLE An example of the present invention will be described below based on the drawings.

第1図番よ本発明の一実施例を示すAPC方式を用いた
音声変調回路の回路図である。第1図において、音声信
号が入力する音声入力端子1は抵抗2とコンデンサ3の
それぞれの一端に接続され、抵抗2の他端はコンデンサ
4の一端と抵抗5の一端に接続され、コンデンサ4の他
端はトランジスタ6のベースと抵抗7の一端に接続され
、トランジスタ6のエミッタは抵抗8の一端に接続され
、抵抗5,7.8とコンデンサ3の他端は接地され、ま
た、トランジスタ6のコレクタはトランスの1次コイル
9の一端に接続され、電源端子10は抵抗11を介して
トランジスタ6のベースに接続されて、音声信号のミキ
サ回路14を構成している。
FIG. 1 is a circuit diagram of an audio modulation circuit using the APC method, showing an embodiment of the present invention. In FIG. 1, an audio input terminal 1 to which an audio signal is input is connected to one end of a resistor 2 and a capacitor 3, and the other end of the resistor 2 is connected to one end of a capacitor 4 and one end of a resistor 5. The other end is connected to the base of transistor 6 and one end of resistor 7, the emitter of transistor 6 is connected to one end of resistor 8, the other end of resistor 5, 7.8 and capacitor 3 is grounded, and the other end of transistor 6 is connected to one end of resistor 7. The collector is connected to one end of the primary coil 9 of the transformer, and the power terminal 10 is connected to the base of the transistor 6 via a resistor 11, forming an audio signal mixer circuit 14.

また、電源端子10は抵抗12.13を介して接地され
、抵抗12と13の接続点はトランスの1次コイル9の
他端に接続されている。
Further, the power supply terminal 10 is grounded through resistors 12 and 13, and the connection point between the resistors 12 and 13 is connected to the other end of the primary coil 9 of the transformer.

トランスの2次コイル15−@は接地され、他端はコン
デンサ16を介してPLL回路17に接続される。PL
L回路17は水晶振動子18の出力を分周するリファレ
ンスカウンタ19と、変調周波数の中心周波数に応じた
分周比をセットするプログラマブルカウンタ20と、リ
ファレンスカウンタ19とプログラマブルカウンタ20
のそれぞれの出力を位相比較する位相比較器21よりな
り、プログラマブルカウンタ20にトランスの2次コイ
ル15の出力が入力される。
A secondary coil 15-@ of the transformer is grounded, and the other end is connected to a PLL circuit 17 via a capacitor 16. P.L.
The L circuit 17 includes a reference counter 19 that divides the output of the crystal oscillator 18, a programmable counter 20 that sets a division ratio according to the center frequency of the modulation frequency, and the reference counter 19 and the programmable counter 20.
The output of the secondary coil 15 of the transformer is input to a programmable counter 20.

位相比較器21の出力端子は抵抗22.23を介してト
ランジスタ24のベースに接続され、抵抗22と23の
接続点はコンデンサ25を介して接地され、トランジス
タ24のエミッタはトランジスタ26のベースに接続さ
れるとともに抵抗27を介して接地され、さらに電源端
子28は抵抗29を介してトランジスタ24のコレクタ
に接続されるとともに抵抗30.31を介してトランジ
スタ26のコレクタに接続され、抵Fc30と31の接
続点は抵抗32とコンデンサ33の直列回路を介してト
ランジスタ24のベースに接続され、トランジスタ24
のエミッタは接地されて、ループフィルタ回路34が構
成されている。
The output terminal of the phase comparator 21 is connected to the base of a transistor 24 via resistors 22 and 23, the connection point between the resistors 22 and 23 is grounded via a capacitor 25, and the emitter of the transistor 24 is connected to the base of a transistor 26. Furthermore, the power supply terminal 28 is connected to the collector of the transistor 24 via a resistor 29 and to the collector of the transistor 26 via a resistor 30.31. The connection point is connected to the base of the transistor 24 via a series circuit of a resistor 32 and a capacitor 33.
The emitter of is grounded to form a loop filter circuit 34.

抵抗30ど31の接続点は抵抗35を介して可変容量ダ
イオード36のカソードとコンデンサ37に接続され、
可変容量ダイオード36のアノードは接地され、さらに
コンデンサ37の他端はコンデンサ38を介してトラン
レスの1次コイル9の他端に接続されてVCO回路39
を構成している。このとき、トランジスタ6のコレクタ
・エミッタ間およびエミッタ・接地間にそれぞれコンデ
ンサ40および41が介装され、VCO回路・39とミ
キサ回路14をトランスの1次コイル9で結合してF’
M変調を行う際の発振の安定を図っている。
The connection point between the resistors 30 and 31 is connected to the cathode of the variable capacitance diode 36 and the capacitor 37 via the resistor 35.
The anode of the variable capacitance diode 36 is grounded, and the other end of the capacitor 37 is connected to the other end of the transformerless primary coil 9 via a capacitor 38 to connect the VCO circuit 39.
It consists of At this time, capacitors 40 and 41 are interposed between the collector and emitter of the transistor 6 and between the emitter and ground, respectively, and the VCO circuit 39 and the mixer circuit 14 are coupled by the primary coil 9 of the transformer to F'
This is aimed at stabilizing oscillation when performing M modulation.

すなわち、本発明は、第2図のブロック図に示すように
ミキサ回路14とVCO回路39とにより構成されるL
C発振型FM変調回路42にPLL用ICからなるPL
L回路17およびループフィルタ回路34を付加してA
PC回路を形成したものであり、LC発振型FM変調回
路42の発振の中心周波数のずれに対して、常にフィー
ドバックをかけ、中心周波数のずれを補正することがで
きるように構成されている。
In other words, the present invention provides an L
A PL consisting of a PLL IC is installed in the C oscillation type FM modulation circuit 42.
A by adding the L circuit 17 and the loop filter circuit 34
It is formed of a PC circuit, and is configured to constantly apply feedback to the deviation in the center frequency of the oscillation of the LC oscillation type FM modulation circuit 42, and to be able to correct the deviation in the center frequency.

次に、上記構成による作用を説明する。まず、PLL回
路17のプログラマブルカウンタ20に、変調周波数の
中心周波数に応じた分周比をセットする。■CO回路3
9の可変容量ダイオード36の両端に電圧が印加印され
、この電圧によって可変される容量とトランスとで発振
周波数を中心に音声信号でFM変調される。この変調信
号は再びPLL回路17のプログラマブルカウンタ20
に入力される。
Next, the effect of the above configuration will be explained. First, a frequency division ratio corresponding to the center frequency of the modulation frequency is set in the programmable counter 20 of the PLL circuit 17. ■CO circuit 3
A voltage is applied across the variable capacitance diode 36 of No. 9, and the capacitance varied by this voltage and the transformer perform FM modulation of the audio signal around the oscillation frequency. This modulation signal is again sent to the programmable counter 20 of the PLL circuit 17.
is input.

ここで正規の一発振周波数に対して中心周波数がずれて
いた場合のことを考える。
Let us now consider the case where the center frequency deviates from the normal one-oscillation frequency.

まず、正規の発振周波数の値より進み位相の場合(中心
周波数が高い場合)、位相比較器21より誤差信号が出
力され、この誤差信号はループフィルタ34を通り、可
変容量ダイオード36の両端の電圧が下がり、これによ
って中心周波数も低くなり、正規の発振周波数の値に近
づく。逆に、遅れ位相(中心周波数が低い)場合、同様
な作用で可変容量ダイオード36の両端の電圧が上がり
、これによって中心周波数も高くなり、正規の値に近づ
く。
First, if the phase is ahead of the normal oscillation frequency value (if the center frequency is high), an error signal is output from the phase comparator 21, this error signal passes through the loop filter 34, and the voltage across the variable capacitance diode 36 is decreases, and as a result, the center frequency also decreases, approaching the value of the normal oscillation frequency. Conversely, when the phase is delayed (the center frequency is low), the voltage across the variable capacitance diode 36 increases due to the same effect, and the center frequency also becomes high and approaches the normal value.

このように発振の中心周波数のずれをフィードバックす
ることにより、常に正しい発振周波数が得られる。なお
、RF信号の出力は、■CO回路39とミキサ回路14
からなるLC発振型FM変調回路42と、PLL回路2
2のプログラマブルカウンタ24との閂からコンデンサ
43を介して出力端子44に取り出される。
By feeding back the shift in the center frequency of oscillation in this way, the correct oscillation frequency can always be obtained. Note that the output of the RF signal is from ■CO circuit 39 and mixer circuit 14.
LC oscillation type FM modulation circuit 42 consisting of
The signal is taken out from the link between the programmable counter 24 of No. 2 and the output terminal 44 via the capacitor 43.

また、ミキサ回路14とVCO回路39からなるLC発
振型FM変調回路42、ループフィルタ34、およびP
LL回路17を1チツプICに収納し、さらに合理化し
たモデルを供給することもできる。
Further, an LC oscillation type FM modulation circuit 42 consisting of a mixer circuit 14 and a VCO circuit 39, a loop filter 34, and a P
It is also possible to house the LL circuit 17 in one chip IC and provide a more streamlined model.

具体例な数値をあげれば、下記の条件でFM変調が可能
となる。
To give specific numerical values, FM modulation is possible under the following conditions.

1、中心周波数 fa = 4.5M1−1z±1KH
z2、最大周波数偏移 ±75K(ゴ2 3、変調信号範囲 301−1z 〜100K 1−1
z 。
1. Center frequency fa = 4.5M1-1z±1KH
z2, maximum frequency deviation ±75K (Go2 3, modulation signal range 301-1z ~ 100K 1-1
z.

発明の効果 以上本発明によれば、LL発振型FM変調回路にPLL
回路およびループフィルタ回路を付加してAPC回路を
形成したことにより0、中心周波数のずれに対して常に
フィードバックをか【プることができる。しかも、水晶
発振子と中心周波数とを比較するため、水晶発振子なみ
の周波数安定度が得られる。また、周波数のずれが常に
フィードバックされるため、温度変化などの外的要因に
対する安定度もきわめて良く、はぼ無調整で使用できる
Effects of the Invention According to the present invention, a PLL is added to the LL oscillation type FM modulation circuit.
By forming an APC circuit by adding a circuit and a loop filter circuit, it is possible to constantly provide feedback to deviations in the center frequency. Furthermore, since the center frequency of the crystal oscillator is compared, frequency stability comparable to that of a crystal oscillator can be obtained. In addition, since the frequency deviation is constantly fed back, it has excellent stability against external factors such as temperature changes, and can be used without any adjustment.

【図面の簡単な説明】[Brief explanation of the drawing]

m1図は本発明の一実fIi例を示すAPC方式を用い
た音声変調回路の回路図、第2図は同音声変調回路のブ
ロック図、第3図は従来のFM変調回路のブロック図で
ある。 14・・・ミキサ回路、17・・・PLL回路、34・
・・ループフィルタ回路、39・・・VCO回路、42
・・・LC発振型FM変調回路。 代理人   森  木  八  弘 第2図 第3図
Figure m1 is a circuit diagram of an audio modulation circuit using the APC method showing an example of the present invention, Figure 2 is a block diagram of the same audio modulation circuit, and Figure 3 is a block diagram of a conventional FM modulation circuit. . 14...Mixer circuit, 17...PLL circuit, 34...
...Loop filter circuit, 39...VCO circuit, 42
...LC oscillation type FM modulation circuit. Agent Yahiro MorikiFigure 2Figure 3

Claims (1)

【特許請求の範囲】[Claims] 1、ミキサ回路とVCO回路よりなり、音声信号をFM
変調するLC発振型FM変調回路に、PLL回路および
ループフィルタを付加してAPC回路を形成した音声変
調回路。
1. Consists of mixer circuit and VCO circuit, converts audio signal to FM
An audio modulation circuit in which an APC circuit is formed by adding a PLL circuit and a loop filter to an LC oscillation type FM modulation circuit.
JP62258652A 1987-10-14 1987-10-14 Voice modulation circuit Pending JPH01101010A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62258652A JPH01101010A (en) 1987-10-14 1987-10-14 Voice modulation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62258652A JPH01101010A (en) 1987-10-14 1987-10-14 Voice modulation circuit

Publications (1)

Publication Number Publication Date
JPH01101010A true JPH01101010A (en) 1989-04-19

Family

ID=17323231

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62258652A Pending JPH01101010A (en) 1987-10-14 1987-10-14 Voice modulation circuit

Country Status (1)

Country Link
JP (1) JPH01101010A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05286694A (en) * 1992-04-07 1993-11-02 Kanden Kogyo Kk Construction method and crane for assembling external type steel tower

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05286694A (en) * 1992-04-07 1993-11-02 Kanden Kogyo Kk Construction method and crane for assembling external type steel tower

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