JPH01100944A - Method of designing wiring pattern and wiring structure - Google Patents

Abstract

PURPOSE:To suppress vibration mode, by using vibration pattern data of resonance mode corresponding to a resonance frequency for determining a position of a through hole to be added so that the through hole is provided at a position where vibration amplitude of the resonance mode is the maximum. CONSTITUTION:Initial wiring lay-out (1) in a dielectric substrate and a planar integrated circuit is divided and classified into groups each having the same potential (being connected) in series (2). Resonance mode and a resonance frequency are calculated for each wiring thus divided and classified (3), and it is determined whether the calculated resonance frequency is present in the operating frequency band of the circuit (4). If the resonance frequency is present in that band, the corresponding wiring lay-out is corrected in accordance with data of vibration amplitude data of the subject resonance mode (5). If the resonance frequency is not present in the band, the lay-out is outputted as the final result (6).

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention provides a method for designing a wiring pattern for an electric circuit.
The present invention relates to a wiring layout design method and wiring structure for suppressing parasitic electrical signals from circulating through wiring.

(Prior art) Conventional wiring pattern design methods for electrical circuits do not include consideration of the mechanism of parasitic electrical signal looping through wiring, so when a circuit is mounted on a board designed using this method, This may lead to deterioration of circuit characteristics and even instability of operation. In addition, if the circuit characteristics deteriorate or the operation becomes unstable due to prototype production, there is no accurate guideline for correcting the ground plane layout to improve it, so it is difficult to find the optimal solution. The drawback was that it was impossible to design.

(Object of the Invention) In order to solve these drawbacks, the object of the present invention is to focus on the fact that the wrap-around of electrical signals through wiring, especially through the ground plane, is caused by a mechanism via vibration and resonance of the ground plane potential. Another object of the present invention is to provide a wiring pattern design method and wiring structure that eliminate ground plane resonance points from the operating frequency band of a circuit.

(Means for solving the problem) Regarding the wiring layout of the dielectric substrate and brainer structure integrated circuit, (a) The initial wiring is made into a set of (connected) wiring that has the same DC potential. (b) Calculate the resonance mode and resonance frequency for each wiring classified into nine divisions; (c) Determine whether the calculated resonance frequency exists within the operating frequency band of the circuit; (d) If the resonant frequency exists within the band as a result of the judgment in (c), modify the corresponding wiring layout based on the vibration amplitude information of that resonance mode, return to (b), and (e) As a result of c), if the resonant frequency does not exist within the band, the corresponding layout is considered the final result and the operation is finished, and the wiring pattern has a through hole that penetrates the board at the position where the vibration amplitude of the resonant mode is maximum. to have.

(Function) The position of the through hole to be added is determined using the vibration pattern information of the resonant mode corresponding to the resonant frequency, and by providing the through hole at the location where the vibration amplitude of the resonant mode is the largest, the vibration mode to suppress.

(Example) Figure 1 shows an example of the method of designing wiring patterns for electric circuits of the present invention, in which 1 is an initial wiring layout designed with constraints such as physical dimensions in advance, and 2 is a division of wiring. 9 classification, ground plane extraction section, 3 is the resonance mode of the ground plane extracted in 2, resonance frequency calculation section, 4 is the resonance frequency calculated in 3. Does it fall within the operating frequency band of the circuit? 5 is a layout correction section when it is determined in 4 that the resonant frequency falls within the operating frequency band of the circuit, and 6 is the final evaluated and designed wiring pattern layout.

FIG. 2 is a structure of a wiring board to which this embodiment is applied, which is used to explain the operation and effects of the embodiment shown in FIG. This is an example wiring pattern layout of an alumina substrate for mounting a broadband amplifier integrated circuit chip. The amplifier is designed with a gain of 30 (dB) and an operating frequency band of up to 5 (GHz). In the diagram, 7 is the signal input/output wiring that supplies electrical signals to the integrated circuit chip, and 8 is the power ground for the integrated circuit chip. 9 is the ground plane of 8.
This is a through hole for connecting to the back side of the board to lower the grounding impedance. 9 integrated circuit chips
If the initial wiring layout of 1 in Fig. 1 is the wiring layout of 0 or more placed on the surface where the through holes are made, then the wiring division 1 classification of 2 in Fig. 1 and the ground plane The extraction unit classifies the wiring layout shown in FIG. 2 into input/output lines and ground planes, and eight ground planes are extracted. 1st
In the resonant mode 3 in the figure, the resonance frequency calculating section performs eigenvalue analysis of the two-dimensional Helmholt equation given by equation (1) for the ground plane 8 in Figure 2, and calculates the low-order resonance point. The resonance mode and resonance frequency are calculated in order from .

(Vr” +k”)V=O(1) However, k-ω2εμ, the subscript T indicates the same horizontal component on the substrate, ■ is the potential on the substrate, ω is each frequency, ε is the dielectric constant of the substrate, μ is the magnetic permeability of the substrate.

A set of calculated resonant frequencies is shown in Table 1.

is within the operating frequency band of the amplifier and causes instability in circuit operation. As data showing that this point causes instability in circuit operation, FIG. 3 shows measurement results of isolation characteristics between input and output lines of the same board. Isolation deterioration, which is presumed to be caused by signal wraparound via resonance of the substrate potential, is observed near the frequency of 4.68 (GHz) in the figure, and the circuit clearly becomes unstable at this point. In this case, based on the determination by the determination unit 4 in FIG. 1, the process is transferred to the modification unit 5 in FIG.

In the modification section 5, the layout is modified to remove the resonance point 4.68 (GHz) from within the operating frequency band of the amplifier. In this example, by adding a through hole in the ground plane. To achieve this, here:
The feature of the present invention method is that the resonance frequency is 4.68.
The point is that the position of the through hole to be added is determined using the vibration pattern information of the resonance mode corresponding to (GHz). That is, by providing a through hole at a location where the vibration amplitude of the resonance mode is the largest, the vibration mode is suppressed. The amplitude of the corresponding vibration pattern is illustrated in FIG. Based on this information, FIG. 5 shows a wiring layout that has been modified to provide through holes at four locations where the amplitude is maximum.

The revised layout is again divided into nine categories, the ground plane is extracted, and the resonance mode and resonance frequency are calculated. Table 2 shows the resonance frequencies at this time.

The lowest resonance point (6.1 GHz) in Table 2 is outside the amplifier operating frequency band, thereby completing the evaluated and designed wiring layout 6, ie, FIG. 5.

The above example shows an example using a dielectric substrate, but a similar wiring layout design is shown in FIG.
This is also possible for wiring layouts on similar circuit chips such as substrates.

By adopting the wiring pattern design method based on the above configuration, if a wiring resonance point that makes circuit operation unstable occurs in the initial wiring layout 1, the layout can be efficiently corrected and these negative effects can be eliminated. A wiring pattern layout that eliminates this is designed.

(Effects of the Invention) By doing so, it becomes possible to economically and efficiently design a wiring layout that anticipates and eliminates instability in circuit operation caused by the resonant frequency of the wiring. Also,
A dielectric substrate having the structure of claim (2) designed using this method satisfies design requirements using the minimum number of through holes, and reduces manufacturing costs.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram based on an embodiment of the wiring pattern design method of the present invention, and FIG. 2 shows a wiring board to which the embodiment is applied.
3 shows the isolation characteristics of the wiring board shown in FIG. 2, FIG. 4 shows an example of the resonant vibration amplitude pattern of the ground plane of the same board, and FIG. 5 shows the wiring board after correction. FIG. 6 is a cross-sectional view of an integrated circuit chip. DESCRIPTION OF SYMBOLS 1... Initial wiring pattern layout, 2... Wiring division into two classifications, extraction section, 3... Resonance mode, frequency calculation section, 4... Judgment section, 5... Modification section, 6...・Final wiring pattern layout, 7... Input/output line, 8...
- Ground plane, 9...Through hole.

Claims (3)

[Claims] (1) Regarding wiring layout in integrated circuits, (a)
Divide and classify the initial wiring into a set of (connected) wirings that have the same DC potential, (b) calculate the resonance mode and resonance frequency for each divided and classified wiring, and (c) Determine whether the calculated resonant frequency exists within the operating frequency band of the circuit, and if the result of the determination in (d) or (c) is that the resonant frequency exists within the band, based on the vibration amplitude information of the resonance mode. The method is characterized in that the corresponding wiring layout is corrected, the process returns to (b), and if the resonant frequency does not exist within the band as a result of the determination in (e) and (c), the corresponding layout is considered as the final result and the operation ends. How to design electrical circuit wiring patterns. (2) The wiring correction process in item (d) above targets the ground wiring connected to the substrate potential and the conductor surface on the back of the board, or between wiring that is already connected between different layers of multilayer wiring, and Claim 1, characterized in that the step is a step of adding a through hole at a point where the vibration amplitude of the mode is maximum.
Wiring pattern design method described in section. (3) A wiring structure characterized by having a wiring pattern in which a through hole penetrating the substrate is provided at a position where the vibration amplitude of a resonance mode in the wiring pattern is maximum.