JP7801603B2 - 中間装置、通信方法、およびプログラム - Google Patents

中間装置、通信方法、およびプログラム

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Publication number
JP7801603B2
JP7801603B2 JP2023549286A JP2023549286A JP7801603B2 JP 7801603 B2 JP7801603 B2 JP 7801603B2 JP 2023549286 A JP2023549286 A JP 2023549286A JP 2023549286 A JP2023549286 A JP 2023549286A JP 7801603 B2 JP7801603 B2 JP 7801603B2
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request
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response
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JP2023549286A
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Japanese (ja)
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JPWO2023047567A1 (https=
Inventor
潤紀 市川
秀樹 西沢
健司 清水
幸男 築島
智也 日比
綺泉 井上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NTT Inc
NTT Inc USA
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Nippon Telegraph and Telephone Corp
NTT Inc USA
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Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/173Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17306Intercommunication techniques
    • G06F15/17331Distributed shared memory [DSM], e.g. remote direct memory access [RDMA]
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/173Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17356Indirect interconnection networks

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Computer And Data Communications (AREA)
JP2023549286A 2021-09-27 2021-09-27 中間装置、通信方法、およびプログラム Active JP7801603B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2021/035305 WO2023047567A1 (ja) 2021-09-27 2021-09-27 中間装置、通信方法、およびプログラム

Publications (2)

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JPWO2023047567A1 JPWO2023047567A1 (https=) 2023-03-30
JP7801603B2 true JP7801603B2 (ja) 2026-01-19

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JP2023549286A Active JP7801603B2 (ja) 2021-09-27 2021-09-27 中間装置、通信方法、およびプログラム

Country Status (3)

Country Link
US (1) US20240394215A1 (https=)
JP (1) JP7801603B2 (https=)
WO (1) WO2023047567A1 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023058232A1 (ja) * 2021-10-08 2023-04-13 日本電信電話株式会社 通信システム、中間装置、通信方法、および、プログラム
US20250365235A1 (en) * 2024-05-24 2025-11-27 Cisco Technology, Inc. Incast congestion management

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007235674A (ja) 2006-03-02 2007-09-13 Nec Corp 通信装置および通信方法
JP2010061194A (ja) 2008-09-01 2010-03-18 Hitachi Ltd データ転送装置

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10659254B2 (en) * 2017-07-10 2020-05-19 Fungible, Inc. Access node integrated circuit for data centers which includes a networking unit, a plurality of host units, processing clusters, a data network fabric, and a control network fabric

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007235674A (ja) 2006-03-02 2007-09-13 Nec Corp 通信装置および通信方法
JP2010061194A (ja) 2008-09-01 2010-03-18 Hitachi Ltd データ転送装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
空閑 洋平 他,物理マシンと協調動作可能なソフトウェアによるPCIeデバイスエミュレーション手法,情報処理学会 研究報告 システムソフトウェアとオペレーティング・システム(OS),情報処理学会,2019年07月17日,2019-OS-147,第1頁-第6頁

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Publication number Publication date
JPWO2023047567A1 (https=) 2023-03-30
US20240394215A1 (en) 2024-11-28
WO2023047567A1 (ja) 2023-03-30

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