JP7550614B2 - インメモリコンピューティングに対するデータ配置のための方法及びその方法が適用されたメモリモジュール - Google Patents

インメモリコンピューティングに対するデータ配置のための方法及びその方法が適用されたメモリモジュール Download PDF

Info

Publication number
JP7550614B2
JP7550614B2 JP2020191783A JP2020191783A JP7550614B2 JP 7550614 B2 JP7550614 B2 JP 7550614B2 JP 2020191783 A JP2020191783 A JP 2020191783A JP 2020191783 A JP2020191783 A JP 2020191783A JP 7550614 B2 JP7550614 B2 JP 7550614B2
Authority
JP
Japan
Prior art keywords
operand
tiles
tile
dram
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2020191783A
Other languages
English (en)
Japanese (ja)
Other versions
JP2021128752A (ja
JP2021128752A5 (enExample
Inventor
テジャ マラディ，クリシュナ
皇甫文沁
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of JP2021128752A publication Critical patent/JP2021128752A/ja
Publication of JP2021128752A5 publication Critical patent/JP2021128752A5/ja
Application granted granted Critical
Publication of JP7550614B2 publication Critical patent/JP7550614B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629—Configuration or reconfiguration of storage systems
    • G06F3/0631—Configuration or reconfiguration of storage systems by allocating resources to storage systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0811—Multiuser, multiprocessor or multiprocessing cache systems with multilevel cache hierarchies
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
    • G06F15/7821—Tightly coupled to memory, e.g. computational memory, smart memory, processor in memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0604—Improving or facilitating administration, e.g. storage management
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061—Improving I/O performance
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0656—Data buffering arrangements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0658—Controller construction arrangements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/53—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel
    • G06F7/5318—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel with column wise addition of partial products, e.g. using Wallace tree, Dadda counters
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/5443—Sum of products
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30101—Special purpose registers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/445—Program loading or initiating
    • G06F9/44557—Code layout in executable memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/60—Memory management
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Computing Systems (AREA)
  • Human Computer Interaction (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Databases & Information Systems (AREA)
  • Dram (AREA)
  • Memory System (AREA)
  • Executing Machine-Instructions (AREA)
  • Semiconductor Memories (AREA)
JP2020191783A 2020-02-12 2020-11-18 インメモリコンピューティングに対するデータ配置のための方法及びその方法が適用されたメモリモジュール Active JP7550614B2 (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US202062975577P 2020-02-12 2020-02-12
US62/975,577 2020-02-12
US16/859,829 US11226816B2 (en) 2020-02-12 2020-04-27 Systems and methods for data placement for in-memory-compute
US16/859,829 2020-04-27

Publications (3)

Publication Number Publication Date
JP2021128752A JP2021128752A (ja) 2021-09-02
JP2021128752A5 JP2021128752A5 (enExample) 2023-10-02
JP7550614B2 true JP7550614B2 (ja) 2024-09-13

Family

ID=77177440

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2020191783A Active JP7550614B2 (ja) 2020-02-12 2020-11-18 インメモリコンピューティングに対するデータ配置のための方法及びその方法が適用されたメモリモジュール

Country Status (4)

Country Link
US (4) US11226816B2 (enExample)
JP (1) JP7550614B2 (enExample)
KR (1) KR102653014B1 (enExample)
TW (1) TWI848184B (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI850513B (zh) * 2020-03-06 2024-08-01 南韓商三星電子股份有限公司 用於記憶體內計算的方法及用於計算的系統
CN115885344A (zh) * 2020-06-16 2023-03-31 格罗克公司 用于确定性处理器的确定性近计算存储器以及存储器单元与处理单元之间的增强数据移动
US11901035B2 (en) 2021-07-09 2024-02-13 Taiwan Semiconductor Manufacturing Company, Ltd. Method of differentiated thermal throttling of memory and system therefor
US12032829B2 (en) 2021-07-21 2024-07-09 Samsung Electronics Co., Ltd. Memory device performing in-memory operation and method thereof
US20230315920A1 (en) * 2022-04-02 2023-10-05 Intel Corporation Apparatus and method to implement homomorphic encyption and computation with dram
US20240257851A1 (en) * 2023-01-27 2024-08-01 Samsung Electronics Co., Ltd. Memory device and method of operating the same
KR20240175962A (ko) * 2023-06-14 2024-12-23 삼성전자주식회사 Dsp 및 이를 이용한 전자 장치
CN119201035A (zh) * 2023-06-26 2024-12-27 华为技术有限公司 一种数据处理的方法、芯片和计算设备
KR102814916B1 (ko) * 2023-08-23 2025-05-30 삼성전자주식회사 메모리 장치 및 그 동작 방법

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003272384A (ja) 2002-03-14 2003-09-26 Sony Corp 記憶装置
JP2008123479A (ja) 2006-11-15 2008-05-29 Samsung Electronics Co Ltd Ｓｉｍｄ及びそれのためのメモリアレイ構造
US20170255390A1 (en) 2016-03-01 2017-09-07 Samsung Electronics Co., Ltd. 3-d stacked memory with reconfigurable compute logic
JP2019028572A (ja) 2017-07-26 2019-02-21 富士通株式会社 情報処理装置、情報処理システム、情報処理方法及び情報処理プログラム
JP2019075101A (ja) 2017-10-17 2019-05-16 三星電子株式会社Ｓａｍｓｕｎｇ Ｅｌｅｃｔｒｏｎｉｃｓ Ｃｏ．，Ｌｔｄ． インメモリのコマンド処理方法、これを適用する高帯域幅メモリ（ｈｂｍ）、及びｈｂｍシステム

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06215160A (ja) 1992-08-25 1994-08-05 Texas Instr Inc <Ti> データ処理方法および装置
US5953738A (en) * 1997-07-02 1999-09-14 Silicon Aquarius, Inc DRAM with integral SRAM and arithmetic-logic units
US6295586B1 (en) * 1998-12-04 2001-09-25 Advanced Micro Devices, Inc. Queue based memory controller
US8477146B2 (en) * 2008-07-29 2013-07-02 Marvell World Trade Ltd. Processing rasterized data
US8521958B2 (en) * 2009-06-04 2013-08-27 Micron Technology, Inc. Internal processor buffer
US9542101B2 (en) * 2013-01-22 2017-01-10 Avago Technologies General Ip (Singapore) Pte. Ltd. System and methods for performing embedded full-stripe write operations to a data volume with data elements distributed across multiple modules
US20140331014A1 (en) * 2013-05-01 2014-11-06 Silicon Graphics International Corp. Scalable Matrix Multiplication in a Shared Memory System
EP3087489A4 (en) * 2013-12-26 2017-09-20 Intel Corporation Data reorder during memory access
US10185499B1 (en) * 2014-01-07 2019-01-22 Rambus Inc. Near-memory compute module
US10996959B2 (en) 2015-01-08 2021-05-04 Technion Research And Development Foundation Ltd. Hybrid processor
US9547441B1 (en) * 2015-06-23 2017-01-17 Pure Storage, Inc. Exposing a geometry of a storage device
US10180906B2 (en) * 2016-07-26 2019-01-15 Samsung Electronics Co., Ltd. HBM with in-memory cache manager
US10175980B2 (en) 2016-10-27 2019-01-08 Google Llc Neural network compute tile
US10242728B2 (en) 2016-10-27 2019-03-26 Samsung Electronics Co., Ltd. DPU architecture
US9922696B1 (en) * 2016-10-28 2018-03-20 Samsung Electronics Co., Ltd. Circuits and micro-architecture for a DRAM-based processing unit
FI3812900T3 (fi) 2016-12-31 2024-02-09 Intel Corp Järjestelmät, menetelmät ja laitteet heterogeenistä laskentaa varten
US20190130291A1 (en) * 2017-10-27 2019-05-02 Wave Computing, Inc. Dynamic reconfiguration with partially resident agents
US11373088B2 (en) 2017-12-30 2022-06-28 Intel Corporation Machine learning accelerator mechanism
US10572568B2 (en) 2018-03-28 2020-02-25 Intel Corporation Accelerator for sparse-dense matrix multiplication
US10664287B2 (en) 2018-03-30 2020-05-26 Intel Corporation Systems and methods for implementing chained tile operations
US10691182B2 (en) * 2019-05-20 2020-06-23 Intel Corporation Layered super-reticle computing: architectures and methods
US11237903B2 (en) * 2019-06-25 2022-02-01 Intel Corporation Technologies for providing ECC pre-provisioning and handling for cross-point memory and compute operations
US12248762B2 (en) * 2020-01-07 2025-03-11 SK Hynix Inc. Processing-in-memory (PIM) devices

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003272384A (ja) 2002-03-14 2003-09-26 Sony Corp 記憶装置
JP2008123479A (ja) 2006-11-15 2008-05-29 Samsung Electronics Co Ltd Ｓｉｍｄ及びそれのためのメモリアレイ構造
US20170255390A1 (en) 2016-03-01 2017-09-07 Samsung Electronics Co., Ltd. 3-d stacked memory with reconfigurable compute logic
JP2019028572A (ja) 2017-07-26 2019-02-21 富士通株式会社 情報処理装置、情報処理システム、情報処理方法及び情報処理プログラム
JP2019075101A (ja) 2017-10-17 2019-05-16 三星電子株式会社Ｓａｍｓｕｎｇ Ｅｌｅｃｔｒｏｎｉｃｓ Ｃｏ．，Ｌｔｄ． インメモリのコマンド処理方法、これを適用する高帯域幅メモリ（ｈｂｍ）、及びｈｂｍシステム

Also Published As

Publication number Publication date
US11226816B2 (en) 2022-01-18
US20240004646A1 (en) 2024-01-04
TW202131190A (zh) 2021-08-16
US11782707B2 (en) 2023-10-10
CN113254359A (zh) 2021-08-13
KR102653014B1 (ko) 2024-04-01
TWI848184B (zh) 2024-07-11
JP2021128752A (ja) 2021-09-02
US12236239B2 (en) 2025-02-25
KR20210103373A (ko) 2021-08-23
US20210247978A1 (en) 2021-08-12
US20220171620A1 (en) 2022-06-02
US20250190216A1 (en) 2025-06-12

Similar Documents

Publication Publication Date Title
JP7550614B2 (ja) インメモリコンピューティングに対するデータ配置のための方法及びその方法が適用されたメモリモジュール
KR102780371B1 (ko) 직렬 할당 데이터에 대해 pim(processing-in-memory) 연산을 수행하기 위한 방법, 및 관련 메모리 디바이스 및 시스템
US11775313B2 (en) Hardware accelerator for convolutional neural networks and method of operation thereof
US12333304B2 (en) Methods for performing processing-in-memory operations, and related systems
CN109871236B (zh) 具有低功率并行矩阵乘法流水线的流处理器
US20190057050A1 (en) Pipeline circuit architecture to provide in-memory computation functionality
CN111353575B (zh) 用于卷积神经网络的图块化格式
JP2021128752A5 (enExample)
US11429310B2 (en) Adjustable function-in-memory computation system
US12379869B2 (en) Adjustable function-in-memory computation system
CN113254359B (en) Method for performing in-memory computation and memory module
JPH05324700A (ja) 行列乗算装置
CN111798363B (zh) 图形处理器
KR102748984B1 (ko) 메모리 장치 및 그 동작 방법
US20250199806A1 (en) Matrix-Fused Min-Add Instructions
US12443832B1 (en) Neural network architecture with high bandwidth memory (HBM)
WO2024195694A1 (ja) プロセッサ装置および演算方法
KR20250089097A (ko) 메모리 장치 및 그 동작 방법
CN119889398A (zh) 存储器装置和由其执行的操作方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20230922

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20230922

A871 Explanation of circumstances concerning accelerated examination

Free format text: JAPANESE INTERMEDIATE CODE: A871

Effective date: 20230922

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20231024

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20240117

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20240220

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20240520

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20240806

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20240814

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20240827

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20240903

R150 Certificate of patent or registration of utility model

Ref document number: 7550614

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150