JP7491144B2 - Electro-optical device and electronic device - Google Patents

Description

The present invention relates to an electro-optical device and electronic device in which a light-shielding film is provided in a layer between a light-transmitting member and a transistor.

In electro-optical devices such as liquid crystal devices used as light valves in projection display devices, a semiconductor film is provided between a light-transmitting member and a pixel electrode, and the semiconductor film is used to form a transistor. In such electro-optical devices, when light incident from the light-transmitting member side enters the channel region of the transistor or its vicinity, a light leakage current is generated in the transistor. Therefore, a structure has been proposed in which a light-shielding film is provided between the light-transmitting member and the semiconductor film so as to overlap the semiconductor film in a planar view (see Patent Document 1).

International Publication No. WO2018/074060

In the configuration described in Patent Document 1, the light-shielding film is required to have a high optical density (OD value), but there are limitations on the thickness of the light-shielding film. For example, if the entire light-shielding film is formed thick, problems such as deformation of the substrate due to stress and cracks and peeling due to expansion during subsequent heat treatment occur. Therefore, with the configuration described in Patent Document 1, the light-shielding film cannot be made thick, and there is an issue that the light-shielding effect is insufficient.

In order to solve the above problem, one aspect of the electro-optical device according to the present invention is a
A transistor having an extending semiconductor film, and a surface on which the transistor is located ,
a light-transmitting member provided with a recess extending along the first direction so as to overlap with the semiconductor film ; an interlayer insulating film provided in a layer between the light-transmitting member and the transistor; and a light-shielding film extending in a layer between the interlayer insulating film and the light-transmitting member so as to overlap with the recess in a plan view and having a width wider than the recess, wherein the interlayer insulating film has a pair of contact holes extending in a direction intersecting the first direction for electrically connecting a gate electrode of the transistor and the light-shielding film.
the recess is provided in a region sandwiched between the pair of contact holes in a plan view , and the width in the second direction is equal to or larger than the width of the front surface of the semiconductor film.
The width in the second direction is wider than the width in the first direction .

The electro-optical device to which the present invention is applied is used in various electronic devices. In the present invention, when the electronic device is a projection type display device, the projection type display device is provided with a light source unit that emits light supplied to the electro-optical device, and a projection optical system that projects the light modulated by the electro-optical device.

1 is a plan view of an electro-optical device according to a first embodiment of the invention. FIG. 2 is a cross-sectional view of the electro-optical device shown in FIG. 2 is a plan view of a plurality of adjacent pixels in the electro-optical device shown in FIG. 1 . FIG. 4 is an enlarged plan view showing one of the pixels shown in FIG. 3 . A cross-sectional view taken along the line A1-A1' of FIG. 4B1-B1' cross-sectional view. 7 is a plan view of the scanning lines, the semiconductor film, the gate electrodes, etc. shown in FIG. 5 and FIG. 6 . FIG. 7 is a plan view of the first capacitance electrode and the second capacitance electrode shown in FIGS. 5 and 6 . 7 is a plan view of the data lines, the capacitance lines, etc. shown in FIG. 5 and FIG. 6 . 8 is an enlarged plan view showing the periphery of the contact hole shown in FIG. 7 . FIG. 11 is a plan view of an electro-optical device according to a second embodiment of the invention. FIG. 11 is a cross-sectional view of an electro-optical device according to a second embodiment of the invention. FIG. 11 is a plan view of an electro-optical device according to a third embodiment of the invention. FIG. 11 is a cross-sectional view of an electro-optical device according to a third embodiment of the invention. FIG. 11 is an explanatory diagram of an electro-optical device according to a fourth embodiment of the present invention. FIG. 13 is an explanatory diagram of an electro-optical device according to a fifth embodiment of the present invention. FIG. 1 is a schematic diagram showing the configuration of a projection display device using an electro-optical device to which the present invention is applied.

The embodiment of the present invention will be described with reference to the drawings. Note that in the drawings referred to in the following description, each layer and each component is shown at a different scale so that they can be recognized on the drawings.

In the following description, when describing each layer formed on the first substrate 10, the upper layer side or surface side means the side opposite to the side where the translucent member 19 is located (the side where the second substrate 20 is located), and the lower layer side means the side where the translucent member 19 is located. Of the two directions intersecting in the in-plane direction of the first substrate 10, the direction in which the scanning lines 3a extend is the first direction X, and the direction in which the data lines 6a extend is the second direction Y. Also, one side of the direction along the first direction X is one side X1 of the first direction X, the other side of the direction along the first direction X is the other side X2 of the first direction X, one side of the direction along the second direction Y is one side Y1 of the second direction Y, and the other side of the direction along the second direction Y is the other side Y2 of the second direction Y. In the present invention, the "width direction" is a direction perpendicular to the extension direction. For example, the recess 19g, scanning line 3a, and semiconductor film 31a described below extend in the first direction X, so the width direction of the recess 19g, the width direction of the scanning line 3a, and the width direction of the semiconductor film 31a are all in the second direction Y.

[Embodiment 1]
1. Configuration of the electro-optical device 100 FIG. 1 is a plan view of the electro-optical device 100 according to the first embodiment of the present invention. FIG. 2 is a cross-sectional view of the electro-optical device 100 shown in FIG. 1. As shown in FIGS. 1 and 2, in the electro-optical device 100, the first substrate 10 and the second substrate 20 are bonded together with a sealant 107 with a predetermined gap therebetween, and the first substrate 10 and the second substrate 20 face each other. The sealant 107 is provided in a frame shape along the outer edge of the second substrate 20, and an electro-optical layer 80 such as a liquid crystal layer is disposed in the region surrounded by the sealant 107 between the first substrate 10 and the second substrate 20. The sealant 107 is a photocurable adhesive, or a photocurable and thermosetting adhesive, and is mixed with a gap material such as glass fiber or glass beads to set the distance between the two substrates to a predetermined value. In this embodiment, the first substrate 10 and the second substrate 20 are both rectangular, and a display area 10a is provided as a rectangular area approximately in the center of the electro-optical device 100. Corresponding to this shape, the sealant 107 is also provided in an approximately rectangular shape, and a rectangular frame-shaped peripheral area 10b is provided between the inner peripheral edge of the sealant 107 and the outer peripheral edge of the display area 10a.

The first substrate 10 has a translucent member 19 as a main body portion. In this embodiment, the translucent member 19 includes a substrate body 190 such as a quartz substrate or a glass substrate. In this embodiment, the translucent member 19 is made of the substrate body 190. On one surface 19s of the translucent member 19 on the second substrate 20 side, outside the display area 10a, a data line driving circuit 101 and a plurality of terminals 102 are provided along one side of the first substrate 10, and a scanning line driving circuit 104 is provided along the other side adjacent to this side. Although not shown, a flexible wiring board is connected to the terminals 102, and various potentials and various signals are input to the first substrate 10 via the flexible wiring board.

On one surface 19s of the translucent member 19, a plurality of translucent pixel electrodes 9a made of an ITO (Indium Tin Oxide) film or the like are formed in a matrix in the display area 10a. A first alignment film 16 is formed on the second substrate 20 side of the pixel electrodes 9a, and the pixel electrodes 9a are covered by the first alignment film 16. Therefore, the substrate body 190 to the first alignment film 16 correspond to the first substrate 10.

The second substrate 20 includes a substrate body 29 made of a light-transmitting substrate such as a quartz substrate or a glass substrate. A light-transmitting common electrode 21 made of an ITO film or the like is formed on one side 29s of the substrate body 29 facing the first substrate 10, and a second alignment film 26 is formed on the first substrate 10 side relative to the common electrode 21. Therefore, the substrate body 29 to the second alignment film 26 correspond to the second substrate 20. The common electrode 21 is formed on almost the entire surface of the second substrate 20 and is covered by the second alignment film 26. In the second substrate 20, a light-shielding member 27 made of a resin, metal or metal compound is formed between the substrate body 29 and the common electrode 21, and a light-transmitting protective film 28 is formed between the light-shielding member 27 and the common electrode 21. The light-shielding member 27 is formed, for example, as a frame-shaped parting 27a extending along the outer periphery of the display area 10a. The light blocking member 27 is also formed as a black matrix 27b in the area that overlaps in plan view with the area sandwiched between adjacent pixel electrodes 9a. In the peripheral area 10b of the first substrate 10, in the area that overlaps in plan view with the parting 27a, a dummy pixel electrode 9b is formed at the same time as the pixel electrode 9a. Note that a lens may be provided in a position facing the pixel electrode 9a on the second substrate 20, in which case the black matrix 27b is often not formed.

The first alignment film 16 and the second alignment film 26 are inorganic alignment films made of obliquely evaporated films of, for example, _SiOx (x<2), _SiO2 , _TiO2 , MgO, _{Al2O3 ,} etc., and tilt the liquid crystal molecules with negative dielectric anisotropy used in the electro-optical layer 80. Therefore, the liquid crystal molecules form a predetermined angle with respect to the first substrate 10 and the second substrate 20. In this embodiment, the first alignment film 16 and the second alignment film 26 are made of silicon oxide. In this way, the electro-optical device 100 is configured as a liquid crystal device in a VA (Vertical Alignment) mode.

An inter-substrate conduction electrode 109 for electrical conduction between the first substrate 10 and the second substrate 20 is formed on the first substrate 10 in an area that overlaps with a corner portion of the second substrate 20 outside the sealing material 107. An inter-substrate conduction material 109a containing conductive particles is disposed on the inter-substrate conduction electrode 109, and the common electrode 21 of the second substrate 20 is electrically connected to the first substrate 10 via the inter-substrate conduction material 109a and the inter-substrate conduction electrode 109. Therefore, a common potential is applied to the common electrode 21 from the first substrate 10 side.

In the electro-optical device 100, the pixel electrodes 9a and the common electrode 21 are formed of a light-transmitting conductive film such as an ITO film, and the electro-optical device 100 is configured as a transmissive liquid crystal device. In the electro-optical device 100, light incident on one of the first and second substrates 10 and 20 and entering the electro-optical layer 80 is modulated while passing through the other substrate and exiting, thereby displaying an image. In this embodiment, as shown by the arrow L, light incident on the second substrate 20 is modulated pixel by pixel by the electro-optical layer 80 while passing through the first substrate 10 and exiting, thereby displaying an image.

2. Schematic configuration of pixel FIG. 3 is a plan view of a plurality of adjacent pixels in the electro-optical device 100 shown in FIG. 1. FIG. 4 is a plan view showing an enlarged view of one of the pixels shown in FIG. 3, and FIG. 4 shows an enlarged view of the transistor 30 and its vicinity. FIG. 5 is a cross-sectional view taken along the line A1-A1' in FIG. 4. FIG. 6 is a cross-sectional view taken along the line B1-B1' in FIG. 4. In addition, in FIG. 3, FIG. 4, and FIG. 7 to FIG. 9 described later, the layers are represented by the following lines. In addition, in FIG. 3, FIG. 4, and FIG. 7 to FIG. 9 described later, the positions of the ends of the layers that overlap each other in plan view are shifted so that the shapes of the layers can be easily understood. In addition, the contact hole 41g is indicated by an area with diagonal lines slanting upwards to the right, and the recess 19g is indicated by an area with diagonal lines slanting upwards to the left.
Scanning line 3a = thick solid line Semiconductor film 31a = thin, short dashed line Gate electrode 8a = thin solid line First capacitance electrode 4a = thin, long dashed line Second capacitance electrode 5a = thin dashed-dotted line Data line 6a and relay electrodes 6b, 6c = thick, long dashed lines Capacitor line 7a and relay electrode 7b = thick, two-dot dashed line Pixel electrode 9a = thick, short dashed line

3 and 4, on the surface of the first substrate 10 facing the second substrate 20, pixel electrodes 9a are formed in each of the pixels, and scanning lines 3a, data lines 6a, and capacitance lines 7a extend along the inter-pixel regions sandwiched between adjacent pixel electrodes 9a. The data lines 6a extend in the second direction Y in the inter-pixel regions, and the scanning lines 3a extend in the first direction X in the inter-pixel regions. The capacitance lines 7a extend along the first direction X and the second direction Y in the inter-pixel regions. In addition, transistors 30 are formed corresponding to the intersections of the data lines 6a and the scanning lines 3a. The scanning lines 3a, data lines 6a, and capacitance lines 7a have light-shielding properties. Therefore, the region in which the scanning lines 3a, data lines 6a, capacitance lines 7a, and electrodes in the same layer as these wirings are formed is a light-shielding region 18 through which light does not pass, and the region surrounded by the light-shielding region 18 is an opening region 17 through which light passes.

5 and 6, the first substrate 10 has a light-shielding film 3b in a layer between the light-transmitting member 19 and the pixel electrode 9a. In this embodiment, the light-shielding film 3b is provided as a scanning line 3a. An interlayer insulating film 41 is provided in a layer between the light-shielding film 3b and the pixel electrode 9a, and the light-shielding film 3b is provided in a layer between the light-transmitting member 19 and the interlayer insulating film 41. In addition, in the first substrate 10, a transistor 30 having a semiconductor film 31a is provided in a layer between the interlayer insulating film 41 and the pixel electrode 9a. In addition, interlayer insulating films 42, 43, 44, and 45 are laminated in order in a layer between the transistor 30 and the pixel electrode 9a. Each of the interlayer insulating films 41, 42, 43, 44, and 45 is made of a light-transmitting insulating film such as silicon oxide. In this embodiment, at least the surfaces of the interlayer insulating films 41 and 45 on the pixel electrode 9a side are made into a continuous plane by chemical mechanical polishing or the like.

3. Detailed Description of Each Layer The detailed configuration of the first substrate 10 will be described with reference to FIGS. 5 and 6, and with reference to the following FIGS. 7 to 9 as appropriate. FIG. 7 is a plan view of the scanning line 3a, the semiconductor film 31a, the gate electrode 8a, and the like shown in FIGS. 5 and 6. FIG. 8 is a plan view of the first capacitance electrode 4a and the second capacitance electrode 5a, and the like shown in FIGS. 5 and 6. FIG. 9 is a plan view of the data line 6a and the capacitance line 7a, and the like shown in FIGS. 5 and 6. Note that FIGS. 7 to 9 show contact holes related to the electrical connection of the electrodes, and the like shown in those figures, and also show the semiconductor film 31a and the pixel electrode 9a to indicate the reference position.

First, as shown in FIG. 5 and FIG. 6, in the first substrate 10, a light-shielding film 3b is formed between the light-transmitting member 19 and the interlayer insulating film 41. In this embodiment, the light-shielding film 3b is a scanning line 3a extending along the first direction X. The light-shielding film 3b is made of a light-shielding conductive film such as a metal film or a metal compound film. In this embodiment, the scanning line 3a is made of tungsten silicide, tungsten, titanium nitride, or the like. The light-transmitting member 19 is provided with a recess 19g, which will be described later.

Between the interlayer insulating film 41 and the interlayer insulating film 42, a pixel switching transistor 30 is formed. The transistor 30 includes a semiconductor film 31a formed on the surface of the interlayer insulating film 41 opposite to the light-transmitting member 19, a gate insulating film 32 laminated on the pixel electrode 9a side of the semiconductor film 31a, and a gate electrode 8a overlapping the semiconductor film 31a in a plan view on the pixel electrode 9a side of the gate insulating film 32. The semiconductor film 31a is made of a polysilicon film. The gate insulating film 32 has a two-layer structure of a first gate insulating film 32a made of silicon oxide obtained by thermally oxidizing the semiconductor film 31a, and a second gate insulating film 32b made of silicon oxide formed by a low-pressure CVD method or the like. The gate electrode 8a is made of a conductive film such as a conductive polysilicon film, a metal film, or a metal compound film.

The interlayer insulating film 41 is provided with a contact hole 41g for electrically connecting the scanning line 3a and the gate electrode 8a of the transistor 30. The detailed configuration of the contact hole 41g will be described later with reference to FIG. 10.

As shown in FIG. 7, the scanning lines 3a extend linearly along the first direction X with the same width. The semiconductor film 31a extends from the intersection of the scanning line 3a and the data line 6a to the other side X2 of the first direction X, and overlaps with the scanning line 3a in a planar view. The semiconductor film 31a has a channel region 31c at a portion overlapping with the gate electrode 8a in a planar view. In this embodiment, the transistor 30 has an LDD (Lightly Doped Drain) structure. Therefore, in the semiconductor film 31a, the data line side source drain region 31s on one side X1 of the first direction X where the data line 6a is located with respect to the channel region 31c has a first region 31t separated from the channel region 31c and a first low concentration region 31u sandwiched between the first region 31t and the channel region 31c, and the first low concentration region 31u has a lower impurity concentration than the first region 31t. In addition, in the semiconductor film 31a, the pixel electrode side source drain region 31d on the other side X2 of the first direction X opposite the data line 6a with respect to the channel region 31c has a second region 31e separated from the channel region 31c and a second low concentration region 31f sandwiched between the second region 31e and the channel region 31c, and the second low concentration region 31f has a lower impurity concentration than the second region 31e.

The gate electrode 8a has a first electrode portion 8a0 and second electrode portions 8a1 and 8a2. The first electrode portion 8a0 extends in the second direction Y so as to overlap the semiconductor film 31a in a planar view via the gate insulating film 32. The second electrode portions 8a1 and 8a2 extend in the first direction X along the semiconductor film 31a from both ends of the first electrode portion 8a0 in the second direction Y on both sides of the semiconductor film 31a in the second direction Y. The second electrode portions 8a1 and 8a2 do not overlap the semiconductor film 31a in a planar view.

5 and 6, on the upper layer side of the transistor 30, a capacitance element 55 is formed by a laminated film 550 in which a first capacitance electrode 4a, a dielectric film 40, and a second capacitance electrode 5a are laminated in this order between an interlayer insulating film 42 and an interlayer insulating film 43. The capacitance element 55 is a storage capacitance that prevents fluctuations in the image signal stored in the liquid crystal capacitance formed between the pixel electrode 9a and the common electrode 21. The first capacitance electrode 4a and the second capacitance electrode 5a are made of a conductive film such as a conductive polysilicon film, a metal film, or a metal compound film. In this embodiment, the first capacitance electrode 4a and the second capacitance electrode 5a are made of a conductive polysilicon film.

As shown in FIG. 8, the first capacitance electrode 4a has a main body portion 4a1 extending in the first direction X so as to overlap the scanning line 3a and the semiconductor film 31a in a planar view, and a protrusion 4a2 protruding from the main body portion 4a1 so as to overlap the data line 6a in a planar view, and an end of the main body portion 4a1 is electrically connected to the second region 31e of the semiconductor film 31a via a contact hole 42a formed in the interlayer insulating film 42. The first capacitance electrode 4a has a notch 4a3 formed so as not to overlap the end of the semiconductor film 31a that overlaps the data line 6a in a planar view.

The second capacitance electrode 5a has a main body portion 5a1 that overlaps with the main body portion 5a1 of the first capacitance electrode 4a in a planar view, and a protrusion portion 5a2 that overlaps with the protrusion portion 4a2 of the first capacitance electrode 4a in a planar view. Therefore, the capacitance element 55 has a first portion 55a that extends in the first direction X so as to overlap with the semiconductor film 31a, and a second portion 55b that extends in the second direction Y so as to overlap with the data line 6a. Therefore, the capacitance of the capacitance element 55 is large.

Similar to the first capacitance electrode 4a, the second capacitance electrode 5a has a notch 5a3 formed so as not to overlap in plan view with the end of the semiconductor film 31a that overlaps with the data line 6a. In addition, a notch 5a4 is formed at the end of the main body portion 5a1 of the second capacitance electrode 5a on the other side X2 in the first direction X so as not to overlap with the end of the main body portion 4a1 of the first capacitance electrode 4a.

6, the interlayer insulating film 41 is provided with a contact hole 41g for electrically connecting the scanning line 3a and the gate electrode 8a of the transistor 30, and the contact hole 41g penetrates the interlayer insulating film 41. Therefore, the interlayer insulating film 42 has a recess 42g formed by the contact hole 41g at a position overlapping the scanning line 3a in a plan view. Here, the recess 42g has a depth such that the bottom 42g0 is located on the side of the transparent member 19 from the portion of the gate electrode 8a overlapping with the semiconductor film 31a, and the laminated film 550 including the first capacitance electrode 4a, the dielectric film 40, and the second capacitance electrode 5a is also provided inside the recess 42g. That is, the bottom 42g0 of the recess 42g is located on the side of the transparent member 19 from the interface between the gate electrode 8a and the interlayer insulating film 42 at the portion overlapping with the semiconductor film 31a in a plan view, and the laminated film 550 is provided along the inner wall of the recess 42g. Therefore, the capacitance element 55 includes a third portion 55c that is provided along the inner wall of the recess 42g, and the capacitance of the capacitance element 55 is large. In this embodiment, the third portion 55c is part of the first portion 55a.

5 and 6, interlayer insulating films 44 and 45 are formed on the upper layer side of interlayer insulating film 43. Between interlayer insulating film 43 and interlayer insulating film 44, data line 6a and relay electrodes 6b and 6c are provided. Data line 6a and relay electrodes 6b and 6c are made of the same conductive film. Data line 6a and relay electrodes 6b and 6c are both made of a light-shielding conductive film such as a metal film or a metal compound film. For example, data line 6a and relay electrodes 6b and 6c are made of a multi-layer structure of titanium layer/titanium nitride layer/aluminum layer/titanium nitride layer or a multi-layer structure of titanium nitride layer/aluminum layer/titanium nitride layer.

A contact hole 43a is provided in the interlayer insulating film 42 and the interlayer insulating film 43, and the contact hole 43a penetrates the gate insulating film 32, the interlayer insulating film 42, and the interlayer insulating film 43. The data line 6a is electrically connected to the first region 31t of the semiconductor film 31a through the contact hole 43a. The contact hole 43a is formed in a portion corresponding to the notch 4a3 of the first capacitance electrode 4a and the notch 5a3 of the second capacitance electrode 5a described with reference to FIG. 8. Therefore, the contact hole 43a and the capacitance element 55 can be separated. A contact hole 43b is provided in the interlayer insulating film 43, and the contact hole 43b penetrates the interlayer insulating film 43. The relay electrode 6b is electrically connected to the first capacitance electrode 4a through the contact hole 43b. The contact hole 43b is formed in a portion corresponding to the notch 5a4 of the second capacitance electrode 5a described with reference to FIG. A contact hole 43c is provided in the interlayer insulating film 43, and the relay electrode 6c is electrically connected to the second capacitance electrode 5a through the contact hole 43c. In this embodiment, the relay electrode 6c covers at least the first low concentration region 31u to the second low concentration region 31f of the semiconductor film 31a from the pixel electrode 9a side.

Between the interlayer insulating film 44 and the interlayer insulating film 45, a capacitance line 7a and a relay electrode 7b are provided. The capacitance line 7a and the relay electrode 7b are made of the same conductive film. Both the capacitance line 7a and the relay electrode 7b are made of a light-shielding conductive film such as a metal film or a metal compound film. For example, the capacitance line 7a and the relay electrode 7b are made of a multi-layer structure of a titanium layer/titanium nitride layer/aluminum layer/titanium nitride layer, or a multi-layer structure of a titanium nitride layer/aluminum layer/titanium nitride layer.

A contact hole 44c is provided in the interlayer insulating film 44, and the capacitance line 7a is electrically connected to the relay electrode 6c through the contact hole 44c. Therefore, the capacitance line 7a is electrically connected to the second capacitance electrode 5a through the relay electrode 6c, and a common potential is applied to the second capacitance electrode 5a from the capacitance line 7a. A contact hole 44b is provided in the interlayer insulating film 44, and the relay electrode 7b is electrically connected to the relay electrode 6b through the contact hole 44b.

A contact hole 45a is provided in the interlayer insulating film 45, and the pixel electrode 9a is electrically connected to the relay electrode 7b through the contact hole 45a. Therefore, the pixel electrode 9a is electrically connected to the first capacitance electrode 4a through the relay electrodes 7b and 6b. Here, since the first capacitance electrode 4a is electrically connected to the second region 31e of the semiconductor film 31a through the contact hole 42a, the pixel electrode 9a is electrically connected to the second region 31e of the semiconductor film 31a through the first capacitance electrode 4a.

4. Configuration around the contact hole 41g Fig. 10 is an enlarged plan view showing the periphery of the contact hole 41g shown in Fig. 7. The gate electrode 8a is configured by laminating a polysilicon film 81a and a light-shielding conductive film 82a. In Fig. 10, the polysilicon film 81a is marked with diagonal lines slanting downward to the right, and the light-shielding conductive film 82a is marked with diagonal lines slanting upward to the right. Therefore, the region marked with diagonal lines slanting downward to the right and diagonal lines slanting upward to the right indicates that the polysilicon film 81a and the light-shielding conductive film 82a are laminated.

As shown in FIG. 10, the contact holes 41g extend along the first direction X on both sides of the semiconductor film 31a and overlap both the gate electrode 8a and the scanning line 3a in a plan view. Therefore, the gate electrode 8a is electrically connected to the scanning line 3a through the contact holes 41g, and a scanning signal is applied from the scanning line 3a.

Here, the contact hole 41g is provided at least along the second low concentration region 31f. In this embodiment, the contact hole 41g extends at least from both sides of the first low concentration region 31u through both sides of the channel region 31c to both sides of the second low concentration region 31f.

In this embodiment, the gate electrode 8a is formed by stacking a conductive polysilicon film 81a extending in the second direction Y so as to intersect with the semiconductor film 31a, and a light-shielding conductive film 82a covering the polysilicon film 81a. The conductive film 82a is made of a film that has a higher light-shielding property and a lower resistance than the polysilicon film 81a. For example, the conductive film 82a is made of a silicide film such as a tungsten silicide film.

The conductive film 82a is formed over a wider range than the polysilicon film 81a, and covers the entire polysilicon film 81a. Therefore, in the region where the polysilicon film 81a is formed in the gate electrode 8a, it has a two-layer structure of the polysilicon film 81a and the light-shielding conductive film 82a, and in the region where the polysilicon film 81a is not formed in the gate electrode 8a, it has a single-layer structure of the conductive film 82a. For example, in the gate electrode 8a, the polysilicon film 81a is not formed inside the contact hole 41g, and it has a single-layer structure of the conductive film 82a. Therefore, the conductive film 82a is provided along the entire side surface of the contact hole 41g, and forms a light-shielding wall. In contrast, in the part of the first electrode portion 8a0 outside the contact hole 41g, it has a two-layer structure of the polysilicon film 81a and the conductive film 82a.

This configuration is achieved by the following process. First, the scanning line 3a, the interlayer insulating film 41, the semiconductor film 31a, and the gate insulating film 32 are formed. Next, a conductive polysilicon film is formed, and then the polysilicon film is patterned to form a polysilicon film 81a that extends in the second direction Y that intersects with the semiconductor film 31a.

Next, with an etching mask formed, the gate insulating film 32, the polysilicon film 81a, and the interlayer insulating film 41 are etched to form a contact hole 41g. Therefore, the polysilicon film 81a does not exist inside the contact hole 41g. Next, after forming a light-shielding conductive film, as shown in FIG. 10, the light-shielding conductive film is patterned to form a light-shielding conductive film 82a.

5. Configuration around the light-shielding film 3b As shown in Figures 5, 6 and 7, the light-transmitting member 19 has a recess 19g extending in the first direction along the semiconductor film 31a so as to overlap the semiconductor film 31a in a plan view on the surface on the side where the transistor 30 is located. Therefore, the light-shielding film 3b extends in a layer between the interlayer insulating film 41 and the light-transmitting member 19 so as to overlap the recess 19g in a plan view. In this embodiment, the recess 19g extends over the entire area in the extension direction of the semiconductor film 31a. In addition, the light-shielding film 3b is the scanning line 3a, and the recess 19g extends continuously over the entire area in the extension direction of the scanning line 3a in the display region 10a.

Here, the light-shielding film 3b is wider than the recess 19g in the width direction corresponding to the second direction Y. The width of the recess 19g is narrower than the distance between the pair of contact holes 41g, and the recess 19g is provided in the region sandwiched between the pair of contact holes 41g in a plan view. The recess 19g extends in the first direction X along the light-shielding film 3b at the center position in the width direction corresponding to the second direction Y of the light-shielding film 3b. Therefore, the region in which the recess 19g is formed is included in the region in which the light-shielding film 3b is formed. Therefore, the light-shielding film 3b overlaps the side wall 19g2 and bottom wall 19g1 of the recess 19g inside the recess 19g, and is provided to the outside of the recess 19g.

The light-shielding film 3b is formed to a substantially constant thickness by a sputtering method or the like. Therefore, inside the recess 19g, the light-shielding film 3b is provided so as to follow the side wall 19g2 and bottom wall 19g1 of the recess 19g. However, the thickness of the light-shielding film 3b in the normal direction to the light-transmitting member 19 is thicker in the portion 3b0 covering the side wall 19g2 of the recess 19g than in the portion covering the bottom wall 19g1 of the recess 19g, and the thickness in the normal direction to the light-transmitting member 19 in the portion 3b0 covering the side wall 19g2 is equal to or greater than the depth of the recess 19g. Therefore, the light-shielding film 3b has a large light-shielding effect in the portion corresponding to the side wall 19g2 of the recess 19g.

In addition, since the semiconductor film 31a extends in the first direction X at the center position in the width direction corresponding to the second direction Y of the recess 19g, the recess 19g is provided in a wider area than the semiconductor film 31a in the width direction of the semiconductor film 31a. Therefore, when viewed from the light-transmitting member 19 side, the semiconductor film 31a is covered with the light-shielding film 3b that overlaps the bottom wall 19g1 of the recess 19g. In addition, on both sides of the width direction of the semiconductor film 31a, the portions 3b0 of the light-shielding film 3b that are thicker in the normal direction to the light-transmitting member 19 extend along the semiconductor film 31a.

6. Main Effects of the Present Embodiment As described above, in the electro-optical device 100 of the present embodiment, the light incident from the second substrate 20 side is blocked by the data line 6a, relay electrode 6c, capacitance line 7a, etc., which are provided on the second substrate 20 side with respect to the semiconductor film 31a, so that the incidence of the light to the semiconductor film 31a is suppressed. In addition, even if the light emitted from the first substrate 10 side is again incident from the first substrate 10 side, the light is blocked by the light-shielding film 3b provided on the light-transmitting member 19 side with respect to the semiconductor film 31a, so that the incidence of the light to the semiconductor film 31a is suppressed. In addition, the light traveling in the second direction Y intersecting the semiconductor film 31a is blocked by the gate electrode 8a inside the contact hole 41g that electrically connects the gate electrode 8a and the scanning line 3a, so that the incidence of the light to the semiconductor film 31a is suppressed.

In addition, a recess 19g is provided on the surface of the light-transmitting member 19 on which the transistor 30 is located, extending along the semiconductor film 31a so as to overlap the semiconductor film 31a in a planar view, and a sidewall 19g2 of the recess 19g extends along the semiconductor film 31a. In addition, the light-shielding film 3b extends so as to overlap the recess 19g in a planar view with a width wider than that of the recess 19g. Therefore, on the side of the semiconductor film 31a, in the portion overlapping the sidewall 19g2 of the recess 19g, a thick portion 3b0 of the light-shielding film 3b exists, and this portion 3b0 has high light-shielding properties. Therefore, even if the entire light-shielding film 3b is not thickened, it is possible to efficiently suppress the light incident from the first substrate 10 side from entering the semiconductor film 31a. Therefore, the transistor 30 is less likely to malfunction due to photocurrent.

In addition, since the thick portions 3b0 of the light-shielding film 3b are only present locally, unlike when the entire light-shielding film 3b is made thick, stress that deforms the substrate body 190 is unlikely to occur, and problems such as cracks and peeling due to thermal expansion when heat treatment is performed in the manufacturing process are unlikely to occur.

In particular, in this embodiment, the off-leak current of the transistor 30 is reduced by providing a second low-concentration region 31f between the channel region 31c and the second region 31e, and the sidewall 19g2 of the recess 19g and the contact hole 41g are provided at least along the second low-concentration region 31f. Therefore, light traveling from the second direction Y intersecting the semiconductor film 31a toward the second low-concentration region 31f can be blocked by the portion 3b0 provided on the sidewall 19g2 of the light-shielding film 3b and the gate electrode 8a inside the contact hole 41g. Therefore, the incidence of light into the second low-concentration region 31f is efficiently suppressed. Therefore, the transistor 30 can fully exhibit the characteristics due to the LDD structure.

The gate electrode 8a includes a conductive polysilicon film 81a and a light-shielding conductive film 82a, and the light-shielding conductive film 82a is provided along the side of the contact hole 41g. This provides the gate electrode 8a with high light-shielding properties and low resistance. In addition, the conductive polysilicon film 81a is interposed between the conductive film 82a and the gate insulating film 32, so that the threshold voltage of the transistor 30 is stable.

[Modification of the first embodiment]
In the first embodiment, the sidewall 19g2 of the recess 19g extends along the semiconductor film 31a on the side of the semiconductor film 31a, but the sidewall 19g2 of the recess 19g may extend at a position overlapping the semiconductor film 31a in a plan view. Alternatively, the recess 19g may not overlap the semiconductor film 31a in a plan view, and a plurality of recesses 19g may be provided along both sides of the side surface along which the semiconductor film 31a extends. Alternatively, the recess 19g may extend independently of the semiconductor film 31a as long as it has a portion overlapping the semiconductor film 31a in a plan view. These configurations can also enhance the light blocking effect not only against light directly below the semiconductor film 31a, but also against light from an oblique direction.

[Embodiment 2]
Fig. 11 is a plan view of an electro-optical device 100 according to a second embodiment of the present invention. Fig. 12 is a cross-sectional view of the electro-optical device 100 according to the second embodiment of the present invention. Fig. 12 shows a schematic view of the electro-optical device 100 cut along the line B2-B2' shown in Fig. 11. Note that the basic configuration of this embodiment and the embodiments described below are similar to that of the first embodiment, so the same reference numerals are used to designate common parts and their description will be omitted.

As shown in Figures 11 and 12, in this embodiment, as in the first embodiment, a recess 19g is provided on the surface of the light-transmitting member 19 on the side where the transistor 30 is located, extending along the semiconductor film 31a so as to overlap with the semiconductor film 31a in a planar view, and the light-shielding film 3b extends in a layer between the interlayer insulating film 41 and the light-transmitting member 19 so as to overlap with the recess 19g in a planar view. The recess 19g extends over the entire area in the extension direction of the semiconductor film 31a. In addition, the light-shielding film 3b is the scanning line 3a, and the recess 19g extends continuously over the entire area in the extension direction of the scanning line 3a in the display region 10a.

In this embodiment, the recess 19g includes multiple grooves 19g0 arranged in parallel in the width direction of the semiconductor film 31a. For example, the recess 19g includes three grooves 19g0 arranged in parallel in the width direction of the semiconductor film 31a. Here, the width of the grooves 19g0 is narrower than the width of the semiconductor film 31a, but the area in which the three grooves 19g0 are formed is wider than the width of the semiconductor film 31a. Therefore, in the width direction of the semiconductor film 31a, the recess 19g is provided in an area wider than the semiconductor film 31a.

The light-shielding film 3b is formed in a region wider than the region in which the recess 19g is formed in the width direction. Therefore, the thickness of the light-shielding film 3b in the normal direction to the light-transmitting member 19 is thicker in the portion 3b0 covering the sidewall 19g2 of the recess 19g than in the portion covering the outside of the recess 19g. In this embodiment, the light-shielding film 3b is formed by a CVD method, an ALD method, or the like, which has excellent step coverage. Therefore, the light-shielding film 3b is provided so as to fill the inside of the multiple grooves 19g0. Therefore, the thickness of the light-shielding film 3b in the normal direction to the light-transmitting member 19 is thicker in the portion formed inside the recess 19g than in the portion covering the outside of the recess 19g. Therefore, in the portion of the recess 19g that overlaps with the groove 19g0, the film thickness of the light-shielding film 3b is thick and the light-shielding property is high.

Therefore, according to this embodiment, a high light shielding effect can be obtained for the semiconductor film 31a without thickening the entire light shielding film 3b, so that malfunctions due to photocurrent are unlikely to occur in the transistor 30. In addition, since the thick portion 3b0 of the light shielding film 3b is only present locally, unlike the case where the entire light shielding film 3b is thickened, stress that deforms the substrate body 190 is unlikely to occur, and problems such as cracks and peeling due to thermal expansion when heat treatment is performed in the manufacturing process are unlikely to occur. In addition, although the second embodiment of the present invention is an example in which the multiple grooves 19g0 are arranged in parallel in the width direction of the semiconductor film 31a, the multiple grooves 19g0 may be arranged in parallel in a direction intersecting the width direction of the semiconductor film 31a, for example, in the direction in which the semiconductor film 31a extends.

[Embodiment 3]
Fig. 13 is a plan view of an electro-optical device 100 according to a third embodiment of the present invention. Fig. 14 is a cross-sectional view of the electro-optical device 100 according to the third embodiment of the present invention. Fig. 14 shows a schematic view of the electro-optical device 100 cut along the line A2-A2' shown in Fig. 13.

As shown in Figures 13 and 14, in this embodiment, as in the first embodiment, the light-transmitting member 19 has a recess 19g extending along the semiconductor film 31a so as to overlap the semiconductor film 31a in a planar view on the surface on the side where the transistor 30 is located, and the light-shielding film 3b extends in the layer between the interlayer insulating film 41 and the light-transmitting member 19 so as to overlap the recess 19g in a planar view. The light-shielding film 3b is the scanning line 3a and extends over the entire display area 10a.

The recesses 19g are arranged along the light-shielding film 3b throughout the entire display area 10a. However, the recesses 19g extend within a range between both ends of the semiconductor film 31a in the extension direction, and are not formed at both ends of the semiconductor film 31a in the extension direction. Therefore, the recesses 19g are formed independently for each pixel, and are interrupted in the extension direction of the light-shielding film 3b. Even with this configuration, the light-shielding film 3b has a high light-shielding effect on the semiconductor film 31a without the need to thicken the entire light-shielding film 3b, and has the same effect as in embodiment 1.

In this embodiment, the recess 19g described in the first embodiment is modified, but the recess 19g described in the second embodiment may be modified.

[Embodiment 4]
Fig. 15 is an explanatory diagram of an electro-optical device 100 according to a fourth embodiment of the present invention. Fig. 15 shows an enlarged view of the periphery of a light-shielding film 3b. In Fig. 15, the light-shielding film 3b is formed between a light-transmitting member 19 and a transistor 30. The light-shielding film 3b is made of a light-shielding conductive film such as a metal film or a metal compound film. For example, the light-shielding film 3b is made of tungsten or tungsten silicide. The other configurations are the same as those of the first embodiment.

In this embodiment, a silicon film 2a is provided between the light-transmitting member 19 and the light-shielding film 3b. In this embodiment, the silicon film 2a is a polysilicon film. Here, the thermal expansion coefficient of the silicon film 2a is between the thermal expansion coefficient of the light-shielding film 3b and the thermal expansion coefficient of silicon oxide. For example, the light-shielding film 3b contains tungsten and has a thermal expansion coefficient of about 4.5×10 ⁻⁶ /K. The light-transmitting member 19 is made of a substrate body 190 mainly composed of silicon oxide and has a thermal expansion coefficient of about 0.5×10 ⁻⁶ /K. The thermal expansion coefficient of the silicon film 2a is about 3.9×10 ⁻⁶ /K. Therefore, the stress generated due to the difference in the thermal expansion coefficient between the silicon oxide and the light-shielding film 3b can be relaxed by the silicon film 2a, so that the occurrence of cracks or the like in the light-shielding film 3b can be more reliably suppressed. Therefore, the incidence of light from the cracks in the light-shielding film 3b into the semiconductor film 31a can be suppressed.

[Embodiment 5]
Fig. 16 is an explanatory diagram of an electro-optical device 100 according to a fifth embodiment of the present invention. Fig. 16 shows an enlarged view of the periphery of a light-shielding film 3b. In Fig. 16, in this embodiment, as in the fourth embodiment, a light-shielding film 3b made of a metal material is formed between a light-transmitting member 19 and a transistor 30. In addition, a silicon film 2a made of a polysilicon film is provided between the light-transmitting member 19 and the light-shielding film 3b, and the generation of stress caused by the difference between the thermal expansion coefficient of the light-shielding film 3b and the thermal expansion coefficient of the substrate body 190 can be reliably alleviated by the silicon film 2a.

In this embodiment, the light-shielding film 3b contains at least one transition metal selected from titanium (Ti), chromium (Cr), tungsten (W), tantalum (Ta), molybdenum (Mo), and palladium (Pd), or a silicide compound of a transition metal, and has a thermal expansion coefficient significantly larger than that of the substrate body 190.

In this embodiment, a barrier film 1a is provided between the silicon film 2a and the light-shielding film 3b. In this embodiment, the barrier film 1a is mainly composed of silicon oxide. Therefore, the thermal expansion coefficient of the barrier film 1a is smaller than that of the silicon film 2a and that of the light-shielding film 3b, but the silicon oxide constituting the barrier film 1a is thinner than the film thickness of the silicon film 2a and that of the light-shielding film 3b. For example, the barrier film 1a is a natural oxide film or a thermal oxide film formed by oxidation of the surface of the silicon film 2a, and has a film thickness of 1 nm or less. Therefore, the barrier film 1a does not prevent the silicon film 2a from alleviating the generation of stress caused by the difference between the thermal expansion coefficient of the light-shielding film 3b and the thermal expansion coefficient of the substrate body 190. The other configurations are the same as those of the first embodiment.

In this embodiment, the barrier film 1a, which is mainly composed of silicon oxide, is provided between the light-shielding film 3b and the silicon film 2a, so that the reaction between the light-shielding film 3b and the silicon film 2a can be suppressed. More specifically, the silicon film 2a can be suppressed from being consumed due to the reaction between the silicon of the silicon film 2a and the light-shielding film 3b. Therefore, the generation of stress caused by the difference between the thermal expansion coefficient of the light-shielding film 3b and the thermal expansion coefficient of the substrate body 190 can be reliably and continuously alleviated by the silicon film 2a. Therefore, the generation of cracks in the light-shielding film 3b can be suppressed, so that the incidence of light from the cracks in the light-shielding film 3b to the semiconductor film 31a can be stably suppressed.

[Modification of the fifth embodiment]
In this embodiment, as in the fifth embodiment, the light-shielding film 3b contains at least one transition metal selected from titanium (Ti), chromium (Cr), tungsten (W), tantalum (Ta), molybdenum (Mo), and palladium (Pd), or a silicide compound of the transition metal. The barrier film 1a is mainly composed of a silicide film of the metal that constitutes the light-shielding film 3b. In this embodiment, the light-shielding film 3b contains tungsten, so the main component of the barrier film 1a is tungsten silicide. The barrier film 1a has a thickness that is the thinnest possible for forming the entire surface when the film is formed. For example, the barrier film 1a is a tungsten silicide film with a thickness of about 20 nm. The other configurations are the same as those in the first embodiment.

In this embodiment, as in the fifth embodiment, a barrier film 1a containing silicide is provided between the light-shielding film 3b and the silicon film 2a, so that the reaction between the light-shielding film 3b and the silicon film 2a can be suppressed. More specifically, the silicon film 2a can be suppressed from being consumed due to the reaction between the silicon of the silicon film 2a and the light-shielding film 3b. Therefore, the generation of stress caused by the difference between the thermal expansion coefficient of the light-shielding film 3b and the thermal expansion coefficient of the substrate body 190 can be reliably and continuously alleviated by the silicon film 2a. Therefore, the generation of cracks in the light-shielding film 3b can be suppressed, so that the incidence of light from the cracks in the light-shielding film 3b to the semiconductor film 31a can be stably suppressed.

[Other embodiments]
In the above embodiment, the light-shielding film 3b was the scanning line 3a, but the present invention may also be applied to cases where the light-shielding film 3b is provided as a film that only serves to block light, such as when the gate electrode 8a extends as the scanning line 3a.

In the above embodiment, the data line 6a, relay electrode 6c, and capacitance line 7a constitute a light-shielding member that overlaps with the semiconductor film 31a in a planar view from the pixel electrode 9a side. However, at least one of the first capacitance electrode 4a and the second capacitance electrode 5a may be a light-shielding electrode, and the light-shielding electrode may constitute a light-shielding member that overlaps with the semiconductor film 31a in a planar view from the pixel electrode 9a side.

In the above embodiment, the electro-optical device 100 in which the light source light is incident from the second substrate 20 side has been described as an example, but the present invention may also be applied to an electro-optical device 100 in which the light source light is incident from the first substrate 10 side. In the above embodiment, the electro-optical device 100 is a transmissive liquid crystal device, but the present invention may also be applied when the electro-optical device 100 is a reflective liquid crystal device. The present invention may also be applied when the electro-optical device 100 is an organic electroluminescence display device.

[Examples of installation in electronic devices]
An electronic device using the electro-optical device 100 according to the embodiment described above will be described. FIG. 17 is a schematic diagram of a projection display device using the electro-optical device 100 to which the present invention is applied. In FIG. 17, optical elements such as polarizing plates are omitted. A projection display device 2100 shown in FIG. 17 is an example of an electronic device using the electro-optical device 100. In the projection display device 2100, the electro-optical device 100 is used as a light valve, and high-definition and bright display is possible without increasing the size of the device. As shown in this figure, a light source unit 2102 consisting of a lamp unit having a white light source such as a halogen lamp is provided inside the projection display device 2100. The projection light emitted from the light source unit 2102 is separated into three primary colors, R (red), G (green), and B (blue), by three mirrors 2106 and two dichroic mirrors 2108 arranged inside. The separated projection light is guided to light valves 100R, 100G, and 100B corresponding to each primary color, respectively, and modulated. Since the B light has a longer optical path compared to the R and G light, in order to prevent loss, it is guided through a relay lens system 2121 having an input lens 2122, a relay lens 2123, and an output lens 2124.

The light modulated by the light valves 100R, 100G, and 100B enters the dichroic prism 2112 from three directions. The dichroic prism 2112 reflects the R and B light at 90 degrees, while transmitting the G light. Therefore, after the images of each primary color are combined, a color image is projected onto the screen 2120 by the projection optical system 2114.

[Other projection display devices]
Incidentally, the projection type display device may be configured to use an LED light source or the like that emits light of each color as the light source section, and to supply each of the color lights emitted from the LED light source to a separate liquid crystal device.

[Other electronic devices]
An electronic device including the electro-optical device 100 to which the present invention is applied is not limited to the projection type display device 2100 of the above embodiment. For example, the present invention may be used in electronic devices such as a projection type head-up display, a direct-view type head-mounted display, a personal computer, a digital still camera, and a liquid crystal television.

1a...barrier film, 2a...silicon film, 3a...scanning line, 3b...light-shielding film, 3b0...portion, 4a...first capacitance electrode, 5a...second capacitance electrode, 6a...data line, 7a...capacitance line, 8a...gate electrode, 8a0...first electrode portion, 8a1, 8a2...second electrode portion, 9a...pixel electrode, 10...first substrate, 10a...display area, 16...first alignment film, 19...translucent member, 19g...recess, 19g0...groove, 19g1...bottom wall, 19g2...side wall, 20...second substrate, 21...common electrode, 26... Second alignment film, 190...substrate body, 30...transistor, 31a...semiconductor film, 32...gate insulating film, 40...dielectric film, 41...interlayer insulating film, 41g...contact hole, 55...capacitive element, 80...electro-optical layer, 81a...polysilicon film, 82a...conductive film, 100...electro-optical device, 100B, 100G, 100R...light valve, 550...laminated film, 2100...projection display device, 2102...light source unit, 2114...projection optical system, X...first direction, Y...second direction

Claims (10)

a transistor having a semiconductor film extending along a first direction ;
The semiconductor film is formed on the surface on which the transistor is located in the first direction so as to overlap the semiconductor film.
a light-transmitting member having a recess extending along the light-transmitting member;
an interlayer insulating film provided in a layer between the light-transmitting member and the transistor;
a light-shielding film that is a layer between the interlayer insulating film and the light-transmitting member, extends so as to overlap the recess in a plan view, and has a width wider than the recess;
A pair of contact holes for electrically connecting the gate electrode of the transistor and the light shielding film is provided in the interlayer insulating film along a second direction intersecting the first direction.
And,
The recess is provided in a region sandwiched between the pair of contact holes in a plan view,
a width in the second direction of the first electrode layer, the width in the second direction being greater than a width of the semiconductor film in the second direction . 2. The electro-optical device according to claim 1 ,
The electro-optical device, wherein the light-transmitting member includes a light-transmitting substrate body. 3. The electro-optical device according to claim 1 ,
the light-shielding film constitutes a scanning line electrically connected to a gate electrode of the transistor,
The electro-optical device according to claim 1, wherein the gate electrode has a light-shielding conductive film provided along side surfaces of the pair of contact holes. 4. The electro-optical device according to claim 1 ,
The electro-optical device according to claim 1, wherein the light-shielding film is provided inside the recess so as to extend along a side wall and a bottom wall of the recess. 5. The electro-optical device according to claim 1 ,
The recess includes a plurality of parallel grooves,
The electro-optical device, wherein the light-shielding film is provided so as to fill the interiors of the plurality of grooves. a transistor having a semiconductor film extending along a first direction;
A recess extending along the first direction is provided on a surface on which the transistor is located.
a transparent member;
an interlayer insulating film provided in a layer between the light-transmitting member and the transistor;
A layer between the interlayer insulating film and the light-transmitting member extends so as to overlap the recess in a plan view.
a light-shielding film having a width greater than that of the recess;
The interlayer insulating film electrically connects the gate electrode of the transistor and the light shielding film.
A pair of contact holes for connecting the first and second electrodes are provided along a second direction intersecting the first direction.
And,
The recess is provided in a region sandwiched between the pair of contact holes in a plan view,
the first electrode extends along the first direction so as to overlap the entire semiconductor film. a transistor having a semiconductor film extending along a first direction;
The semiconductor film is formed on the surface on which the transistor is located in the first direction so as to overlap the semiconductor film.
a light-transmitting member having a recess extending along the light-transmitting member;
an interlayer insulating film provided in a layer between the light-transmitting member and the transistor;
A layer between the interlayer insulating film and the light-transmitting member extends so as to overlap the recess in a plan view.
a light-shielding film having a width greater than that of the recess;
The interlayer insulating film electrically connects the gate electrode of the transistor and the light shielding film.
A pair of contact holes for connecting the first and second electrodes are provided along a second direction intersecting the first direction.
And,
The recess is provided in a region sandwiched between the pair of contact holes in a plan view,
and extending within a range sandwiched between both ends of the semiconductor film in the first direction . a transistor having a semiconductor film extending along a first direction;
A recess extending along the first direction is provided on a surface on which the transistor is located.
a light-transmitting member mainly composed of silicon oxide;
an interlayer insulating film provided in a layer between the light-transmitting member and the transistor;
A layer between the interlayer insulating film and the light-transmitting member extends so as to overlap the recess in a plan view.
a light-shielding film having a width wider than the recess;
a silicon film provided in a layer between the light- shielding film and the light-transmitting member ,
The interlayer insulating film electrically connects the gate electrode of the transistor and the light shielding film.
A pair of contact holes for connecting the first and second electrodes are provided along a second direction intersecting the first direction.
And,
The recess is provided in a region sandwiched between the pair of contact holes in a plan view.
An electro-optical device comprising: 9. The electro-optical device according to claim 8 ,
the light-shielding film contains at least one transition metal selected from the group consisting of titanium, chromium, tungsten, tantalum, molybdenum, and palladium, or a silicide compound of the transition metal;
the electro-optical device further comprising a barrier film, the barrier film being mainly composed of silicon oxide or a silicide compound of the metal contained in the light-shielding film, disposed between the light-shielding film and the silicon film; An electronic device comprising the electro-optical device according to claim 1 .